50 #define NDCR			(*(volatile u32 __iomem*)(NAND_VIRT + 0))
56 #define ISRAM_START	0x5c000000
72 	void (*fn)(unsigned int) = (void __force *)(sram + 0x8000);  in pxa3xx_cpu_standby()
74 	memcpy_toio(sram + 0x8000, pm_enter_standby_start,  in pxa3xx_cpu_standby()
77 	AD2D0SR = ~0;  in pxa3xx_cpu_standby()
78 	AD2D1SR = ~0;  in pxa3xx_cpu_standby()
80 	AD2D1ER = 0;  in pxa3xx_cpu_standby()
88 	AD2D0ER = 0;  in pxa3xx_cpu_standby()
89 	AD2D1ER = 0;  in pxa3xx_cpu_standby()
97  * 0x5c014000 for the moment.
101 	volatile unsigned long *p = (volatile void *)0xc0000000;  in pxa3xx_cpu_pm_suspend()
112 	CKENB |= 1 << (CKEN_HSIO2 & 0x1f);  in pxa3xx_cpu_pm_suspend()
115 	AD3SR = ~0;  in pxa3xx_cpu_pm_suspend()
123 	PSPR = 0x5c014000;  in pxa3xx_cpu_pm_suspend()
128 	cpu_suspend(0, pxa3xx_finish_suspend);  in pxa3xx_cpu_pm_suspend()
132 	AD3ER = 0;  in pxa3xx_cpu_pm_suspend()
145 	if (wakeup_src == 0) {  in pxa3xx_cpu_pm_enter()
191 	AD1D0ER = 0;  in pxa3xx_init_pm()
192 	AD2D0ER = 0;  in pxa3xx_init_pm()
193 	AD2D1ER = 0;  in pxa3xx_init_pm()
194 	AD3ER = 0;  in pxa3xx_init_pm()
201 	unsigned long flags, mask = 0;  in pxa3xx_set_wake()
285 	return 0;  in pxa3xx_set_wake()
317 	return 0;  in pxa_set_ext_wakeup_type()
346 	__asm__ __volatile__("mrc p15, 0, %0, c15, c1, 0\n": "=r"(value));  in __pxa3xx_init_irq()
348 	__asm__ __volatile__("mcr p15, 0, %0, c15, c1, 0\n": :"r"(value));  in __pxa3xx_init_irq()
367 	return 0;  in pxa3xx_dt_init_irq()
403 	.irq_base	= PXA_GPIO_TO_IRQ(0),
432 	{ "pxa-ssp-dai.0", "rx", PDMA_FILTER_PARAM(LOWEST, 13) },
433 	{ "pxa-ssp-dai.0", "tx", PDMA_FILTER_PARAM(LOWEST, 14) },
438 	{ "pxa2xx-mci.0", "rx", PDMA_FILTER_PARAM(LOWEST, 21) },
439 	{ "pxa2xx-mci.0", "tx", PDMA_FILTER_PARAM(LOWEST, 22) },
462 	int ret = 0;  in pxa3xx_init()
493 			return 0;  in pxa3xx_init()