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/linux-5.10/Documentation/devicetree/bindings/powerpc/fsl/
Ddcsr.txt51 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
95 dcsr-epu@0 {
97 interrupts = <52 2 0 0
98 84 2 0 0
99 85 2 0 0>;
101 reg = <0x0 0x1000>;
138 reg = <0x1000 0x1000 0x1000000 0x8000>;
163 reg = <0x2000 0x1000>;
196 reg = <0x8000 0x1000 0xB0000 0x1000>;
225 reg = <0x9000 0x1000>;
[all …]
/linux-5.10/sound/soc/codecs/
Dtlv320aic26.c105 * where PLLM = J.DDDD (DDDD register ranges from 0 to 9999, decimal) in aic26_hw_params()
114 qval = 0; in aic26_hw_params()
115 reg = 0x8000 | qval << 11 | pval << 8 | jval << 2; in aic26_hw_params()
122 reg = 0x0800; in aic26_hw_params()
124 reg = 0x2000; in aic26_hw_params()
125 snd_soc_component_update_bits(component, AIC26_REG_AUDIO_CTRL3, 0xf800, reg); in aic26_hw_params()
129 snd_soc_component_update_bits(component, AIC26_REG_AUDIO_CTRL1, 0xfff, reg); in aic26_hw_params()
131 return 0; in aic26_hw_params()
147 reg = 0x8080; in aic26_mute()
149 reg = 0; in aic26_mute()
[all …]
Dwm9081.h24 #define WM9081_SOFTWARE_RESET 0x00
25 #define WM9081_ANALOGUE_LINEOUT 0x02
26 #define WM9081_ANALOGUE_SPEAKER_PGA 0x03
27 #define WM9081_VMID_CONTROL 0x04
28 #define WM9081_BIAS_CONTROL_1 0x05
29 #define WM9081_ANALOGUE_MIXER 0x07
30 #define WM9081_ANTI_POP_CONTROL 0x08
31 #define WM9081_ANALOGUE_SPEAKER_1 0x09
32 #define WM9081_ANALOGUE_SPEAKER_2 0x0A
33 #define WM9081_POWER_MANAGEMENT 0x0B
[all …]
/linux-5.10/arch/mips/include/asm/sn/
Daddrs.h41 #define NASID_GET_LOCAL(_n) ((_n) & 0xf)
76 #define WIDGETID_GET(addr) ((unsigned char)((addr >> SWIN_SIZE_BITS) & 0xff))
87 #define SWIN_WIDGET_MASK 0xF
93 * to Xtalk address in the range 0 -> SWINZ_SIZEMASK
107 (((addr) >= NODE_SWIN_BASE(nasid, 0)) && \
127 #define UALIAS_SIZE 0x10000000 /* 256 Megabytes */
132 * processor 0 or 1 within a node.
136 #define UALIAS_FLIP_SIZE 0x20000
137 #define UALIAS_FLIP_BIT 0x10000
141 #define LBOOT_BASE (HSPEC_BASE + 0x10000000)
[all …]
/linux-5.10/include/linux/mfd/
Dsi476x-core.h31 #define SI476X_STATUS_POLL_US 0
42 SI476X_REVISION_A10 = 0,
48 SI476X_RADIO_CELL = 0,
70 SI476X_POWER_DOWN = 0,
286 SI476X_TM_VALIDATED_NORMAL_TUNE = 0,
301 SI476X_SM_INITIALIZE_AUDIO = 0,
321 * @rdsfifoused: Number of blocks remaining in the RDS FIFO (0 if
347 SI476X_INJSIDE_AUTO = 0,
438 SI476X_POWER_GRID_50HZ = 0,
445 SI476X_STCIEN = (1 << 0),
[all …]
/linux-5.10/drivers/infiniband/hw/qib/
Dqib.h66 #define QIB_CHIP_VERS_MIN 0U
69 #define QIB_OUI 0x001175
259 #define QIB_SDMA_TXREQ_F_USELARGEBUF 0x1
260 #define QIB_SDMA_TXREQ_F_HEADTOHOST 0x2
261 #define QIB_SDMA_TXREQ_F_INTREQ 0x4
262 #define QIB_SDMA_TXREQ_F_FREEBUF 0x8
263 #define QIB_SDMA_TXREQ_F_FREEDESC 0x10
265 #define QIB_SDMA_TXREQ_S_OK 0
275 #define QIB_IB_CFG_LIDLMC 0 /* LID (LS16b) and Mask (MS16b) */
302 #define IB_LINKCMD_DOWN (0 << 16)
[all …]
/linux-5.10/drivers/staging/rtl8723bs/include/
DHal8192CPhyReg.h41 /* BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF */
43 /* 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 */
44 /* 3. RF register 0x00-2E */
52 /* 1. Page1(0x100) */
54 #define rPMAC_Reset 0x100
55 #define rPMAC_TxStart 0x104
56 #define rPMAC_TxLegacySIG 0x108
57 #define rPMAC_TxHTSIG1 0x10c
58 #define rPMAC_TxHTSIG2 0x110
59 #define rPMAC_PHYDebug 0x114
[all …]
/linux-5.10/include/linux/
Drtsx_pci.h19 #define RTSX_HCBAR 0x00
20 #define RTSX_HCBCTLR 0x04
21 #define STOP_CMD (0x01 << 28)
22 #define READ_REG_CMD 0
26 #define RTSX_HDBAR 0x08
27 #define RTSX_SG_INT 0x04
28 #define RTSX_SG_END 0x02
29 #define RTSX_SG_VALID 0x01
30 #define RTSX_SG_NO_OP 0x00
31 #define RTSX_SG_TRANS_DATA (0x02 << 4)
[all …]
Dieee80211.h34 * 0 0 DA SA BSSID - IBSS/DLS
35 * 0 1 DA BSSID SA - AP -> STA
36 * 1 0 BSSID SA DA - AP <- STA
42 #define IEEE80211_FCTL_VERS 0x0003
43 #define IEEE80211_FCTL_FTYPE 0x000c
44 #define IEEE80211_FCTL_STYPE 0x00f0
45 #define IEEE80211_FCTL_TODS 0x0100
46 #define IEEE80211_FCTL_FROMDS 0x0200
47 #define IEEE80211_FCTL_MOREFRAGS 0x0400
48 #define IEEE80211_FCTL_RETRY 0x0800
[all …]
/linux-5.10/arch/arm/boot/dts/
Dste-dbx5x0.dtsi38 #size-cells = <0>;
54 reg = <0x300>;
63 reg = <0x301>;
79 polling-delay = <0>;
91 hysteresis = <0>;
113 reg = <0x801ae000 0x1000>;
129 reg = <0x801af000 0x1000>;
145 reg = <0x801a6000 0x1000>;
160 #size-cells = <0>;
162 port@0 {
[all …]
/linux-5.10/drivers/mmc/host/
Drenesas_sdhi_sys_dmac.c49 .tap = 0x00000703,
52 .clk_rate = 0,
53 .tap = 0x00000300,
64 .dma_rx_offset = 0x2000,
65 .scc_offset = 0x0300,
189 if (ret > 0) in renesas_sdhi_sys_dmac_start_dma_rx()
199 if (cookie < 0) { in renesas_sdhi_sys_dmac_start_dma_rx()
209 if (ret >= 0) in renesas_sdhi_sys_dmac_start_dma_rx()
266 if (ret > 0) in renesas_sdhi_sys_dmac_start_dma_tx()
276 if (cookie < 0) { in renesas_sdhi_sys_dmac_start_dma_tx()
[all …]
Dtifm_sd.c21 static bool no_dma = 0;
22 static bool fixed_timeout = 0;
27 #define TIFM_MMCSD_RESET 0x0002
28 #define TIFM_MMCSD_CLKMASK 0x03ff
29 #define TIFM_MMCSD_POWER 0x0800
30 #define TIFM_MMCSD_4BBUS 0x8000
31 #define TIFM_MMCSD_RXDE 0x8000 /* rx dma enable */
32 #define TIFM_MMCSD_TXDE 0x0080 /* tx dma enable */
33 #define TIFM_MMCSD_BUFINT 0x0c00 /* set bits: AE, AF */
34 #define TIFM_MMCSD_DPE 0x0020 /* data timeout counted in kilocycles */
[all …]
/linux-5.10/drivers/gpu/drm/msm/adreno/
Da6xx_gpu_state.c50 in[0] = val; in CRASHDUMP_WRITE()
58 in[0] = target; in CRASHDUMP_READ()
66 in[0] = 0; in CRASHDUMP_FINI()
67 in[1] = 0; in CRASHDUMP_FINI()
148 val & 0x02, 100, 10000); in a6xx_crashdumper_run()
150 gpu_write(gpu, REG_A6XX_CP_CRASH_DUMP_CNTL, 0); in a6xx_crashdumper_run()
170 data[0] = gpu_read(gpu, REG_A6XX_DBGC_CFG_DBGBUS_TRACE_BUF2); in debugbus_read()
197 data[0] = cxdbg_read(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_TRACE_BUF2); in cx_debugbus_read()
211 for (i = 0; i < count; i++) { in vbif_debugbus_read()
250 gpu_write(gpu, REG_A6XX_VBIF_TEST_BUS1_CTRL0, 0); in a6xx_get_vbif_debugbus_block()
[all …]
/linux-5.10/drivers/media/pci/saa7134/
Dsaa7134-cards.c48 .fm_radio = { .if_freq = 5500, .fm_rfn = 0, .agc_mode = 3, .std = 0,
49 .if_lvl = 0, .rfagc_top = 0x2c, },
58 .audio_clock = 0x00187de7,
66 .vmux = 0,
73 .audio_clock = 0x00187de7,
81 .vmux = 0,
100 .audio_clock = 0x00200000,
106 .gpiomask = 0xe000,
111 .gpio = 0x8000,
116 .gpio = 0x0000,
[all …]
/linux-5.10/drivers/net/ethernet/micrel/
Dksz884x.c32 #define KS_DMA_TX_CTRL 0x0000
33 #define DMA_TX_ENABLE 0x00000001
34 #define DMA_TX_CRC_ENABLE 0x00000002
35 #define DMA_TX_PAD_ENABLE 0x00000004
36 #define DMA_TX_LOOPBACK 0x00000100
37 #define DMA_TX_FLOW_ENABLE 0x00000200
38 #define DMA_TX_CSUM_IP 0x00010000
39 #define DMA_TX_CSUM_TCP 0x00020000
40 #define DMA_TX_CSUM_UDP 0x00040000
41 #define DMA_TX_BURST_SIZE 0x3F000000
[all …]
/linux-5.10/arch/s390/net/
Dbpf_jit_comp.c55 #define SEEN_MEM BIT(0) /* use mem[] for temporary storage */
64 #define REG_W0 (MAX_BPF_JIT_REG + 0) /* Work register 1 (even) */
68 #define REG_0 REG_W0 /* Register 0 */
95 [REG_W0] = 0,
168 unsigned int __disp = (disp) & 0xfff; \
182 unsigned int __imm = (imm) & 0xffff; \
189 long __pcrel = ((pcrel) >> 1) & 0xffff; \
196 _EMIT4((op) | (mask) << 20 | (__rel & 0xffff)); \
210 unsigned int __disp = (disp) & 0xfff; \
217 unsigned int __disp_h = _disp & 0xff000; \
[all …]
/linux-5.10/drivers/scsi/
Datp870u.c132 for (c = 0; c < 2; c++) { in atp870u_intr_handle()
133 j = atp_readb_io(dev, c, 0x1f); in atp870u_intr_handle()
134 if ((j & 0x80) != 0) in atp870u_intr_handle()
136 dev->in_int[c] = 0; in atp870u_intr_handle()
138 if ((j & 0x80) == 0) in atp870u_intr_handle()
144 cmdp = atp_readb_io(dev, c, 0x10); in atp870u_intr_handle()
145 if (dev->working[c] != 0) { in atp870u_intr_handle()
147 if ((atp_readb_io(dev, c, 0x16) & 0x80) == 0) in atp870u_intr_handle()
148 atp_writeb_io(dev, c, 0x16, (atp_readb_io(dev, c, 0x16) | 0x80)); in atp870u_intr_handle()
150 if ((atp_readb_pci(dev, c, 0x00) & 0x08) != 0) in atp870u_intr_handle()
[all …]
/linux-5.10/drivers/scsi/qla2xxx/
Dqla_sup.c35 wrt_reg_word(&reg->u.isp2300.host_semaphore, 0x1); in qla2x00_lock_nvram_access()
39 while ((data & BIT_0) == 0) { in qla2x00_lock_nvram_access()
42 wrt_reg_word(&reg->u.isp2300.host_semaphore, 0x1); in qla2x00_lock_nvram_access()
60 wrt_reg_word(&reg->u.isp2300.host_semaphore, 0); in qla2x00_unlock_nvram_access()
98 * Bit 15-0 = write data
107 uint16_t data = 0; in qla2x00_nvram_request()
112 for (cnt = 0; cnt < 11; cnt++) { in qla2x00_nvram_request()
116 qla2x00_nv_write(ha, 0); in qla2x00_nvram_request()
121 for (cnt = 0; cnt < 16; cnt++) { in qla2x00_nvram_request()
194 qla2x00_nv_write(ha, 0); in qla2x00_write_nvram_word()
[all …]
/linux-5.10/arch/powerpc/boot/dts/
Dmpc8315erdb.dts27 #size-cells = <0>;
29 PowerPC,8315@0 {
31 reg = <0x0>;
36 timebase-frequency = <0>; // from bootloader
37 bus-frequency = <0>; // from bootloader
38 clock-frequency = <0>; // from bootloader
44 reg = <0x00000000 0x08000000>; // 128MB at 0
51 reg = <0xe0005000 0x1000>;
52 interrupts = <77 0x8>;
58 ranges = <0x0 0x0 0xfe000000 0x00800000
[all …]
Dtqm8548-bigflash.dts31 #size-cells = <0>;
33 PowerPC,8548@0 {
35 reg = <0>;
38 d-cache-size = <0x8000>; // L1, 32K
39 i-cache-size = <0x8000>; // L1, 32K
46 reg = <0x00000000 0x00000000>; // Filled in by U-Boot
53 ranges = <0x0 0xa0000000 0x100000>;
54 bus-frequency = <0>;
57 ecm-law@0 {
59 reg = <0x0 0x1000>;
[all …]
Dtqm8548.dts31 #size-cells = <0>;
33 PowerPC,8548@0 {
35 reg = <0>;
38 d-cache-size = <0x8000>; // L1, 32K
39 i-cache-size = <0x8000>; // L1, 32K
46 reg = <0x00000000 0x00000000>; // Filled in by U-Boot
53 ranges = <0x0 0xe0000000 0x100000>;
54 bus-frequency = <0>;
57 ecm-law@0 {
59 reg = <0x0 0x1000>;
[all …]
Dxpedite5200_xmon.dts18 boot-bank = <0x0>;
34 #size-cells = <0>;
36 PowerPC,8548@0 {
38 reg = <0>;
41 d-cache-size = <0x8000>; // L1, 32K
42 i-cache-size = <0x8000>; // L1, 32K
49 reg = <0x0 0x0>; // Filled in by boot loader
56 ranges = <0x0 0xef000000 0x100000>;
57 bus-frequency = <0>;
60 ecm-law@0 {
[all …]
/linux-5.10/drivers/acpi/acpica/
Damlcode.h17 #define AML_ZERO_OP (u16) 0x00
18 #define AML_ONE_OP (u16) 0x01
19 #define AML_ALIAS_OP (u16) 0x06
20 #define AML_NAME_OP (u16) 0x08
21 #define AML_BYTE_OP (u16) 0x0a
22 #define AML_WORD_OP (u16) 0x0b
23 #define AML_DWORD_OP (u16) 0x0c
24 #define AML_STRING_OP (u16) 0x0d
25 #define AML_QWORD_OP (u16) 0x0e /* ACPI 2.0 */
26 #define AML_SCOPE_OP (u16) 0x10
[all …]
/linux-5.10/drivers/bus/
Domap_l3_noc.h24 #define CUSTOM_ERROR 0x2
25 #define STANDARD_ERROR 0x0
26 #define INBAND_ERROR 0x0
27 #define L3_APPLICATION_ERROR 0x0
28 #define L3_DEBUG_ERROR 0x1
31 #define L3_TARG_STDERRLOG_MAIN 0x48
32 #define L3_TARG_STDERRLOG_HDR 0x4c
33 #define L3_TARG_STDERRLOG_MSTADDR 0x50
34 #define L3_TARG_STDERRLOG_INFO 0x58
35 #define L3_TARG_STDERRLOG_SLVOFSLSB 0x5c
[all …]
/linux-5.10/drivers/video/backlight/
Dams369fg06.c19 #define SLEEPMSEC 0x1000
20 #define ENDDEF 0x2000
21 #define DEFMASK 0xFF00
22 #define COMMAND_ONLY 0xFE
23 #define DATA_ONLY 0xFF
28 #define MIN_BRIGHTNESS 0
42 0x14, 0x03,
43 ENDDEF, 0x0000
47 0x14, 0x00,
48 ENDDEF, 0x0000
[all …]

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