6ed97c50 | 02-Mar-2016 |
Peter Feiner <pfeiner@google.com> |
lib: generic bitops.h
Factored out common bitops stuff, just like Linux's include/linux/bitops.h.
Signed-off-by: Peter Feiner <pfeiner@google.com> Message-Id: <1456938657-20850-3-git-send-email-pfe
lib: generic bitops.h
Factored out common bitops stuff, just like Linux's include/linux/bitops.h.
Signed-off-by: Peter Feiner <pfeiner@google.com> Message-Id: <1456938657-20850-3-git-send-email-pfeiner@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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957b6055 | 15-Jan-2016 |
Andrew Jones <drjones@redhat.com> |
arm64: include esr.h from processor.h
We prefer to require explicitly including headers in each file that need them, rather than creating headers that include everything, and then just always includ
arm64: include esr.h from processor.h
We prefer to require explicitly including headers in each file that need them, rather than creating headers that include everything, and then just always including those. But, we can make an exception for esr.h, as includers of processor.h will frequently need esr.h, and by embedding that inclusion we avoid requiring something like
#include <asm/processor.h> #ifdef __aarch64__ #include <asm/esr.h> #endif
in every test that runs on both arm and arm64.
Signed-off-by: Andrew Jones <drjones@redhat.com> Message-Id: <1452879690-14493-4-git-send-email-drjones@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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f1a7b2b2 | 15-Jan-2016 |
Andrew Jones <drjones@redhat.com> |
arm64: start_usr: no default vectors
Don't install default vector handlers on the usermode stack, as they'll override handlers installed on the kernel stack.
Signed-off-by: Andrew Jones <drjones@re
arm64: start_usr: no default vectors
Don't install default vector handlers on the usermode stack, as they'll override handlers installed on the kernel stack.
Signed-off-by: Andrew Jones <drjones@redhat.com> Message-Id: <1452879690-14493-3-git-send-email-drjones@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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9ae19a63 | 15-Jan-2016 |
Andrew Jones <drjones@redhat.com> |
arm64: irq handlers don't use esr
irq handlers need to be run from a different default vector handler, and have a different "install" API, than sync exception handlers.
Signed-off-by: Andrew Jones
arm64: irq handlers don't use esr
irq handlers need to be run from a different default vector handler, and have a different "install" API, than sync exception handlers.
Signed-off-by: Andrew Jones <drjones@redhat.com> Message-Id: <1452879690-14493-2-git-send-email-drjones@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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dd4246bc | 18-Jan-2016 |
Andrew Jones <drjones@redhat.com> |
Revert "arm/arm64: import include/uapi/linux/psci.h"
The previous patch allows us to "unimport" this header now.
This reverts commit 7bc9f5e757bfa5c5a5202816404444fcf47a14b3.
Signed-off-by: Andrew
Revert "arm/arm64: import include/uapi/linux/psci.h"
The previous patch allows us to "unimport" this header now.
This reverts commit 7bc9f5e757bfa5c5a5202816404444fcf47a14b3.
Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Radim KrÄmář <rkrcmar@redhat.com> Message-Id: <1453140064-9040-3-git-send-email-drjones@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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f3bd1e05 | 18-Jan-2016 |
Andrew Jones <drjones@redhat.com> |
lib: add linux dir for kernel uapi headers
We needed to import some uapi headers, e.g. lib/arm/asm/uapi-psci.h, and will need some others, e.g. pci_regs.h, in the future. Create a linux directory fo
lib: add linux dir for kernel uapi headers
We needed to import some uapi headers, e.g. lib/arm/asm/uapi-psci.h, and will need some others, e.g. pci_regs.h, in the future. Create a linux directory for them in lib so that they can be included with the familiar <linux/header.h> reference.
(Note, x86 has been cheating. lib/x86/pci.c already includes <linux/pci_regs.h>, which it's been getting away with as its include paths are less strict than arm's, i.e. it *does* look in /usr/include)
Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Radim KrÄmář <rkrcmar@redhat.com> Message-Id: <1453140064-9040-2-git-send-email-drjones@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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4b5caf0c | 06-Nov-2015 |
Alex Bennée <alex.bennee@linaro.org> |
lib/arm: add flush_tlb_page mmu function
This introduces a new flush_tlb_page function which does exactly what you expect. It's going to be useful for the future TLB torture test.
Signed-off-by: Al
lib/arm: add flush_tlb_page mmu function
This introduces a new flush_tlb_page function which does exactly what you expect. It's going to be useful for the future TLB torture test.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Andrew Jones <drjones@redhat.com> Message-Id: <1446769483-21586-13-git-send-email-drjones@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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23fb3b17 | 25-Jun-2015 |
Andrew Jones <drjones@redhat.com> |
arm/arm64: spinlocks: fix memory barriers
It shouldn't be necessary to use a barrier on the way into spin_lock. We'll be focused on a single address until we get it (exclusively) set, and then we'll
arm/arm64: spinlocks: fix memory barriers
It shouldn't be necessary to use a barrier on the way into spin_lock. We'll be focused on a single address until we get it (exclusively) set, and then we'll do a barrier on the way out. Also, it does make sense to do a barrier on the way in to spin_unlock, i.e. ensure what we did in the critical section is ordered wrt to what we do outside it, before we announce that we're outside.
Signed-off-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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68ea0e0b | 02-Feb-2015 |
Andrew Jones <drjones@redhat.com> |
arm/arm64: add smp_boot_secondary
Add a common entry point, present/online cpu masks, and smp_boot_secondary() to support booting secondary cpus. Adds a bit more PSCI API that we need too. We also a
arm/arm64: add smp_boot_secondary
Add a common entry point, present/online cpu masks, and smp_boot_secondary() to support booting secondary cpus. Adds a bit more PSCI API that we need too. We also adjust THREAD_START_SP for arm to make some room for exception stacks.
Signed-off-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
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44bd4c1d | 01-Feb-2015 |
Andrew Jones <drjones@redhat.com> |
arm/arm64: add cpu_relax() and friends
Signed-off-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> |
f0705d4c | 01-Feb-2015 |
Andrew Jones <drjones@redhat.com> |
arm/arm64: add some PSCI API
Signed-off-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> |
7bc9f5e7 | 01-Feb-2015 |
Andrew Jones <drjones@redhat.com> |
arm/arm64: import include/uapi/linux/psci.h
Signed-off-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> |
573687f8 | 01-Feb-2015 |
Andrew Jones <drjones@redhat.com> |
arm64: implement spinlocks
We put this off, as it wasn't necessary without smp. Now it is. Only need to do this for arm64, as we've already done it already for arm.
Signed-off-by: Andrew Jones <drj
arm64: implement spinlocks
We put this off, as it wasn't necessary without smp. Now it is. Only need to do this for arm64, as we've already done it already for arm.
Signed-off-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
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f20e2561 | 01-Feb-2015 |
Andrew Jones <drjones@redhat.com> |
arm/arm64: add simple cpumask API
On smp, cpumasks become quite useful. Add a simple implementation, along with implementations of bitops it needs.
Signed-off-by: Andrew Jones <drjones@redhat.com>
arm/arm64: add simple cpumask API
On smp, cpumasks become quite useful. Add a simple implementation, along with implementations of bitops it needs.
Signed-off-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
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ad14f089 | 01-Feb-2015 |
Andrew Jones <drjones@redhat.com> |
arm/arm64: maintain per thread exception handlers
Add exception handlers to thread info. And, since we allow threads running in user mode to install exception handlers too (a convenience for unit te
arm/arm64: maintain per thread exception handlers
Add exception handlers to thread info. And, since we allow threads running in user mode to install exception handlers too (a convenience for unit test developers), check for handlers on the user mode stack thread info too. But, unit test developers will likely also expect the installation of exception handlers done in kernel mode, before switching to user mode, to work. So, if there's no handler in the thread info hanging off the user mode stack, then still check the kernel mode stack thread info for one.
Use THREAD_SIZE == PAGE_SIZE, when PAGE_SIZE is larger than 16K. This is for arm64, which uses 64K pages, because the exception handler arrays are 8K together, making the stack too small with THREAD_SIZE == 16K.
Signed-off-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
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f6d10793 | 01-Feb-2015 |
Andrew Jones <drjones@redhat.com> |
arm/arm64: add per thread user_mode flag
While current_mode() == USR_MODE works on armv7 from PL0 to check if we're in user mode, current_mode() would require reading a privileged register on armv8.
arm/arm64: add per thread user_mode flag
While current_mode() == USR_MODE works on armv7 from PL0 to check if we're in user mode, current_mode() would require reading a privileged register on armv8. To work around this, on arm64 we introduced a 'user_mode' variable. This variable needs to be per thread now. Rather than starting to pollute thread_info with a bunch of bools, create a flags field and a TIF_USER_MODE flag to replace it. Use it on armv7 too for consistency. Also, now that we need to create a thread_info initializer, add mpidr utilities for setting thread_info->cpu.
Signed-off-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
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1693644d | 01-Feb-2015 |
Andrew Jones <drjones@redhat.com> |
arm/arm64: introduce thread_info
For smp we need a way to maintain thread local state. The bottom of the thread stack is a good place, and is where Linux puts it. So we just steal the concept of the
arm/arm64: introduce thread_info
For smp we need a way to maintain thread local state. The bottom of the thread stack is a good place, and is where Linux puts it. So we just steal the concept of the thread_info structure that lives at the bottom of the stack in Linux, and introduce it to kvm-unit-tests/arm[64]. For starters we just have cpu index for state, and that's implicitly initialized to zero for CPU0 already. So, as we don't have secondary cpus yet, there's not much to do.
Additionally, sneak a small fixup in to the initial stack setup for arm64. We were assuming that spsel is EL1 after reset, which has been true so far, but let's not assume.
Signed-off-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
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b13b47ed | 01-Feb-2015 |
Andrew Jones <drjones@redhat.com> |
arm/arm64: get rid of get_sp()
get_sp() only worked by accident, because gcc inlined calls to it. It should have always been explicitly inlined. It was also only added for debugging, and not in any
arm/arm64: get rid of get_sp()
get_sp() only worked by accident, because gcc inlined calls to it. It should have always been explicitly inlined. It was also only added for debugging, and not in any use now. Furthermore, while we will have need for a "get_sp", we'll add it back with a new name, current_stack_pointer, in order to be consistent with Linux.
Signed-off-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
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a4049322 | 01-Feb-2015 |
Andrew Jones <drjones@redhat.com> |
arm/arm64: processor.[ch] cleanups
Add 'const' to a few global arrays that are constant. Also, no need for default_vector_handler to be static. unittests may want to reset vector handlers to it.
Si
arm/arm64: processor.[ch] cleanups
Add 'const' to a few global arrays that are constant. Also, no need for default_vector_handler to be static. unittests may want to reset vector handlers to it.
Signed-off-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
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db328a24 | 10-Dec-2014 |
Andrew Jones <drjones@redhat.com> |
arm64: enable mmu
Implement asm_mmu_enable and flush_tlb_all, and then make a final change to mmu.c in order to link it into arm64. The final change is to map the code read-only. This is necessary b
arm64: enable mmu
Implement asm_mmu_enable and flush_tlb_all, and then make a final change to mmu.c in order to link it into arm64. The final change is to map the code read-only. This is necessary because armv8 forces all writable code shared between EL1 and EL0 to be PXN.
Signed-off-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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30b1bc86 | 10-Dec-2014 |
Andrew Jones <drjones@redhat.com> |
arm64: import some Linux page table API
Signed-off-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
7ee966e9 | 10-Dec-2014 |
Andrew Jones <drjones@redhat.com> |
arm64: vectors support
Signed-off-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
39ac3f84 | 10-Dec-2014 |
Andrew Jones <drjones@redhat.com> |
arm64: initial drop
This is the initial drop of the arm64 test framework and a first test that just checks that setup completed (a selftest). kvm isn't needed to run this test unless testing with sm
arm64: initial drop
This is the initial drop of the arm64 test framework and a first test that just checks that setup completed (a selftest). kvm isn't needed to run this test unless testing with smp > 1.
Try it out with yum install gcc-aarch64-linux-gnu ./configure --cross-prefix=aarch64-linux-gnu- --arch=arm64 make QEMU=[qemu with aarch64, mach-virt, and chr-testdev] ./run_tests.sh
Signed-off-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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