xref: /kvmtool/riscv/kvm-cpu.c (revision b721ac0ad88a828890a7e44aa7889675152997eb)
1 #include "kvm/kvm-cpu.h"
2 #include "kvm/kvm.h"
3 #include "kvm/virtio.h"
4 #include "kvm/sbi.h"
5 #include "kvm/term.h"
6 
7 #include <asm/ptrace.h>
8 
9 static int debug_fd;
10 
11 void kvm_cpu__set_debug_fd(int fd)
12 {
13 	debug_fd = fd;
14 }
15 
16 int kvm_cpu__get_debug_fd(void)
17 {
18 	return debug_fd;
19 }
20 
21 struct kvm_cpu *kvm_cpu__arch_init(struct kvm *kvm, unsigned long cpu_id)
22 {
23 	struct kvm_cpu *vcpu;
24 	u64 timebase = 0;
25 	unsigned long isa = 0;
26 	int coalesced_offset, mmap_size;
27 	struct kvm_one_reg reg;
28 
29 	vcpu = calloc(1, sizeof(struct kvm_cpu));
30 	if (!vcpu)
31 		return NULL;
32 
33 	vcpu->vcpu_fd = ioctl(kvm->vm_fd, KVM_CREATE_VCPU, cpu_id);
34 	if (vcpu->vcpu_fd < 0)
35 		die_perror("KVM_CREATE_VCPU ioctl");
36 
37 	reg.id = RISCV_CONFIG_REG(isa);
38 	reg.addr = (unsigned long)&isa;
39 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
40 		die("KVM_GET_ONE_REG failed (config.isa)");
41 
42 	reg.id = RISCV_TIMER_REG(frequency);
43 	reg.addr = (unsigned long)&timebase;
44 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
45 		die("KVM_GET_ONE_REG failed (timer.frequency)");
46 
47 	mmap_size = ioctl(kvm->sys_fd, KVM_GET_VCPU_MMAP_SIZE, 0);
48 	if (mmap_size < 0)
49 		die_perror("KVM_GET_VCPU_MMAP_SIZE ioctl");
50 
51 	vcpu->kvm_run = mmap(NULL, mmap_size, PROT_RW, MAP_SHARED,
52 			     vcpu->vcpu_fd, 0);
53 	if (vcpu->kvm_run == MAP_FAILED)
54 		die("unable to mmap vcpu fd");
55 
56 	coalesced_offset = ioctl(kvm->sys_fd, KVM_CHECK_EXTENSION,
57 				 KVM_CAP_COALESCED_MMIO);
58 	if (coalesced_offset)
59 		vcpu->ring = (void *)vcpu->kvm_run +
60 			     (coalesced_offset * PAGE_SIZE);
61 
62 	reg.id = RISCV_CONFIG_REG(isa);
63 	reg.addr = (unsigned long)&isa;
64 	if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, &reg) < 0)
65 		die("KVM_SET_ONE_REG failed (config.isa)");
66 
67 	/* Populate the vcpu structure. */
68 	vcpu->kvm		= kvm;
69 	vcpu->cpu_id		= cpu_id;
70 	vcpu->riscv_isa		= isa;
71 	vcpu->riscv_xlen	= __riscv_xlen;
72 	vcpu->riscv_timebase	= timebase;
73 	vcpu->is_running	= true;
74 
75 	return vcpu;
76 }
77 
78 void kvm_cpu__arch_nmi(struct kvm_cpu *cpu)
79 {
80 }
81 
82 void kvm_cpu__delete(struct kvm_cpu *vcpu)
83 {
84 	free(vcpu);
85 }
86 
87 static bool kvm_cpu_riscv_sbi(struct kvm_cpu *vcpu)
88 {
89 	char ch;
90 	bool ret = true;
91 	int dfd = kvm_cpu__get_debug_fd();
92 
93 	switch (vcpu->kvm_run->riscv_sbi.extension_id) {
94 	case SBI_EXT_0_1_CONSOLE_PUTCHAR:
95 		ch = vcpu->kvm_run->riscv_sbi.args[0];
96 		term_putc(&ch, 1, 0);
97 		vcpu->kvm_run->riscv_sbi.ret[0] = 0;
98 		break;
99 	case SBI_EXT_0_1_CONSOLE_GETCHAR:
100 		if (term_readable(0))
101 			vcpu->kvm_run->riscv_sbi.ret[0] =
102 					term_getc(vcpu->kvm, 0);
103 		else
104 			vcpu->kvm_run->riscv_sbi.ret[0] = SBI_ERR_FAILURE;
105 		break;
106 	default:
107 		dprintf(dfd, "Unhandled SBI call\n");
108 		dprintf(dfd, "extension_id=0x%lx function_id=0x%lx\n",
109 			vcpu->kvm_run->riscv_sbi.extension_id,
110 			vcpu->kvm_run->riscv_sbi.function_id);
111 		dprintf(dfd, "args[0]=0x%lx args[1]=0x%lx\n",
112 			vcpu->kvm_run->riscv_sbi.args[0],
113 			vcpu->kvm_run->riscv_sbi.args[1]);
114 		dprintf(dfd, "args[2]=0x%lx args[3]=0x%lx\n",
115 			vcpu->kvm_run->riscv_sbi.args[2],
116 			vcpu->kvm_run->riscv_sbi.args[3]);
117 		dprintf(dfd, "args[4]=0x%lx args[5]=0x%lx\n",
118 			vcpu->kvm_run->riscv_sbi.args[4],
119 			vcpu->kvm_run->riscv_sbi.args[5]);
120 		ret = false;
121 		break;
122 	};
123 
124 	return ret;
125 }
126 
127 bool kvm_cpu__handle_exit(struct kvm_cpu *vcpu)
128 {
129 	switch (vcpu->kvm_run->exit_reason) {
130 	case KVM_EXIT_RISCV_SBI:
131 		return kvm_cpu_riscv_sbi(vcpu);
132 	default:
133 		break;
134 	};
135 
136 	return false;
137 }
138 
139 void kvm_cpu__show_page_tables(struct kvm_cpu *vcpu)
140 {
141 }
142 
143 void kvm_cpu__reset_vcpu(struct kvm_cpu *vcpu)
144 {
145 	struct kvm *kvm = vcpu->kvm;
146 	struct kvm_mp_state mp_state;
147 	struct kvm_one_reg reg;
148 	unsigned long data;
149 
150 	if (ioctl(vcpu->vcpu_fd, KVM_GET_MP_STATE, &mp_state) < 0)
151 		die_perror("KVM_GET_MP_STATE failed");
152 
153 	/*
154 	 * If MP state is stopped then it means Linux KVM RISC-V emulates
155 	 * SBI v0.2 (or higher) with HART power managment and give VCPU
156 	 * will power-up at boot-time by boot VCPU. For such VCPU, we
157 	 * don't update PC, A0 and A1 here.
158 	 */
159 	if (mp_state.mp_state == KVM_MP_STATE_STOPPED)
160 		return;
161 
162 	reg.addr = (unsigned long)&data;
163 
164 	data	= kvm->arch.kern_guest_start;
165 	reg.id	= RISCV_CORE_REG(regs.pc);
166 	if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, &reg) < 0)
167 		die_perror("KVM_SET_ONE_REG failed (pc)");
168 
169 	data	= vcpu->cpu_id;
170 	reg.id	= RISCV_CORE_REG(regs.a0);
171 	if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, &reg) < 0)
172 		die_perror("KVM_SET_ONE_REG failed (a0)");
173 
174 	data	= kvm->arch.dtb_guest_start;
175 	reg.id	= RISCV_CORE_REG(regs.a1);
176 	if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, &reg) < 0)
177 		die_perror("KVM_SET_ONE_REG failed (a1)");
178 }
179 
180 int kvm_cpu__get_endianness(struct kvm_cpu *vcpu)
181 {
182 	return VIRTIO_ENDIAN_LE;
183 }
184 
185 void kvm_cpu__show_code(struct kvm_cpu *vcpu)
186 {
187 	struct kvm_one_reg reg;
188 	unsigned long data;
189 	int debug_fd = kvm_cpu__get_debug_fd();
190 
191 	reg.addr = (unsigned long)&data;
192 
193 	dprintf(debug_fd, "\n*PC:\n");
194 	reg.id = RISCV_CORE_REG(regs.pc);
195 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
196 		die("KVM_GET_ONE_REG failed (show_code @ PC)");
197 
198 	kvm__dump_mem(vcpu->kvm, data, 32, debug_fd);
199 
200 	dprintf(debug_fd, "\n*RA:\n");
201 	reg.id = RISCV_CORE_REG(regs.ra);
202 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
203 		die("KVM_GET_ONE_REG failed (show_code @ RA)");
204 
205 	kvm__dump_mem(vcpu->kvm, data, 32, debug_fd);
206 }
207 
208 static void kvm_cpu__show_csrs(struct kvm_cpu *vcpu)
209 {
210 	struct kvm_one_reg reg;
211 	struct kvm_riscv_csr csr;
212 	unsigned long data;
213 	int debug_fd = kvm_cpu__get_debug_fd();
214 
215 	reg.addr = (unsigned long)&data;
216 	dprintf(debug_fd, "\n Control Status Registers:\n");
217 	dprintf(debug_fd,   " ------------------------\n");
218 
219 	reg.id		= RISCV_CSR_REG(sstatus);
220 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
221 		die("KVM_GET_ONE_REG failed (sstatus)");
222 	csr.sstatus = data;
223 
224 	reg.id		= RISCV_CSR_REG(sie);
225 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
226 		die("KVM_GET_ONE_REG failed (sie)");
227 	csr.sie = data;
228 
229 	reg.id		= RISCV_CSR_REG(stvec);
230 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
231 		die("KVM_GET_ONE_REG failed (stvec)");
232 	csr.stvec = data;
233 
234 	reg.id		= RISCV_CSR_REG(sip);
235 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
236 		die("KVM_GET_ONE_REG failed (sip)");
237 	csr.sip = data;
238 
239 	reg.id		= RISCV_CSR_REG(satp);
240 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
241 		die("KVM_GET_ONE_REG failed (satp)");
242 	csr.satp = data;
243 
244 	reg.id		= RISCV_CSR_REG(stval);
245 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
246 		die("KVM_GET_ONE_REG failed (stval)");
247 	csr.stval = data;
248 
249 	reg.id		= RISCV_CSR_REG(scause);
250 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
251 		die("KVM_GET_ONE_REG failed (SCAUSE)");
252 	csr.scause = data;
253 
254 	reg.id		= RISCV_CSR_REG(sscratch);
255 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
256 		die("KVM_GET_ONE_REG failed (sscartch)");
257 	csr.sscratch = data;
258 	dprintf(debug_fd, " SSTATUS:  0x%016lx\n", csr.sstatus);
259 	dprintf(debug_fd, " SIE:      0x%016lx\n", csr.sie);
260 	dprintf(debug_fd, " STVEC:    0x%016lx\n", csr.stvec);
261 	dprintf(debug_fd, " SIP:      0x%016lx\n", csr.sip);
262 	dprintf(debug_fd, " SATP:     0x%016lx\n", csr.satp);
263 	dprintf(debug_fd, " STVAL:    0x%016lx\n", csr.stval);
264 	dprintf(debug_fd, " SCAUSE:   0x%016lx\n", csr.scause);
265 	dprintf(debug_fd, " SSCRATCH: 0x%016lx\n", csr.sscratch);
266 }
267 
268 void kvm_cpu__show_registers(struct kvm_cpu *vcpu)
269 {
270 	struct kvm_one_reg reg;
271 	unsigned long data;
272 	int debug_fd = kvm_cpu__get_debug_fd();
273 	struct kvm_riscv_core core;
274 
275 	reg.addr = (unsigned long)&data;
276 
277 	reg.id		= RISCV_CORE_REG(mode);
278 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
279 		die("KVM_GET_ONE_REG failed (mode)");
280 	core.mode = data;
281 
282 	reg.id		= RISCV_CORE_REG(regs.pc);
283 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
284 		die("KVM_GET_ONE_REG failed (pc)");
285 	core.regs.pc = data;
286 
287 	reg.id		= RISCV_CORE_REG(regs.ra);
288 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
289 		die("KVM_GET_ONE_REG failed (ra)");
290 	core.regs.ra = data;
291 
292 	reg.id		= RISCV_CORE_REG(regs.sp);
293 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
294 		die("KVM_GET_ONE_REG failed (sp)");
295 	core.regs.sp = data;
296 
297 	reg.id		= RISCV_CORE_REG(regs.gp);
298 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
299 		die("KVM_GET_ONE_REG failed (gp)");
300 	core.regs.gp = data;
301 
302 	reg.id		= RISCV_CORE_REG(regs.tp);
303 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
304 		die("KVM_GET_ONE_REG failed (tp)");
305 	core.regs.tp = data;
306 
307 	reg.id		= RISCV_CORE_REG(regs.t0);
308 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
309 		die("KVM_GET_ONE_REG failed (t0)");
310 	core.regs.t0 = data;
311 
312 	reg.id		= RISCV_CORE_REG(regs.t1);
313 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
314 		die("KVM_GET_ONE_REG failed (t1)");
315 	core.regs.t1 = data;
316 
317 	reg.id		= RISCV_CORE_REG(regs.t2);
318 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
319 		die("KVM_GET_ONE_REG failed (t2)");
320 	core.regs.t2 = data;
321 
322 	reg.id		= RISCV_CORE_REG(regs.s0);
323 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
324 		die("KVM_GET_ONE_REG failed (s0)");
325 	core.regs.s0 = data;
326 
327 	reg.id		= RISCV_CORE_REG(regs.s1);
328 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
329 		die("KVM_GET_ONE_REG failed (s1)");
330 	core.regs.s1 = data;
331 
332 	reg.id		= RISCV_CORE_REG(regs.a0);
333 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
334 		die("KVM_GET_ONE_REG failed (a0)");
335 	core.regs.a0 = data;
336 
337 	reg.id		= RISCV_CORE_REG(regs.a1);
338 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
339 		die("KVM_GET_ONE_REG failed (a1)");
340 	core.regs.a1 = data;
341 
342 	reg.id		= RISCV_CORE_REG(regs.a2);
343 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
344 		die("KVM_GET_ONE_REG failed (a2)");
345 	core.regs.a2 = data;
346 
347 	reg.id		= RISCV_CORE_REG(regs.a3);
348 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
349 		die("KVM_GET_ONE_REG failed (a3)");
350 	core.regs.a3 = data;
351 
352 	reg.id		= RISCV_CORE_REG(regs.a4);
353 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
354 		die("KVM_GET_ONE_REG failed (a4)");
355 	core.regs.a4 = data;
356 
357 	reg.id		= RISCV_CORE_REG(regs.a5);
358 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
359 		die("KVM_GET_ONE_REG failed (a5)");
360 	core.regs.a5 = data;
361 
362 	reg.id		= RISCV_CORE_REG(regs.a6);
363 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
364 		die("KVM_GET_ONE_REG failed (a6)");
365 	core.regs.a6 = data;
366 
367 	reg.id		= RISCV_CORE_REG(regs.a7);
368 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
369 		die("KVM_GET_ONE_REG failed (a7)");
370 	core.regs.a7 = data;
371 
372 	reg.id		= RISCV_CORE_REG(regs.s2);
373 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
374 		die("KVM_GET_ONE_REG failed (s2)");
375 	core.regs.s2 = data;
376 
377 	reg.id		= RISCV_CORE_REG(regs.s3);
378 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
379 		die("KVM_GET_ONE_REG failed (s3)");
380 	core.regs.s3 = data;
381 
382 	reg.id		= RISCV_CORE_REG(regs.s4);
383 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
384 		die("KVM_GET_ONE_REG failed (s4)");
385 	core.regs.s4 = data;
386 
387 	reg.id		= RISCV_CORE_REG(regs.s5);
388 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
389 		die("KVM_GET_ONE_REG failed (s5)");
390 	core.regs.s5 = data;
391 
392 	reg.id		= RISCV_CORE_REG(regs.s6);
393 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
394 		die("KVM_GET_ONE_REG failed (s6)");
395 	core.regs.s6 = data;
396 
397 	reg.id		= RISCV_CORE_REG(regs.s7);
398 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
399 		die("KVM_GET_ONE_REG failed (s7)");
400 	core.regs.s7 = data;
401 
402 	reg.id		= RISCV_CORE_REG(regs.s8);
403 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
404 		die("KVM_GET_ONE_REG failed (s8)");
405 	core.regs.s8 = data;
406 
407 	reg.id		= RISCV_CORE_REG(regs.s9);
408 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
409 		die("KVM_GET_ONE_REG failed (s9)");
410 	core.regs.s9 = data;
411 
412 	reg.id		= RISCV_CORE_REG(regs.s10);
413 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
414 		die("KVM_GET_ONE_REG failed (s10)");
415 	core.regs.s10 = data;
416 
417 	reg.id		= RISCV_CORE_REG(regs.s11);
418 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
419 		die("KVM_GET_ONE_REG failed (s11)");
420 	core.regs.s11 = data;
421 
422 	reg.id		= RISCV_CORE_REG(regs.t3);
423 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
424 		die("KVM_GET_ONE_REG failed (t3)");
425 	core.regs.t3 = data;
426 
427 	reg.id		= RISCV_CORE_REG(regs.t4);
428 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
429 		die("KVM_GET_ONE_REG failed (t4)");
430 	core.regs.t4 = data;
431 
432 	reg.id		= RISCV_CORE_REG(regs.t5);
433 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
434 		die("KVM_GET_ONE_REG failed (t5)");
435 	core.regs.t5 = data;
436 
437 	reg.id		= RISCV_CORE_REG(regs.t6);
438 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
439 		die("KVM_GET_ONE_REG failed (t6)");
440 	core.regs.t6 = data;
441 
442 	dprintf(debug_fd, "\n General Purpose Registers:\n");
443 	dprintf(debug_fd,   " -------------------------\n");
444 	dprintf(debug_fd, " MODE:  0x%lx\n", data);
445 	dprintf(debug_fd, " PC: 0x%016lx   RA: 0x%016lx SP: 0x%016lx GP: 0x%016lx\n",
446 		core.regs.pc, core.regs.ra, core.regs.sp, core.regs.gp);
447 	dprintf(debug_fd, " TP: 0x%016lx   T0: 0x%016lx T1: 0x%016lx T2: 0x%016lx\n",
448 		core.regs.tp, core.regs.t0, core.regs.t1, core.regs.t2);
449 	dprintf(debug_fd, " S0: 0x%016lx   S1: 0x%016lx A0: 0x%016lx A1: 0x%016lx\n",
450 		core.regs.s0, core.regs.s1, core.regs.a0, core.regs.a1);
451 	dprintf(debug_fd, " A2: 0x%016lx   A3: 0x%016lx A4: 0x%016lx A5: 0x%016lx\n",
452 		core.regs.a2, core.regs.a3, core.regs.a4, core.regs.a5);
453 	dprintf(debug_fd, " A6: 0x%016lx   A7: 0x%016lx S2: 0x%016lx S3: 0x%016lx\n",
454 		core.regs.a6, core.regs.a7, core.regs.s2, core.regs.s3);
455 	dprintf(debug_fd, " S4: 0x%016lx   S5: 0x%016lx S6: 0x%016lx S7: 0x%016lx\n",
456 		core.regs.s4, core.regs.s5, core.regs.s6, core.regs.s7);
457 	dprintf(debug_fd, " S8: 0x%016lx   S9: 0x%016lx S10: 0x%016lx S11: 0x%016lx\n",
458 		core.regs.s8, core.regs.s9, core.regs.s10, core.regs.s11);
459 	dprintf(debug_fd, " T3: 0x%016lx   T4: 0x%016lx T5: 0x%016lx T6: 0x%016lx\n",
460 		core.regs.t3, core.regs.t4, core.regs.t5, core.regs.t6);
461 
462 	kvm_cpu__show_csrs(vcpu);
463 }
464