1 #include "kvm/csr.h"
2 #include "kvm/kvm-cpu.h"
3 #include "kvm/kvm.h"
4 #include "kvm/virtio.h"
5 #include "kvm/sbi.h"
6 #include "kvm/term.h"
7
8 #include <asm/ptrace.h>
9
10 static int debug_fd;
11
kvm_cpu__set_debug_fd(int fd)12 void kvm_cpu__set_debug_fd(int fd)
13 {
14 debug_fd = fd;
15 }
16
kvm_cpu__get_debug_fd(void)17 int kvm_cpu__get_debug_fd(void)
18 {
19 return debug_fd;
20 }
21
kvm_cpu__arch_init(struct kvm * kvm,unsigned long cpu_id)22 struct kvm_cpu *kvm_cpu__arch_init(struct kvm *kvm, unsigned long cpu_id)
23 {
24 struct kvm_cpu *vcpu;
25 u64 timebase = 0;
26 unsigned long isa = 0, id = 0;
27 unsigned long masks[KVM_REG_RISCV_SBI_MULTI_REG_LAST + 1] = { 0 };
28 int i, coalesced_offset, mmap_size;
29 struct kvm_one_reg reg;
30
31 vcpu = calloc(1, sizeof(struct kvm_cpu));
32 if (!vcpu)
33 return NULL;
34
35 vcpu->vcpu_fd = ioctl(kvm->vm_fd, KVM_CREATE_VCPU, cpu_id);
36 if (vcpu->vcpu_fd < 0)
37 die_perror("KVM_CREATE_VCPU ioctl");
38
39 reg.id = RISCV_CONFIG_REG(isa);
40 reg.addr = (unsigned long)&isa;
41 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
42 die("KVM_GET_ONE_REG failed (config.isa)");
43
44 reg.id = RISCV_TIMER_REG(frequency);
45 reg.addr = (unsigned long)&timebase;
46 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
47 die("KVM_GET_ONE_REG failed (timer.frequency)");
48
49 mmap_size = ioctl(kvm->sys_fd, KVM_GET_VCPU_MMAP_SIZE, 0);
50 if (mmap_size < 0)
51 die_perror("KVM_GET_VCPU_MMAP_SIZE ioctl");
52
53 vcpu->kvm_run = mmap(NULL, mmap_size, PROT_RW, MAP_SHARED,
54 vcpu->vcpu_fd, 0);
55 if (vcpu->kvm_run == MAP_FAILED)
56 die("unable to mmap vcpu fd");
57
58 coalesced_offset = ioctl(kvm->sys_fd, KVM_CHECK_EXTENSION,
59 KVM_CAP_COALESCED_MMIO);
60 if (coalesced_offset)
61 vcpu->ring = (void *)vcpu->kvm_run +
62 (coalesced_offset * PAGE_SIZE);
63
64 reg.id = RISCV_CONFIG_REG(isa);
65 reg.addr = (unsigned long)&isa;
66 if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®) < 0)
67 die("KVM_SET_ONE_REG failed (config.isa)");
68
69 if (kvm->cfg.arch.custom_mvendorid) {
70 id = kvm->cfg.arch.custom_mvendorid;
71 reg.id = RISCV_CONFIG_REG(mvendorid);
72 reg.addr = (unsigned long)&id;
73 if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®) < 0)
74 die("KVM_SET_ONE_REG failed (config.mvendorid)");
75 }
76
77 if (kvm->cfg.arch.custom_marchid) {
78 id = kvm->cfg.arch.custom_marchid;
79 reg.id = RISCV_CONFIG_REG(marchid);
80 reg.addr = (unsigned long)&id;
81 if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®) < 0)
82 die("KVM_SET_ONE_REG failed (config.marchid)");
83 }
84
85 if (kvm->cfg.arch.custom_mimpid) {
86 id = kvm->cfg.arch.custom_mimpid;
87 reg.id = RISCV_CONFIG_REG(mimpid);
88 reg.addr = (unsigned long)&id;
89 if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®) < 0)
90 die("KVM_SET_ONE_REG failed (config.mimpid)");
91 }
92
93 for (i = 0; i < KVM_RISCV_SBI_EXT_MAX; i++) {
94 if (!kvm->cfg.arch.sbi_ext_disabled[i])
95 continue;
96 masks[KVM_REG_RISCV_SBI_MULTI_REG(i)] |=
97 KVM_REG_RISCV_SBI_MULTI_MASK(i);
98 }
99 for (i = 0; i <= KVM_REG_RISCV_SBI_MULTI_REG_LAST; i++) {
100 if (!masks[i])
101 continue;
102
103 reg.id = RISCV_SBI_EXT_REG(KVM_REG_RISCV_SBI_MULTI_DIS, i);
104 reg.addr = (unsigned long)&masks[i];
105 if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®) < 0)
106 die("KVM_SET_ONE_REG failed (sbi_ext %d)", i);
107 }
108
109 /* Force enable SBI debug console if not disabled from command line */
110 if (!kvm->cfg.arch.sbi_ext_disabled[KVM_RISCV_SBI_EXT_DBCN]) {
111 id = 1;
112 reg.id = RISCV_SBI_EXT_REG(KVM_REG_RISCV_SBI_SINGLE,
113 KVM_RISCV_SBI_EXT_DBCN);
114 reg.addr = (unsigned long)&id;
115 if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®) < 0)
116 pr_warning("KVM_SET_ONE_REG failed (sbi_ext %d)",
117 KVM_RISCV_SBI_EXT_DBCN);
118 }
119
120 /* Populate the vcpu structure. */
121 vcpu->kvm = kvm;
122 vcpu->cpu_id = cpu_id;
123 vcpu->riscv_isa = isa;
124 vcpu->riscv_xlen = __riscv_xlen;
125 vcpu->riscv_timebase = timebase;
126 vcpu->is_running = true;
127
128 return vcpu;
129 }
130
kvm_cpu__arch_nmi(struct kvm_cpu * cpu)131 void kvm_cpu__arch_nmi(struct kvm_cpu *cpu)
132 {
133 }
134
kvm_cpu__delete(struct kvm_cpu * vcpu)135 void kvm_cpu__delete(struct kvm_cpu *vcpu)
136 {
137 free(vcpu);
138 }
139
kvm_cpu_riscv_sbi(struct kvm_cpu * vcpu)140 static bool kvm_cpu_riscv_sbi(struct kvm_cpu *vcpu)
141 {
142 char ch;
143 u64 addr;
144 bool ret = true;
145 char *str_start, *str_end;
146 int dfd = kvm_cpu__get_debug_fd();
147
148 switch (vcpu->kvm_run->riscv_sbi.extension_id) {
149 case SBI_EXT_0_1_CONSOLE_PUTCHAR:
150 ch = vcpu->kvm_run->riscv_sbi.args[0];
151 term_putc(&ch, 1, 0);
152 vcpu->kvm_run->riscv_sbi.ret[0] = 0;
153 break;
154 case SBI_EXT_0_1_CONSOLE_GETCHAR:
155 if (term_readable(0))
156 vcpu->kvm_run->riscv_sbi.ret[0] =
157 term_getc(vcpu->kvm, 0);
158 else
159 vcpu->kvm_run->riscv_sbi.ret[0] = SBI_ERR_FAILURE;
160 break;
161 case SBI_EXT_DBCN:
162 switch (vcpu->kvm_run->riscv_sbi.function_id) {
163 case SBI_EXT_DBCN_CONSOLE_WRITE:
164 case SBI_EXT_DBCN_CONSOLE_READ:
165 vcpu->kvm_run->riscv_sbi.ret[0] = SBI_SUCCESS;
166 addr = vcpu->kvm_run->riscv_sbi.args[1];
167 #if __riscv_xlen == 32
168 addr |= (u64)vcpu->kvm_run->riscv_sbi.args[2] << 32;
169 #endif
170 if (!vcpu->kvm_run->riscv_sbi.args[0])
171 break;
172 str_start = guest_flat_to_host(vcpu->kvm, addr);
173 addr += vcpu->kvm_run->riscv_sbi.args[0] - 1;
174 str_end = guest_flat_to_host(vcpu->kvm, addr);
175 if (!str_start || !str_end) {
176 vcpu->kvm_run->riscv_sbi.ret[0] =
177 SBI_ERR_INVALID_PARAM;
178 break;
179 }
180 vcpu->kvm_run->riscv_sbi.ret[1] = 0;
181 while (str_start <= str_end) {
182 if (vcpu->kvm_run->riscv_sbi.function_id ==
183 SBI_EXT_DBCN_CONSOLE_WRITE) {
184 term_putc(str_start, 1, 0);
185 } else {
186 if (!term_readable(0))
187 break;
188 *str_start = term_getc(vcpu->kvm, 0);
189 }
190 vcpu->kvm_run->riscv_sbi.ret[1]++;
191 str_start++;
192 }
193 break;
194 case SBI_EXT_DBCN_CONSOLE_WRITE_BYTE:
195 ch = vcpu->kvm_run->riscv_sbi.args[0];
196 term_putc(&ch, 1, 0);
197 vcpu->kvm_run->riscv_sbi.ret[0] = 0;
198 vcpu->kvm_run->riscv_sbi.ret[1] = 0;
199 break;
200 default:
201 vcpu->kvm_run->riscv_sbi.ret[0] =
202 SBI_ERR_NOT_SUPPORTED;
203 break;
204 }
205 break;
206 default:
207 dprintf(dfd, "Unhandled SBI call\n");
208 dprintf(dfd, "extension_id=0x%lx function_id=0x%lx\n",
209 vcpu->kvm_run->riscv_sbi.extension_id,
210 vcpu->kvm_run->riscv_sbi.function_id);
211 dprintf(dfd, "args[0]=0x%lx args[1]=0x%lx\n",
212 vcpu->kvm_run->riscv_sbi.args[0],
213 vcpu->kvm_run->riscv_sbi.args[1]);
214 dprintf(dfd, "args[2]=0x%lx args[3]=0x%lx\n",
215 vcpu->kvm_run->riscv_sbi.args[2],
216 vcpu->kvm_run->riscv_sbi.args[3]);
217 dprintf(dfd, "args[4]=0x%lx args[5]=0x%lx\n",
218 vcpu->kvm_run->riscv_sbi.args[4],
219 vcpu->kvm_run->riscv_sbi.args[5]);
220 ret = false;
221 break;
222 };
223
224 return ret;
225 }
226
kvm_cpu_riscv_csr(struct kvm_cpu * vcpu)227 static bool kvm_cpu_riscv_csr(struct kvm_cpu *vcpu)
228 {
229 int dfd = kvm_cpu__get_debug_fd();
230 bool ret = true;
231
232 switch (vcpu->kvm_run->riscv_csr.csr_num) {
233 case CSR_SEED:
234 /*
235 * We ignore the new_value and write_mask and simply
236 * return a random value as SEED.
237 */
238 vcpu->kvm_run->riscv_csr.ret_value = SEED_OPST_ES16;
239 vcpu->kvm_run->riscv_csr.ret_value |= rand() & SEED_ENTROPY_MASK;
240 break;
241 default:
242 dprintf(dfd, "Unhandled CSR access\n");
243 dprintf(dfd, "csr_num=0x%lx new_value=0x%lx\n",
244 vcpu->kvm_run->riscv_csr.csr_num,
245 vcpu->kvm_run->riscv_csr.new_value);
246 dprintf(dfd, "write_mask=0x%lx ret_value=0x%lx\n",
247 vcpu->kvm_run->riscv_csr.write_mask,
248 vcpu->kvm_run->riscv_csr.ret_value);
249 ret = false;
250 break;
251 }
252
253 return ret;
254 }
255
kvm_cpu__handle_exit(struct kvm_cpu * vcpu)256 bool kvm_cpu__handle_exit(struct kvm_cpu *vcpu)
257 {
258 switch (vcpu->kvm_run->exit_reason) {
259 case KVM_EXIT_RISCV_SBI:
260 return kvm_cpu_riscv_sbi(vcpu);
261 case KVM_EXIT_RISCV_CSR:
262 return kvm_cpu_riscv_csr(vcpu);
263 default:
264 break;
265 };
266
267 return false;
268 }
269
kvm_cpu__show_page_tables(struct kvm_cpu * vcpu)270 void kvm_cpu__show_page_tables(struct kvm_cpu *vcpu)
271 {
272 }
273
kvm_cpu__reset_vcpu(struct kvm_cpu * vcpu)274 void kvm_cpu__reset_vcpu(struct kvm_cpu *vcpu)
275 {
276 struct kvm *kvm = vcpu->kvm;
277 struct kvm_mp_state mp_state;
278 struct kvm_one_reg reg;
279 unsigned long data;
280
281 if (ioctl(vcpu->vcpu_fd, KVM_GET_MP_STATE, &mp_state) < 0)
282 die_perror("KVM_GET_MP_STATE failed");
283
284 /*
285 * If MP state is stopped then it means Linux KVM RISC-V emulates
286 * SBI v0.2 (or higher) with HART power managment and give VCPU
287 * will power-up at boot-time by boot VCPU. For such VCPU, we
288 * don't update PC, A0 and A1 here.
289 */
290 if (mp_state.mp_state == KVM_MP_STATE_STOPPED)
291 return;
292
293 reg.addr = (unsigned long)&data;
294
295 data = kvm->arch.kern_guest_start;
296 reg.id = RISCV_CORE_REG(regs.pc);
297 if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®) < 0)
298 die_perror("KVM_SET_ONE_REG failed (pc)");
299
300 data = vcpu->cpu_id;
301 reg.id = RISCV_CORE_REG(regs.a0);
302 if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®) < 0)
303 die_perror("KVM_SET_ONE_REG failed (a0)");
304
305 data = kvm->arch.dtb_guest_start;
306 reg.id = RISCV_CORE_REG(regs.a1);
307 if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®) < 0)
308 die_perror("KVM_SET_ONE_REG failed (a1)");
309 }
310
kvm_cpu__get_endianness(struct kvm_cpu * vcpu)311 int kvm_cpu__get_endianness(struct kvm_cpu *vcpu)
312 {
313 return VIRTIO_ENDIAN_LE;
314 }
315
kvm_cpu__show_code(struct kvm_cpu * vcpu)316 void kvm_cpu__show_code(struct kvm_cpu *vcpu)
317 {
318 struct kvm_one_reg reg;
319 unsigned long data;
320 int debug_fd = kvm_cpu__get_debug_fd();
321
322 reg.addr = (unsigned long)&data;
323
324 dprintf(debug_fd, "\n*PC:\n");
325 reg.id = RISCV_CORE_REG(regs.pc);
326 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
327 die("KVM_GET_ONE_REG failed (show_code @ PC)");
328
329 kvm__dump_mem(vcpu->kvm, data, 32, debug_fd);
330
331 dprintf(debug_fd, "\n*RA:\n");
332 reg.id = RISCV_CORE_REG(regs.ra);
333 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
334 die("KVM_GET_ONE_REG failed (show_code @ RA)");
335
336 kvm__dump_mem(vcpu->kvm, data, 32, debug_fd);
337 }
338
kvm_cpu__show_csrs(struct kvm_cpu * vcpu)339 static void kvm_cpu__show_csrs(struct kvm_cpu *vcpu)
340 {
341 struct kvm_one_reg reg;
342 struct kvm_riscv_csr csr;
343 unsigned long data;
344 int debug_fd = kvm_cpu__get_debug_fd();
345
346 reg.addr = (unsigned long)&data;
347 dprintf(debug_fd, "\n Control Status Registers:\n");
348 dprintf(debug_fd, " ------------------------\n");
349
350 reg.id = RISCV_CSR_REG(sstatus);
351 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
352 die("KVM_GET_ONE_REG failed (sstatus)");
353 csr.sstatus = data;
354
355 reg.id = RISCV_CSR_REG(sie);
356 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
357 die("KVM_GET_ONE_REG failed (sie)");
358 csr.sie = data;
359
360 reg.id = RISCV_CSR_REG(stvec);
361 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
362 die("KVM_GET_ONE_REG failed (stvec)");
363 csr.stvec = data;
364
365 reg.id = RISCV_CSR_REG(sip);
366 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
367 die("KVM_GET_ONE_REG failed (sip)");
368 csr.sip = data;
369
370 reg.id = RISCV_CSR_REG(satp);
371 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
372 die("KVM_GET_ONE_REG failed (satp)");
373 csr.satp = data;
374
375 reg.id = RISCV_CSR_REG(stval);
376 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
377 die("KVM_GET_ONE_REG failed (stval)");
378 csr.stval = data;
379
380 reg.id = RISCV_CSR_REG(scause);
381 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
382 die("KVM_GET_ONE_REG failed (SCAUSE)");
383 csr.scause = data;
384
385 reg.id = RISCV_CSR_REG(sscratch);
386 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
387 die("KVM_GET_ONE_REG failed (sscartch)");
388 csr.sscratch = data;
389 dprintf(debug_fd, " SSTATUS: 0x%016lx\n", csr.sstatus);
390 dprintf(debug_fd, " SIE: 0x%016lx\n", csr.sie);
391 dprintf(debug_fd, " STVEC: 0x%016lx\n", csr.stvec);
392 dprintf(debug_fd, " SIP: 0x%016lx\n", csr.sip);
393 dprintf(debug_fd, " SATP: 0x%016lx\n", csr.satp);
394 dprintf(debug_fd, " STVAL: 0x%016lx\n", csr.stval);
395 dprintf(debug_fd, " SCAUSE: 0x%016lx\n", csr.scause);
396 dprintf(debug_fd, " SSCRATCH: 0x%016lx\n", csr.sscratch);
397 }
398
kvm_cpu__show_registers(struct kvm_cpu * vcpu)399 void kvm_cpu__show_registers(struct kvm_cpu *vcpu)
400 {
401 struct kvm_one_reg reg;
402 unsigned long data;
403 int debug_fd = kvm_cpu__get_debug_fd();
404 struct kvm_riscv_core core;
405
406 reg.addr = (unsigned long)&data;
407
408 reg.id = RISCV_CORE_REG(mode);
409 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
410 die("KVM_GET_ONE_REG failed (mode)");
411 core.mode = data;
412
413 reg.id = RISCV_CORE_REG(regs.pc);
414 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
415 die("KVM_GET_ONE_REG failed (pc)");
416 core.regs.pc = data;
417
418 reg.id = RISCV_CORE_REG(regs.ra);
419 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
420 die("KVM_GET_ONE_REG failed (ra)");
421 core.regs.ra = data;
422
423 reg.id = RISCV_CORE_REG(regs.sp);
424 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
425 die("KVM_GET_ONE_REG failed (sp)");
426 core.regs.sp = data;
427
428 reg.id = RISCV_CORE_REG(regs.gp);
429 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
430 die("KVM_GET_ONE_REG failed (gp)");
431 core.regs.gp = data;
432
433 reg.id = RISCV_CORE_REG(regs.tp);
434 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
435 die("KVM_GET_ONE_REG failed (tp)");
436 core.regs.tp = data;
437
438 reg.id = RISCV_CORE_REG(regs.t0);
439 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
440 die("KVM_GET_ONE_REG failed (t0)");
441 core.regs.t0 = data;
442
443 reg.id = RISCV_CORE_REG(regs.t1);
444 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
445 die("KVM_GET_ONE_REG failed (t1)");
446 core.regs.t1 = data;
447
448 reg.id = RISCV_CORE_REG(regs.t2);
449 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
450 die("KVM_GET_ONE_REG failed (t2)");
451 core.regs.t2 = data;
452
453 reg.id = RISCV_CORE_REG(regs.s0);
454 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
455 die("KVM_GET_ONE_REG failed (s0)");
456 core.regs.s0 = data;
457
458 reg.id = RISCV_CORE_REG(regs.s1);
459 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
460 die("KVM_GET_ONE_REG failed (s1)");
461 core.regs.s1 = data;
462
463 reg.id = RISCV_CORE_REG(regs.a0);
464 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
465 die("KVM_GET_ONE_REG failed (a0)");
466 core.regs.a0 = data;
467
468 reg.id = RISCV_CORE_REG(regs.a1);
469 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
470 die("KVM_GET_ONE_REG failed (a1)");
471 core.regs.a1 = data;
472
473 reg.id = RISCV_CORE_REG(regs.a2);
474 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
475 die("KVM_GET_ONE_REG failed (a2)");
476 core.regs.a2 = data;
477
478 reg.id = RISCV_CORE_REG(regs.a3);
479 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
480 die("KVM_GET_ONE_REG failed (a3)");
481 core.regs.a3 = data;
482
483 reg.id = RISCV_CORE_REG(regs.a4);
484 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
485 die("KVM_GET_ONE_REG failed (a4)");
486 core.regs.a4 = data;
487
488 reg.id = RISCV_CORE_REG(regs.a5);
489 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
490 die("KVM_GET_ONE_REG failed (a5)");
491 core.regs.a5 = data;
492
493 reg.id = RISCV_CORE_REG(regs.a6);
494 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
495 die("KVM_GET_ONE_REG failed (a6)");
496 core.regs.a6 = data;
497
498 reg.id = RISCV_CORE_REG(regs.a7);
499 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
500 die("KVM_GET_ONE_REG failed (a7)");
501 core.regs.a7 = data;
502
503 reg.id = RISCV_CORE_REG(regs.s2);
504 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
505 die("KVM_GET_ONE_REG failed (s2)");
506 core.regs.s2 = data;
507
508 reg.id = RISCV_CORE_REG(regs.s3);
509 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
510 die("KVM_GET_ONE_REG failed (s3)");
511 core.regs.s3 = data;
512
513 reg.id = RISCV_CORE_REG(regs.s4);
514 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
515 die("KVM_GET_ONE_REG failed (s4)");
516 core.regs.s4 = data;
517
518 reg.id = RISCV_CORE_REG(regs.s5);
519 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
520 die("KVM_GET_ONE_REG failed (s5)");
521 core.regs.s5 = data;
522
523 reg.id = RISCV_CORE_REG(regs.s6);
524 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
525 die("KVM_GET_ONE_REG failed (s6)");
526 core.regs.s6 = data;
527
528 reg.id = RISCV_CORE_REG(regs.s7);
529 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
530 die("KVM_GET_ONE_REG failed (s7)");
531 core.regs.s7 = data;
532
533 reg.id = RISCV_CORE_REG(regs.s8);
534 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
535 die("KVM_GET_ONE_REG failed (s8)");
536 core.regs.s8 = data;
537
538 reg.id = RISCV_CORE_REG(regs.s9);
539 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
540 die("KVM_GET_ONE_REG failed (s9)");
541 core.regs.s9 = data;
542
543 reg.id = RISCV_CORE_REG(regs.s10);
544 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
545 die("KVM_GET_ONE_REG failed (s10)");
546 core.regs.s10 = data;
547
548 reg.id = RISCV_CORE_REG(regs.s11);
549 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
550 die("KVM_GET_ONE_REG failed (s11)");
551 core.regs.s11 = data;
552
553 reg.id = RISCV_CORE_REG(regs.t3);
554 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
555 die("KVM_GET_ONE_REG failed (t3)");
556 core.regs.t3 = data;
557
558 reg.id = RISCV_CORE_REG(regs.t4);
559 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
560 die("KVM_GET_ONE_REG failed (t4)");
561 core.regs.t4 = data;
562
563 reg.id = RISCV_CORE_REG(regs.t5);
564 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
565 die("KVM_GET_ONE_REG failed (t5)");
566 core.regs.t5 = data;
567
568 reg.id = RISCV_CORE_REG(regs.t6);
569 if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
570 die("KVM_GET_ONE_REG failed (t6)");
571 core.regs.t6 = data;
572
573 dprintf(debug_fd, "\n General Purpose Registers:\n");
574 dprintf(debug_fd, " -------------------------\n");
575 dprintf(debug_fd, " MODE: 0x%lx\n", data);
576 dprintf(debug_fd, " PC: 0x%016lx RA: 0x%016lx SP: 0x%016lx GP: 0x%016lx\n",
577 core.regs.pc, core.regs.ra, core.regs.sp, core.regs.gp);
578 dprintf(debug_fd, " TP: 0x%016lx T0: 0x%016lx T1: 0x%016lx T2: 0x%016lx\n",
579 core.regs.tp, core.regs.t0, core.regs.t1, core.regs.t2);
580 dprintf(debug_fd, " S0: 0x%016lx S1: 0x%016lx A0: 0x%016lx A1: 0x%016lx\n",
581 core.regs.s0, core.regs.s1, core.regs.a0, core.regs.a1);
582 dprintf(debug_fd, " A2: 0x%016lx A3: 0x%016lx A4: 0x%016lx A5: 0x%016lx\n",
583 core.regs.a2, core.regs.a3, core.regs.a4, core.regs.a5);
584 dprintf(debug_fd, " A6: 0x%016lx A7: 0x%016lx S2: 0x%016lx S3: 0x%016lx\n",
585 core.regs.a6, core.regs.a7, core.regs.s2, core.regs.s3);
586 dprintf(debug_fd, " S4: 0x%016lx S5: 0x%016lx S6: 0x%016lx S7: 0x%016lx\n",
587 core.regs.s4, core.regs.s5, core.regs.s6, core.regs.s7);
588 dprintf(debug_fd, " S8: 0x%016lx S9: 0x%016lx S10: 0x%016lx S11: 0x%016lx\n",
589 core.regs.s8, core.regs.s9, core.regs.s10, core.regs.s11);
590 dprintf(debug_fd, " T3: 0x%016lx T4: 0x%016lx T5: 0x%016lx T6: 0x%016lx\n",
591 core.regs.t3, core.regs.t4, core.regs.t5, core.regs.t6);
592
593 kvm_cpu__show_csrs(vcpu);
594 }
595