xref: /kvmtool/riscv/kvm-cpu.c (revision 4ddaa4249e0c59a9ef6e09c1e32b042dd01e4c08)
1 #include "kvm/kvm-cpu.h"
2 #include "kvm/kvm.h"
3 #include "kvm/virtio.h"
4 #include "kvm/sbi.h"
5 #include "kvm/term.h"
6 
7 #include <asm/ptrace.h>
8 
9 static int debug_fd;
10 
11 void kvm_cpu__set_debug_fd(int fd)
12 {
13 	debug_fd = fd;
14 }
15 
16 int kvm_cpu__get_debug_fd(void)
17 {
18 	return debug_fd;
19 }
20 
21 struct kvm_cpu *kvm_cpu__arch_init(struct kvm *kvm, unsigned long cpu_id)
22 {
23 	struct kvm_cpu *vcpu;
24 	u64 timebase = 0;
25 	unsigned long isa = 0, id = 0;
26 	unsigned long masks[KVM_REG_RISCV_SBI_MULTI_REG_LAST + 1] = { 0 };
27 	int i, coalesced_offset, mmap_size;
28 	struct kvm_one_reg reg;
29 
30 	vcpu = calloc(1, sizeof(struct kvm_cpu));
31 	if (!vcpu)
32 		return NULL;
33 
34 	vcpu->vcpu_fd = ioctl(kvm->vm_fd, KVM_CREATE_VCPU, cpu_id);
35 	if (vcpu->vcpu_fd < 0)
36 		die_perror("KVM_CREATE_VCPU ioctl");
37 
38 	reg.id = RISCV_CONFIG_REG(isa);
39 	reg.addr = (unsigned long)&isa;
40 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
41 		die("KVM_GET_ONE_REG failed (config.isa)");
42 
43 	reg.id = RISCV_TIMER_REG(frequency);
44 	reg.addr = (unsigned long)&timebase;
45 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
46 		die("KVM_GET_ONE_REG failed (timer.frequency)");
47 
48 	mmap_size = ioctl(kvm->sys_fd, KVM_GET_VCPU_MMAP_SIZE, 0);
49 	if (mmap_size < 0)
50 		die_perror("KVM_GET_VCPU_MMAP_SIZE ioctl");
51 
52 	vcpu->kvm_run = mmap(NULL, mmap_size, PROT_RW, MAP_SHARED,
53 			     vcpu->vcpu_fd, 0);
54 	if (vcpu->kvm_run == MAP_FAILED)
55 		die("unable to mmap vcpu fd");
56 
57 	coalesced_offset = ioctl(kvm->sys_fd, KVM_CHECK_EXTENSION,
58 				 KVM_CAP_COALESCED_MMIO);
59 	if (coalesced_offset)
60 		vcpu->ring = (void *)vcpu->kvm_run +
61 			     (coalesced_offset * PAGE_SIZE);
62 
63 	reg.id = RISCV_CONFIG_REG(isa);
64 	reg.addr = (unsigned long)&isa;
65 	if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, &reg) < 0)
66 		die("KVM_SET_ONE_REG failed (config.isa)");
67 
68 	if (kvm->cfg.arch.custom_mvendorid) {
69 		id = kvm->cfg.arch.custom_mvendorid;
70 		reg.id = RISCV_CONFIG_REG(mvendorid);
71 		reg.addr = (unsigned long)&id;
72 		if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, &reg) < 0)
73 			die("KVM_SET_ONE_REG failed (config.mvendorid)");
74 	}
75 
76 	if (kvm->cfg.arch.custom_marchid) {
77 		id = kvm->cfg.arch.custom_marchid;
78 		reg.id = RISCV_CONFIG_REG(marchid);
79 		reg.addr = (unsigned long)&id;
80 		if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, &reg) < 0)
81 			die("KVM_SET_ONE_REG failed (config.marchid)");
82 	}
83 
84 	if (kvm->cfg.arch.custom_mimpid) {
85 		id = kvm->cfg.arch.custom_mimpid;
86 		reg.id = RISCV_CONFIG_REG(mimpid);
87 		reg.addr = (unsigned long)&id;
88 		if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, &reg) < 0)
89 			die("KVM_SET_ONE_REG failed (config.mimpid)");
90 	}
91 
92 	for (i = 0; i < KVM_RISCV_SBI_EXT_MAX; i++) {
93 		if (!kvm->cfg.arch.sbi_ext_disabled[i])
94 			continue;
95 		masks[KVM_REG_RISCV_SBI_MULTI_REG(i)] |=
96 					KVM_REG_RISCV_SBI_MULTI_MASK(i);
97 	}
98 	for (i = 0; i <= KVM_REG_RISCV_SBI_MULTI_REG_LAST; i++) {
99 		if (!masks[i])
100 			continue;
101 
102 		reg.id = RISCV_SBI_EXT_REG(KVM_REG_RISCV_SBI_MULTI_DIS, i);
103 		reg.addr = (unsigned long)&masks[i];
104 		if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, &reg) < 0)
105 			die("KVM_SET_ONE_REG failed (sbi_ext %d)", i);
106 	}
107 
108 	/* Force enable SBI debug console if not disabled from command line */
109 	if (!kvm->cfg.arch.sbi_ext_disabled[KVM_RISCV_SBI_EXT_DBCN]) {
110 		id = 1;
111 		reg.id = RISCV_SBI_EXT_REG(KVM_REG_RISCV_SBI_SINGLE,
112 					   KVM_RISCV_SBI_EXT_DBCN);
113 		reg.addr = (unsigned long)&id;
114 		if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, &reg) < 0)
115 			pr_warning("KVM_SET_ONE_REG failed (sbi_ext %d)",
116 				   KVM_RISCV_SBI_EXT_DBCN);
117 	}
118 
119 	/* Populate the vcpu structure. */
120 	vcpu->kvm		= kvm;
121 	vcpu->cpu_id		= cpu_id;
122 	vcpu->riscv_isa		= isa;
123 	vcpu->riscv_xlen	= __riscv_xlen;
124 	vcpu->riscv_timebase	= timebase;
125 	vcpu->is_running	= true;
126 
127 	return vcpu;
128 }
129 
130 void kvm_cpu__arch_nmi(struct kvm_cpu *cpu)
131 {
132 }
133 
134 void kvm_cpu__delete(struct kvm_cpu *vcpu)
135 {
136 	free(vcpu);
137 }
138 
139 static bool kvm_cpu_riscv_sbi(struct kvm_cpu *vcpu)
140 {
141 	char ch;
142 	u64 addr;
143 	bool ret = true;
144 	char *str_start, *str_end;
145 	int dfd = kvm_cpu__get_debug_fd();
146 
147 	switch (vcpu->kvm_run->riscv_sbi.extension_id) {
148 	case SBI_EXT_0_1_CONSOLE_PUTCHAR:
149 		ch = vcpu->kvm_run->riscv_sbi.args[0];
150 		term_putc(&ch, 1, 0);
151 		vcpu->kvm_run->riscv_sbi.ret[0] = 0;
152 		break;
153 	case SBI_EXT_0_1_CONSOLE_GETCHAR:
154 		if (term_readable(0))
155 			vcpu->kvm_run->riscv_sbi.ret[0] =
156 					term_getc(vcpu->kvm, 0);
157 		else
158 			vcpu->kvm_run->riscv_sbi.ret[0] = SBI_ERR_FAILURE;
159 		break;
160 	case SBI_EXT_DBCN:
161 		switch (vcpu->kvm_run->riscv_sbi.function_id) {
162 		case SBI_EXT_DBCN_CONSOLE_WRITE:
163 		case SBI_EXT_DBCN_CONSOLE_READ:
164 			addr = vcpu->kvm_run->riscv_sbi.args[1];
165 #if __riscv_xlen == 32
166 			addr |= (u64)vcpu->kvm_run->riscv_sbi.args[2] << 32;
167 #endif
168 			if (!vcpu->kvm_run->riscv_sbi.args[0])
169 				break;
170 			str_start = guest_flat_to_host(vcpu->kvm, addr);
171 			addr += vcpu->kvm_run->riscv_sbi.args[0] - 1;
172 			str_end = guest_flat_to_host(vcpu->kvm, addr);
173 			if (!str_start || !str_end) {
174 				vcpu->kvm_run->riscv_sbi.ret[0] =
175 						SBI_ERR_INVALID_PARAM;
176 				break;
177 			}
178 			vcpu->kvm_run->riscv_sbi.ret[1] = 0;
179 			while (str_start <= str_end) {
180 				if (vcpu->kvm_run->riscv_sbi.function_id ==
181 				    SBI_EXT_DBCN_CONSOLE_WRITE) {
182 					term_putc(str_start, 1, 0);
183 				} else {
184 					if (!term_readable(0))
185 						break;
186 					*str_start = term_getc(vcpu->kvm, 0);
187 				}
188 				vcpu->kvm_run->riscv_sbi.ret[1]++;
189 				str_start++;
190 			}
191 			break;
192 		case SBI_EXT_DBCN_CONSOLE_WRITE_BYTE:
193 			ch = vcpu->kvm_run->riscv_sbi.args[0];
194 			term_putc(&ch, 1, 0);
195 			vcpu->kvm_run->riscv_sbi.ret[0] = 0;
196 			vcpu->kvm_run->riscv_sbi.ret[1] = 0;
197 			break;
198 		default:
199 			vcpu->kvm_run->riscv_sbi.ret[0] =
200 						SBI_ERR_NOT_SUPPORTED;
201 			break;
202 		}
203 		break;
204 	default:
205 		dprintf(dfd, "Unhandled SBI call\n");
206 		dprintf(dfd, "extension_id=0x%lx function_id=0x%lx\n",
207 			vcpu->kvm_run->riscv_sbi.extension_id,
208 			vcpu->kvm_run->riscv_sbi.function_id);
209 		dprintf(dfd, "args[0]=0x%lx args[1]=0x%lx\n",
210 			vcpu->kvm_run->riscv_sbi.args[0],
211 			vcpu->kvm_run->riscv_sbi.args[1]);
212 		dprintf(dfd, "args[2]=0x%lx args[3]=0x%lx\n",
213 			vcpu->kvm_run->riscv_sbi.args[2],
214 			vcpu->kvm_run->riscv_sbi.args[3]);
215 		dprintf(dfd, "args[4]=0x%lx args[5]=0x%lx\n",
216 			vcpu->kvm_run->riscv_sbi.args[4],
217 			vcpu->kvm_run->riscv_sbi.args[5]);
218 		ret = false;
219 		break;
220 	};
221 
222 	return ret;
223 }
224 
225 bool kvm_cpu__handle_exit(struct kvm_cpu *vcpu)
226 {
227 	switch (vcpu->kvm_run->exit_reason) {
228 	case KVM_EXIT_RISCV_SBI:
229 		return kvm_cpu_riscv_sbi(vcpu);
230 	default:
231 		break;
232 	};
233 
234 	return false;
235 }
236 
237 void kvm_cpu__show_page_tables(struct kvm_cpu *vcpu)
238 {
239 }
240 
241 void kvm_cpu__reset_vcpu(struct kvm_cpu *vcpu)
242 {
243 	struct kvm *kvm = vcpu->kvm;
244 	struct kvm_mp_state mp_state;
245 	struct kvm_one_reg reg;
246 	unsigned long data;
247 
248 	if (ioctl(vcpu->vcpu_fd, KVM_GET_MP_STATE, &mp_state) < 0)
249 		die_perror("KVM_GET_MP_STATE failed");
250 
251 	/*
252 	 * If MP state is stopped then it means Linux KVM RISC-V emulates
253 	 * SBI v0.2 (or higher) with HART power managment and give VCPU
254 	 * will power-up at boot-time by boot VCPU. For such VCPU, we
255 	 * don't update PC, A0 and A1 here.
256 	 */
257 	if (mp_state.mp_state == KVM_MP_STATE_STOPPED)
258 		return;
259 
260 	reg.addr = (unsigned long)&data;
261 
262 	data	= kvm->arch.kern_guest_start;
263 	reg.id	= RISCV_CORE_REG(regs.pc);
264 	if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, &reg) < 0)
265 		die_perror("KVM_SET_ONE_REG failed (pc)");
266 
267 	data	= vcpu->cpu_id;
268 	reg.id	= RISCV_CORE_REG(regs.a0);
269 	if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, &reg) < 0)
270 		die_perror("KVM_SET_ONE_REG failed (a0)");
271 
272 	data	= kvm->arch.dtb_guest_start;
273 	reg.id	= RISCV_CORE_REG(regs.a1);
274 	if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, &reg) < 0)
275 		die_perror("KVM_SET_ONE_REG failed (a1)");
276 }
277 
278 int kvm_cpu__get_endianness(struct kvm_cpu *vcpu)
279 {
280 	return VIRTIO_ENDIAN_LE;
281 }
282 
283 void kvm_cpu__show_code(struct kvm_cpu *vcpu)
284 {
285 	struct kvm_one_reg reg;
286 	unsigned long data;
287 	int debug_fd = kvm_cpu__get_debug_fd();
288 
289 	reg.addr = (unsigned long)&data;
290 
291 	dprintf(debug_fd, "\n*PC:\n");
292 	reg.id = RISCV_CORE_REG(regs.pc);
293 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
294 		die("KVM_GET_ONE_REG failed (show_code @ PC)");
295 
296 	kvm__dump_mem(vcpu->kvm, data, 32, debug_fd);
297 
298 	dprintf(debug_fd, "\n*RA:\n");
299 	reg.id = RISCV_CORE_REG(regs.ra);
300 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
301 		die("KVM_GET_ONE_REG failed (show_code @ RA)");
302 
303 	kvm__dump_mem(vcpu->kvm, data, 32, debug_fd);
304 }
305 
306 static void kvm_cpu__show_csrs(struct kvm_cpu *vcpu)
307 {
308 	struct kvm_one_reg reg;
309 	struct kvm_riscv_csr csr;
310 	unsigned long data;
311 	int debug_fd = kvm_cpu__get_debug_fd();
312 
313 	reg.addr = (unsigned long)&data;
314 	dprintf(debug_fd, "\n Control Status Registers:\n");
315 	dprintf(debug_fd,   " ------------------------\n");
316 
317 	reg.id		= RISCV_CSR_REG(sstatus);
318 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
319 		die("KVM_GET_ONE_REG failed (sstatus)");
320 	csr.sstatus = data;
321 
322 	reg.id		= RISCV_CSR_REG(sie);
323 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
324 		die("KVM_GET_ONE_REG failed (sie)");
325 	csr.sie = data;
326 
327 	reg.id		= RISCV_CSR_REG(stvec);
328 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
329 		die("KVM_GET_ONE_REG failed (stvec)");
330 	csr.stvec = data;
331 
332 	reg.id		= RISCV_CSR_REG(sip);
333 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
334 		die("KVM_GET_ONE_REG failed (sip)");
335 	csr.sip = data;
336 
337 	reg.id		= RISCV_CSR_REG(satp);
338 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
339 		die("KVM_GET_ONE_REG failed (satp)");
340 	csr.satp = data;
341 
342 	reg.id		= RISCV_CSR_REG(stval);
343 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
344 		die("KVM_GET_ONE_REG failed (stval)");
345 	csr.stval = data;
346 
347 	reg.id		= RISCV_CSR_REG(scause);
348 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
349 		die("KVM_GET_ONE_REG failed (SCAUSE)");
350 	csr.scause = data;
351 
352 	reg.id		= RISCV_CSR_REG(sscratch);
353 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
354 		die("KVM_GET_ONE_REG failed (sscartch)");
355 	csr.sscratch = data;
356 	dprintf(debug_fd, " SSTATUS:  0x%016lx\n", csr.sstatus);
357 	dprintf(debug_fd, " SIE:      0x%016lx\n", csr.sie);
358 	dprintf(debug_fd, " STVEC:    0x%016lx\n", csr.stvec);
359 	dprintf(debug_fd, " SIP:      0x%016lx\n", csr.sip);
360 	dprintf(debug_fd, " SATP:     0x%016lx\n", csr.satp);
361 	dprintf(debug_fd, " STVAL:    0x%016lx\n", csr.stval);
362 	dprintf(debug_fd, " SCAUSE:   0x%016lx\n", csr.scause);
363 	dprintf(debug_fd, " SSCRATCH: 0x%016lx\n", csr.sscratch);
364 }
365 
366 void kvm_cpu__show_registers(struct kvm_cpu *vcpu)
367 {
368 	struct kvm_one_reg reg;
369 	unsigned long data;
370 	int debug_fd = kvm_cpu__get_debug_fd();
371 	struct kvm_riscv_core core;
372 
373 	reg.addr = (unsigned long)&data;
374 
375 	reg.id		= RISCV_CORE_REG(mode);
376 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
377 		die("KVM_GET_ONE_REG failed (mode)");
378 	core.mode = data;
379 
380 	reg.id		= RISCV_CORE_REG(regs.pc);
381 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
382 		die("KVM_GET_ONE_REG failed (pc)");
383 	core.regs.pc = data;
384 
385 	reg.id		= RISCV_CORE_REG(regs.ra);
386 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
387 		die("KVM_GET_ONE_REG failed (ra)");
388 	core.regs.ra = data;
389 
390 	reg.id		= RISCV_CORE_REG(regs.sp);
391 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
392 		die("KVM_GET_ONE_REG failed (sp)");
393 	core.regs.sp = data;
394 
395 	reg.id		= RISCV_CORE_REG(regs.gp);
396 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
397 		die("KVM_GET_ONE_REG failed (gp)");
398 	core.regs.gp = data;
399 
400 	reg.id		= RISCV_CORE_REG(regs.tp);
401 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
402 		die("KVM_GET_ONE_REG failed (tp)");
403 	core.regs.tp = data;
404 
405 	reg.id		= RISCV_CORE_REG(regs.t0);
406 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
407 		die("KVM_GET_ONE_REG failed (t0)");
408 	core.regs.t0 = data;
409 
410 	reg.id		= RISCV_CORE_REG(regs.t1);
411 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
412 		die("KVM_GET_ONE_REG failed (t1)");
413 	core.regs.t1 = data;
414 
415 	reg.id		= RISCV_CORE_REG(regs.t2);
416 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
417 		die("KVM_GET_ONE_REG failed (t2)");
418 	core.regs.t2 = data;
419 
420 	reg.id		= RISCV_CORE_REG(regs.s0);
421 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
422 		die("KVM_GET_ONE_REG failed (s0)");
423 	core.regs.s0 = data;
424 
425 	reg.id		= RISCV_CORE_REG(regs.s1);
426 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
427 		die("KVM_GET_ONE_REG failed (s1)");
428 	core.regs.s1 = data;
429 
430 	reg.id		= RISCV_CORE_REG(regs.a0);
431 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
432 		die("KVM_GET_ONE_REG failed (a0)");
433 	core.regs.a0 = data;
434 
435 	reg.id		= RISCV_CORE_REG(regs.a1);
436 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
437 		die("KVM_GET_ONE_REG failed (a1)");
438 	core.regs.a1 = data;
439 
440 	reg.id		= RISCV_CORE_REG(regs.a2);
441 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
442 		die("KVM_GET_ONE_REG failed (a2)");
443 	core.regs.a2 = data;
444 
445 	reg.id		= RISCV_CORE_REG(regs.a3);
446 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
447 		die("KVM_GET_ONE_REG failed (a3)");
448 	core.regs.a3 = data;
449 
450 	reg.id		= RISCV_CORE_REG(regs.a4);
451 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
452 		die("KVM_GET_ONE_REG failed (a4)");
453 	core.regs.a4 = data;
454 
455 	reg.id		= RISCV_CORE_REG(regs.a5);
456 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
457 		die("KVM_GET_ONE_REG failed (a5)");
458 	core.regs.a5 = data;
459 
460 	reg.id		= RISCV_CORE_REG(regs.a6);
461 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
462 		die("KVM_GET_ONE_REG failed (a6)");
463 	core.regs.a6 = data;
464 
465 	reg.id		= RISCV_CORE_REG(regs.a7);
466 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
467 		die("KVM_GET_ONE_REG failed (a7)");
468 	core.regs.a7 = data;
469 
470 	reg.id		= RISCV_CORE_REG(regs.s2);
471 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
472 		die("KVM_GET_ONE_REG failed (s2)");
473 	core.regs.s2 = data;
474 
475 	reg.id		= RISCV_CORE_REG(regs.s3);
476 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
477 		die("KVM_GET_ONE_REG failed (s3)");
478 	core.regs.s3 = data;
479 
480 	reg.id		= RISCV_CORE_REG(regs.s4);
481 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
482 		die("KVM_GET_ONE_REG failed (s4)");
483 	core.regs.s4 = data;
484 
485 	reg.id		= RISCV_CORE_REG(regs.s5);
486 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
487 		die("KVM_GET_ONE_REG failed (s5)");
488 	core.regs.s5 = data;
489 
490 	reg.id		= RISCV_CORE_REG(regs.s6);
491 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
492 		die("KVM_GET_ONE_REG failed (s6)");
493 	core.regs.s6 = data;
494 
495 	reg.id		= RISCV_CORE_REG(regs.s7);
496 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
497 		die("KVM_GET_ONE_REG failed (s7)");
498 	core.regs.s7 = data;
499 
500 	reg.id		= RISCV_CORE_REG(regs.s8);
501 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
502 		die("KVM_GET_ONE_REG failed (s8)");
503 	core.regs.s8 = data;
504 
505 	reg.id		= RISCV_CORE_REG(regs.s9);
506 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
507 		die("KVM_GET_ONE_REG failed (s9)");
508 	core.regs.s9 = data;
509 
510 	reg.id		= RISCV_CORE_REG(regs.s10);
511 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
512 		die("KVM_GET_ONE_REG failed (s10)");
513 	core.regs.s10 = data;
514 
515 	reg.id		= RISCV_CORE_REG(regs.s11);
516 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
517 		die("KVM_GET_ONE_REG failed (s11)");
518 	core.regs.s11 = data;
519 
520 	reg.id		= RISCV_CORE_REG(regs.t3);
521 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
522 		die("KVM_GET_ONE_REG failed (t3)");
523 	core.regs.t3 = data;
524 
525 	reg.id		= RISCV_CORE_REG(regs.t4);
526 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
527 		die("KVM_GET_ONE_REG failed (t4)");
528 	core.regs.t4 = data;
529 
530 	reg.id		= RISCV_CORE_REG(regs.t5);
531 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
532 		die("KVM_GET_ONE_REG failed (t5)");
533 	core.regs.t5 = data;
534 
535 	reg.id		= RISCV_CORE_REG(regs.t6);
536 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
537 		die("KVM_GET_ONE_REG failed (t6)");
538 	core.regs.t6 = data;
539 
540 	dprintf(debug_fd, "\n General Purpose Registers:\n");
541 	dprintf(debug_fd,   " -------------------------\n");
542 	dprintf(debug_fd, " MODE:  0x%lx\n", data);
543 	dprintf(debug_fd, " PC: 0x%016lx   RA: 0x%016lx SP: 0x%016lx GP: 0x%016lx\n",
544 		core.regs.pc, core.regs.ra, core.regs.sp, core.regs.gp);
545 	dprintf(debug_fd, " TP: 0x%016lx   T0: 0x%016lx T1: 0x%016lx T2: 0x%016lx\n",
546 		core.regs.tp, core.regs.t0, core.regs.t1, core.regs.t2);
547 	dprintf(debug_fd, " S0: 0x%016lx   S1: 0x%016lx A0: 0x%016lx A1: 0x%016lx\n",
548 		core.regs.s0, core.regs.s1, core.regs.a0, core.regs.a1);
549 	dprintf(debug_fd, " A2: 0x%016lx   A3: 0x%016lx A4: 0x%016lx A5: 0x%016lx\n",
550 		core.regs.a2, core.regs.a3, core.regs.a4, core.regs.a5);
551 	dprintf(debug_fd, " A6: 0x%016lx   A7: 0x%016lx S2: 0x%016lx S3: 0x%016lx\n",
552 		core.regs.a6, core.regs.a7, core.regs.s2, core.regs.s3);
553 	dprintf(debug_fd, " S4: 0x%016lx   S5: 0x%016lx S6: 0x%016lx S7: 0x%016lx\n",
554 		core.regs.s4, core.regs.s5, core.regs.s6, core.regs.s7);
555 	dprintf(debug_fd, " S8: 0x%016lx   S9: 0x%016lx S10: 0x%016lx S11: 0x%016lx\n",
556 		core.regs.s8, core.regs.s9, core.regs.s10, core.regs.s11);
557 	dprintf(debug_fd, " T3: 0x%016lx   T4: 0x%016lx T5: 0x%016lx T6: 0x%016lx\n",
558 		core.regs.t3, core.regs.t4, core.regs.t5, core.regs.t6);
559 
560 	kvm_cpu__show_csrs(vcpu);
561 }
562