xref: /kvmtool/riscv/kvm-cpu.c (revision 42bfe448c1c38c877cc81ebd403d5fb85bb927a7)
1 #include "kvm/kvm-cpu.h"
2 #include "kvm/kvm.h"
3 #include "kvm/virtio.h"
4 #include "kvm/term.h"
5 
6 #include <asm/ptrace.h>
7 
8 static int debug_fd;
9 
10 void kvm_cpu__set_debug_fd(int fd)
11 {
12 	debug_fd = fd;
13 }
14 
15 int kvm_cpu__get_debug_fd(void)
16 {
17 	return debug_fd;
18 }
19 
20 static __u64 __kvm_reg_id(__u64 type, __u64 idx, __u64  size)
21 {
22 	return KVM_REG_RISCV | type | idx | size;
23 }
24 
25 #if __riscv_xlen == 64
26 #define KVM_REG_SIZE_ULONG	KVM_REG_SIZE_U64
27 #else
28 #define KVM_REG_SIZE_ULONG	KVM_REG_SIZE_U32
29 #endif
30 
31 #define RISCV_CONFIG_REG(name)	__kvm_reg_id(KVM_REG_RISCV_CONFIG, \
32 					     KVM_REG_RISCV_CONFIG_REG(name), \
33 					     KVM_REG_SIZE_ULONG)
34 
35 #define RISCV_CORE_REG(name)	__kvm_reg_id(KVM_REG_RISCV_CORE, \
36 					     KVM_REG_RISCV_CORE_REG(name), \
37 					     KVM_REG_SIZE_ULONG)
38 
39 #define RISCV_CSR_REG(name)	__kvm_reg_id(KVM_REG_RISCV_CSR, \
40 					     KVM_REG_RISCV_CSR_REG(name), \
41 					     KVM_REG_SIZE_ULONG)
42 
43 #define RISCV_TIMER_REG(name)	__kvm_reg_id(KVM_REG_RISCV_TIMER, \
44 					     KVM_REG_RISCV_TIMER_REG(name), \
45 					     KVM_REG_SIZE_U64)
46 
47 struct kvm_cpu *kvm_cpu__arch_init(struct kvm *kvm, unsigned long cpu_id)
48 {
49 	struct kvm_cpu *vcpu;
50 	u64 timebase = 0;
51 	unsigned long isa = 0;
52 	int coalesced_offset, mmap_size;
53 	struct kvm_one_reg reg;
54 
55 	vcpu = calloc(1, sizeof(struct kvm_cpu));
56 	if (!vcpu)
57 		return NULL;
58 
59 	vcpu->vcpu_fd = ioctl(kvm->vm_fd, KVM_CREATE_VCPU, cpu_id);
60 	if (vcpu->vcpu_fd < 0)
61 		die_perror("KVM_CREATE_VCPU ioctl");
62 
63 	reg.id = RISCV_CONFIG_REG(isa);
64 	reg.addr = (unsigned long)&isa;
65 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
66 		die("KVM_GET_ONE_REG failed (config.isa)");
67 
68 	reg.id = RISCV_TIMER_REG(frequency);
69 	reg.addr = (unsigned long)&timebase;
70 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
71 		die("KVM_GET_ONE_REG failed (timer.frequency)");
72 
73 	mmap_size = ioctl(kvm->sys_fd, KVM_GET_VCPU_MMAP_SIZE, 0);
74 	if (mmap_size < 0)
75 		die_perror("KVM_GET_VCPU_MMAP_SIZE ioctl");
76 
77 	vcpu->kvm_run = mmap(NULL, mmap_size, PROT_RW, MAP_SHARED,
78 			     vcpu->vcpu_fd, 0);
79 	if (vcpu->kvm_run == MAP_FAILED)
80 		die("unable to mmap vcpu fd");
81 
82 	coalesced_offset = ioctl(kvm->sys_fd, KVM_CHECK_EXTENSION,
83 				 KVM_CAP_COALESCED_MMIO);
84 	if (coalesced_offset)
85 		vcpu->ring = (void *)vcpu->kvm_run +
86 			     (coalesced_offset * PAGE_SIZE);
87 
88 	reg.id = RISCV_CONFIG_REG(isa);
89 	reg.addr = (unsigned long)&isa;
90 	if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, &reg) < 0)
91 		die("KVM_SET_ONE_REG failed (config.isa)");
92 
93 	/* Populate the vcpu structure. */
94 	vcpu->kvm		= kvm;
95 	vcpu->cpu_id		= cpu_id;
96 	vcpu->riscv_isa		= isa;
97 	vcpu->riscv_xlen	= __riscv_xlen;
98 	vcpu->riscv_timebase	= timebase;
99 	vcpu->is_running	= true;
100 
101 	return vcpu;
102 }
103 
104 void kvm_cpu__arch_nmi(struct kvm_cpu *cpu)
105 {
106 }
107 
108 void kvm_cpu__delete(struct kvm_cpu *vcpu)
109 {
110 	free(vcpu);
111 }
112 
113 bool kvm_cpu__handle_exit(struct kvm_cpu *vcpu)
114 {
115 	/* TODO: */
116 	return false;
117 }
118 
119 void kvm_cpu__show_page_tables(struct kvm_cpu *vcpu)
120 {
121 }
122 
123 void kvm_cpu__reset_vcpu(struct kvm_cpu *vcpu)
124 {
125 	struct kvm *kvm = vcpu->kvm;
126 	struct kvm_mp_state mp_state;
127 	struct kvm_one_reg reg;
128 	unsigned long data;
129 
130 	if (ioctl(vcpu->vcpu_fd, KVM_GET_MP_STATE, &mp_state) < 0)
131 		die_perror("KVM_GET_MP_STATE failed");
132 
133 	/*
134 	 * If MP state is stopped then it means Linux KVM RISC-V emulates
135 	 * SBI v0.2 (or higher) with HART power managment and give VCPU
136 	 * will power-up at boot-time by boot VCPU. For such VCPU, we
137 	 * don't update PC, A0 and A1 here.
138 	 */
139 	if (mp_state.mp_state == KVM_MP_STATE_STOPPED)
140 		return;
141 
142 	reg.addr = (unsigned long)&data;
143 
144 	data	= kvm->arch.kern_guest_start;
145 	reg.id	= RISCV_CORE_REG(regs.pc);
146 	if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, &reg) < 0)
147 		die_perror("KVM_SET_ONE_REG failed (pc)");
148 
149 	data	= vcpu->cpu_id;
150 	reg.id	= RISCV_CORE_REG(regs.a0);
151 	if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, &reg) < 0)
152 		die_perror("KVM_SET_ONE_REG failed (a0)");
153 
154 	data	= kvm->arch.dtb_guest_start;
155 	reg.id	= RISCV_CORE_REG(regs.a1);
156 	if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, &reg) < 0)
157 		die_perror("KVM_SET_ONE_REG failed (a1)");
158 }
159 
160 int kvm_cpu__get_endianness(struct kvm_cpu *vcpu)
161 {
162 	return VIRTIO_ENDIAN_LE;
163 }
164 
165 void kvm_cpu__show_code(struct kvm_cpu *vcpu)
166 {
167 	struct kvm_one_reg reg;
168 	unsigned long data;
169 	int debug_fd = kvm_cpu__get_debug_fd();
170 
171 	reg.addr = (unsigned long)&data;
172 
173 	dprintf(debug_fd, "\n*PC:\n");
174 	reg.id = RISCV_CORE_REG(regs.pc);
175 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
176 		die("KVM_GET_ONE_REG failed (show_code @ PC)");
177 
178 	kvm__dump_mem(vcpu->kvm, data, 32, debug_fd);
179 
180 	dprintf(debug_fd, "\n*RA:\n");
181 	reg.id = RISCV_CORE_REG(regs.ra);
182 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
183 		die("KVM_GET_ONE_REG failed (show_code @ RA)");
184 
185 	kvm__dump_mem(vcpu->kvm, data, 32, debug_fd);
186 }
187 
188 static void kvm_cpu__show_csrs(struct kvm_cpu *vcpu)
189 {
190 	struct kvm_one_reg reg;
191 	struct kvm_riscv_csr csr;
192 	unsigned long data;
193 	int debug_fd = kvm_cpu__get_debug_fd();
194 
195 	reg.addr = (unsigned long)&data;
196 	dprintf(debug_fd, "\n Control Status Registers:\n");
197 	dprintf(debug_fd,   " ------------------------\n");
198 
199 	reg.id		= RISCV_CSR_REG(sstatus);
200 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
201 		die("KVM_GET_ONE_REG failed (sstatus)");
202 	csr.sstatus = data;
203 
204 	reg.id		= RISCV_CSR_REG(sie);
205 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
206 		die("KVM_GET_ONE_REG failed (sie)");
207 	csr.sie = data;
208 
209 	reg.id		= RISCV_CSR_REG(stvec);
210 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
211 		die("KVM_GET_ONE_REG failed (stvec)");
212 	csr.stvec = data;
213 
214 	reg.id		= RISCV_CSR_REG(sip);
215 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
216 		die("KVM_GET_ONE_REG failed (sip)");
217 	csr.sip = data;
218 
219 	reg.id		= RISCV_CSR_REG(satp);
220 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
221 		die("KVM_GET_ONE_REG failed (satp)");
222 	csr.satp = data;
223 
224 	reg.id		= RISCV_CSR_REG(stval);
225 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
226 		die("KVM_GET_ONE_REG failed (stval)");
227 	csr.stval = data;
228 
229 	reg.id		= RISCV_CSR_REG(scause);
230 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
231 		die("KVM_GET_ONE_REG failed (SCAUSE)");
232 	csr.scause = data;
233 
234 	reg.id		= RISCV_CSR_REG(sscratch);
235 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
236 		die("KVM_GET_ONE_REG failed (sscartch)");
237 	csr.sscratch = data;
238 	dprintf(debug_fd, " SSTATUS:  0x%016lx\n", csr.sstatus);
239 	dprintf(debug_fd, " SIE:      0x%016lx\n", csr.sie);
240 	dprintf(debug_fd, " STVEC:    0x%016lx\n", csr.stvec);
241 	dprintf(debug_fd, " SIP:      0x%016lx\n", csr.sip);
242 	dprintf(debug_fd, " SATP:     0x%016lx\n", csr.satp);
243 	dprintf(debug_fd, " STVAL:    0x%016lx\n", csr.stval);
244 	dprintf(debug_fd, " SCAUSE:   0x%016lx\n", csr.scause);
245 	dprintf(debug_fd, " SSCRATCH: 0x%016lx\n", csr.sscratch);
246 }
247 
248 void kvm_cpu__show_registers(struct kvm_cpu *vcpu)
249 {
250 	struct kvm_one_reg reg;
251 	unsigned long data;
252 	int debug_fd = kvm_cpu__get_debug_fd();
253 	struct kvm_riscv_core core;
254 
255 	reg.addr = (unsigned long)&data;
256 
257 	reg.id		= RISCV_CORE_REG(mode);
258 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
259 		die("KVM_GET_ONE_REG failed (mode)");
260 	core.mode = data;
261 
262 	reg.id		= RISCV_CORE_REG(regs.pc);
263 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
264 		die("KVM_GET_ONE_REG failed (pc)");
265 	core.regs.pc = data;
266 
267 	reg.id		= RISCV_CORE_REG(regs.ra);
268 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
269 		die("KVM_GET_ONE_REG failed (ra)");
270 	core.regs.ra = data;
271 
272 	reg.id		= RISCV_CORE_REG(regs.sp);
273 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
274 		die("KVM_GET_ONE_REG failed (sp)");
275 	core.regs.sp = data;
276 
277 	reg.id		= RISCV_CORE_REG(regs.gp);
278 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
279 		die("KVM_GET_ONE_REG failed (gp)");
280 	core.regs.gp = data;
281 
282 	reg.id		= RISCV_CORE_REG(regs.tp);
283 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
284 		die("KVM_GET_ONE_REG failed (tp)");
285 	core.regs.tp = data;
286 
287 	reg.id		= RISCV_CORE_REG(regs.t0);
288 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
289 		die("KVM_GET_ONE_REG failed (t0)");
290 	core.regs.t0 = data;
291 
292 	reg.id		= RISCV_CORE_REG(regs.t1);
293 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
294 		die("KVM_GET_ONE_REG failed (t1)");
295 	core.regs.t1 = data;
296 
297 	reg.id		= RISCV_CORE_REG(regs.t2);
298 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
299 		die("KVM_GET_ONE_REG failed (t2)");
300 	core.regs.t2 = data;
301 
302 	reg.id		= RISCV_CORE_REG(regs.s0);
303 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
304 		die("KVM_GET_ONE_REG failed (s0)");
305 	core.regs.s0 = data;
306 
307 	reg.id		= RISCV_CORE_REG(regs.s1);
308 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
309 		die("KVM_GET_ONE_REG failed (s1)");
310 	core.regs.s1 = data;
311 
312 	reg.id		= RISCV_CORE_REG(regs.a0);
313 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
314 		die("KVM_GET_ONE_REG failed (a0)");
315 	core.regs.a0 = data;
316 
317 	reg.id		= RISCV_CORE_REG(regs.a1);
318 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
319 		die("KVM_GET_ONE_REG failed (a1)");
320 	core.regs.a1 = data;
321 
322 	reg.id		= RISCV_CORE_REG(regs.a2);
323 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
324 		die("KVM_GET_ONE_REG failed (a2)");
325 	core.regs.a2 = data;
326 
327 	reg.id		= RISCV_CORE_REG(regs.a3);
328 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
329 		die("KVM_GET_ONE_REG failed (a3)");
330 	core.regs.a3 = data;
331 
332 	reg.id		= RISCV_CORE_REG(regs.a4);
333 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
334 		die("KVM_GET_ONE_REG failed (a4)");
335 	core.regs.a4 = data;
336 
337 	reg.id		= RISCV_CORE_REG(regs.a5);
338 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
339 		die("KVM_GET_ONE_REG failed (a5)");
340 	core.regs.a5 = data;
341 
342 	reg.id		= RISCV_CORE_REG(regs.a6);
343 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
344 		die("KVM_GET_ONE_REG failed (a6)");
345 	core.regs.a6 = data;
346 
347 	reg.id		= RISCV_CORE_REG(regs.a7);
348 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
349 		die("KVM_GET_ONE_REG failed (a7)");
350 	core.regs.a7 = data;
351 
352 	reg.id		= RISCV_CORE_REG(regs.s2);
353 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
354 		die("KVM_GET_ONE_REG failed (s2)");
355 	core.regs.s2 = data;
356 
357 	reg.id		= RISCV_CORE_REG(regs.s3);
358 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
359 		die("KVM_GET_ONE_REG failed (s3)");
360 	core.regs.s3 = data;
361 
362 	reg.id		= RISCV_CORE_REG(regs.s4);
363 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
364 		die("KVM_GET_ONE_REG failed (s4)");
365 	core.regs.s4 = data;
366 
367 	reg.id		= RISCV_CORE_REG(regs.s5);
368 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
369 		die("KVM_GET_ONE_REG failed (s5)");
370 	core.regs.s5 = data;
371 
372 	reg.id		= RISCV_CORE_REG(regs.s6);
373 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
374 		die("KVM_GET_ONE_REG failed (s6)");
375 	core.regs.s6 = data;
376 
377 	reg.id		= RISCV_CORE_REG(regs.s7);
378 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
379 		die("KVM_GET_ONE_REG failed (s7)");
380 	core.regs.s7 = data;
381 
382 	reg.id		= RISCV_CORE_REG(regs.s8);
383 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
384 		die("KVM_GET_ONE_REG failed (s8)");
385 	core.regs.s8 = data;
386 
387 	reg.id		= RISCV_CORE_REG(regs.s9);
388 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
389 		die("KVM_GET_ONE_REG failed (s9)");
390 	core.regs.s9 = data;
391 
392 	reg.id		= RISCV_CORE_REG(regs.s10);
393 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
394 		die("KVM_GET_ONE_REG failed (s10)");
395 	core.regs.s10 = data;
396 
397 	reg.id		= RISCV_CORE_REG(regs.s11);
398 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
399 		die("KVM_GET_ONE_REG failed (s11)");
400 	core.regs.s11 = data;
401 
402 	reg.id		= RISCV_CORE_REG(regs.t3);
403 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
404 		die("KVM_GET_ONE_REG failed (t3)");
405 	core.regs.t3 = data;
406 
407 	reg.id		= RISCV_CORE_REG(regs.t4);
408 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
409 		die("KVM_GET_ONE_REG failed (t4)");
410 	core.regs.t4 = data;
411 
412 	reg.id		= RISCV_CORE_REG(regs.t5);
413 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
414 		die("KVM_GET_ONE_REG failed (t5)");
415 	core.regs.t5 = data;
416 
417 	reg.id		= RISCV_CORE_REG(regs.t6);
418 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
419 		die("KVM_GET_ONE_REG failed (t6)");
420 	core.regs.t6 = data;
421 
422 	dprintf(debug_fd, "\n General Purpose Registers:\n");
423 	dprintf(debug_fd,   " -------------------------\n");
424 	dprintf(debug_fd, " MODE:  0x%lx\n", data);
425 	dprintf(debug_fd, " PC: 0x%016lx   RA: 0x%016lx SP: 0x%016lx GP: 0x%016lx\n",
426 		core.regs.pc, core.regs.ra, core.regs.sp, core.regs.gp);
427 	dprintf(debug_fd, " TP: 0x%016lx   T0: 0x%016lx T1: 0x%016lx T2: 0x%016lx\n",
428 		core.regs.tp, core.regs.t0, core.regs.t1, core.regs.t2);
429 	dprintf(debug_fd, " S0: 0x%016lx   S1: 0x%016lx A0: 0x%016lx A1: 0x%016lx\n",
430 		core.regs.s0, core.regs.s1, core.regs.a0, core.regs.a1);
431 	dprintf(debug_fd, " A2: 0x%016lx   A3: 0x%016lx A4: 0x%016lx A5: 0x%016lx\n",
432 		core.regs.a2, core.regs.a3, core.regs.a4, core.regs.a5);
433 	dprintf(debug_fd, " A6: 0x%016lx   A7: 0x%016lx S2: 0x%016lx S3: 0x%016lx\n",
434 		core.regs.a6, core.regs.a7, core.regs.s2, core.regs.s3);
435 	dprintf(debug_fd, " S4: 0x%016lx   S5: 0x%016lx S6: 0x%016lx S7: 0x%016lx\n",
436 		core.regs.s4, core.regs.s5, core.regs.s6, core.regs.s7);
437 	dprintf(debug_fd, " S8: 0x%016lx   S9: 0x%016lx S10: 0x%016lx S11: 0x%016lx\n",
438 		core.regs.s8, core.regs.s9, core.regs.s10, core.regs.s11);
439 	dprintf(debug_fd, " T3: 0x%016lx   T4: 0x%016lx T5: 0x%016lx T6: 0x%016lx\n",
440 		core.regs.t3, core.regs.t4, core.regs.t5, core.regs.t6);
441 
442 	kvm_cpu__show_csrs(vcpu);
443 }
444