1 #ifndef __ASMARM_MMU_H_ 2 #define __ASMARM_MMU_H_ 3 /* 4 * Copyright (C) 2014, Red Hat Inc, Andrew Jones <drjones@redhat.com> 5 * 6 * This work is licensed under the terms of the GNU LGPL, version 2. 7 */ 8 #include <asm/barrier.h> 9 10 #define PTE_USER L_PTE_USER 11 #define PTE_RDONLY PTE_AP2 12 #define PTE_SHARED L_PTE_SHARED 13 #define PTE_AF PTE_EXT_AF 14 #define PTE_WBWA L_PTE_MT_WRITEALLOC 15 16 /* See B3.18.7 TLB maintenance operations */ 17 18 static inline void local_flush_tlb_all(void) 19 { 20 dsb(nshst); 21 /* TLBIALL */ 22 asm volatile("mcr p15, 0, %0, c8, c7, 0" :: "r" (0)); 23 dsb(nsh); 24 isb(); 25 } 26 27 static inline void flush_tlb_all(void) 28 { 29 dsb(ishst); 30 /* TLBIALLIS */ 31 asm volatile("mcr p15, 0, %0, c8, c3, 0" :: "r" (0)); 32 dsb(ish); 33 isb(); 34 } 35 36 static inline void flush_tlb_page(unsigned long vaddr) 37 { 38 dsb(ishst); 39 /* TLBIMVAAIS */ 40 asm volatile("mcr p15, 0, %0, c8, c3, 3" :: "r" (vaddr)); 41 dsb(ish); 42 isb(); 43 } 44 45 static inline void flush_dcache_addr(unsigned long vaddr) 46 { 47 /* DCCIMVAC */ 48 asm volatile("mcr p15, 0, %0, c7, c14, 1" :: "r" (vaddr)); 49 } 50 51 #include <asm/mmu-api.h> 52 53 #endif /* __ASMARM_MMU_H_ */ 54