1db866895SAndrew Jones #ifndef __ASMARM_MMU_H_ 2db866895SAndrew Jones #define __ASMARM_MMU_H_ 3db866895SAndrew Jones /* 4db866895SAndrew Jones * Copyright (C) 2014, Red Hat Inc, Andrew Jones <drjones@redhat.com> 5db866895SAndrew Jones * 6db866895SAndrew Jones * This work is licensed under the terms of the GNU LGPL, version 2. 7db866895SAndrew Jones */ 88cca5668SAndrew Jones #include <asm/barrier.h> 9153d1936SAndrew Jones 102f3028cdSAndrew Jones #define PTE_USER L_PTE_USER 11*e97e1c82SAndrew Jones #define PTE_UXN L_PTE_XN 12*e97e1c82SAndrew Jones #define PTE_PXN L_PTE_PXN 13db328a24SAndrew Jones #define PTE_RDONLY PTE_AP2 142f3028cdSAndrew Jones #define PTE_SHARED L_PTE_SHARED 152f3028cdSAndrew Jones #define PTE_AF PTE_EXT_AF 162f3028cdSAndrew Jones #define PTE_WBWA L_PTE_MT_WRITEALLOC 17*e97e1c82SAndrew Jones #define PTE_UNCACHED L_PTE_MT_UNCACHED 182f3028cdSAndrew Jones 194b5caf0cSAlex Bennée /* See B3.18.7 TLB maintenance operations */ 204b5caf0cSAlex Bennée 21153d1936SAndrew Jones static inline void local_flush_tlb_all(void) 22153d1936SAndrew Jones { 236cba60e9SAlexandru Elisei dsb(nshst); 244b5caf0cSAlex Bennée /* TLBIALL */ 25153d1936SAndrew Jones asm volatile("mcr p15, 0, %0, c8, c7, 0" :: "r" (0)); 266cba60e9SAlexandru Elisei dsb(nsh); 27153d1936SAndrew Jones isb(); 28153d1936SAndrew Jones } 29153d1936SAndrew Jones 30153d1936SAndrew Jones static inline void flush_tlb_all(void) 31153d1936SAndrew Jones { 32a3a7fe04SAlexandru Elisei dsb(ishst); 33a3a7fe04SAlexandru Elisei /* TLBIALLIS */ 34a3a7fe04SAlexandru Elisei asm volatile("mcr p15, 0, %0, c8, c3, 0" :: "r" (0)); 35a3a7fe04SAlexandru Elisei dsb(ish); 36a3a7fe04SAlexandru Elisei isb(); 37153d1936SAndrew Jones } 38153d1936SAndrew Jones 394b5caf0cSAlex Bennée static inline void flush_tlb_page(unsigned long vaddr) 404b5caf0cSAlex Bennée { 416cba60e9SAlexandru Elisei dsb(ishst); 4220239febSAlexandru Elisei /* TLBIMVAAIS */ 4320239febSAlexandru Elisei asm volatile("mcr p15, 0, %0, c8, c3, 3" :: "r" (vaddr)); 446cba60e9SAlexandru Elisei dsb(ish); 454b5caf0cSAlex Bennée isb(); 464b5caf0cSAlex Bennée } 474b5caf0cSAlex Bennée 48f8891de2SAndrew Jones static inline void flush_dcache_addr(unsigned long vaddr) 49f8891de2SAndrew Jones { 50a3a7fe04SAlexandru Elisei /* DCCIMVAC */ 51f8891de2SAndrew Jones asm volatile("mcr p15, 0, %0, c7, c14, 1" :: "r" (vaddr)); 52f8891de2SAndrew Jones } 53f8891de2SAndrew Jones 542f3028cdSAndrew Jones #include <asm/mmu-api.h> 55db866895SAndrew Jones 56db866895SAndrew Jones #endif /* __ASMARM_MMU_H_ */ 57