1db866895SAndrew Jones #ifndef __ASMARM_MMU_H_ 2db866895SAndrew Jones #define __ASMARM_MMU_H_ 3db866895SAndrew Jones /* 4db866895SAndrew Jones * Copyright (C) 2014, Red Hat Inc, Andrew Jones <drjones@redhat.com> 5db866895SAndrew Jones * 6db866895SAndrew Jones * This work is licensed under the terms of the GNU LGPL, version 2. 7db866895SAndrew Jones */ 88cca5668SAndrew Jones #include <asm/barrier.h> 9153d1936SAndrew Jones 102f3028cdSAndrew Jones #define PTE_USER L_PTE_USER 11db328a24SAndrew Jones #define PTE_RDONLY PTE_AP2 122f3028cdSAndrew Jones #define PTE_SHARED L_PTE_SHARED 132f3028cdSAndrew Jones #define PTE_AF PTE_EXT_AF 142f3028cdSAndrew Jones #define PTE_WBWA L_PTE_MT_WRITEALLOC 152f3028cdSAndrew Jones 164b5caf0cSAlex Bennée /* See B3.18.7 TLB maintenance operations */ 174b5caf0cSAlex Bennée 18153d1936SAndrew Jones static inline void local_flush_tlb_all(void) 19153d1936SAndrew Jones { 206cba60e9SAlexandru Elisei dsb(nshst); 214b5caf0cSAlex Bennée /* TLBIALL */ 22153d1936SAndrew Jones asm volatile("mcr p15, 0, %0, c8, c7, 0" :: "r" (0)); 236cba60e9SAlexandru Elisei dsb(nsh); 24153d1936SAndrew Jones isb(); 25153d1936SAndrew Jones } 26153d1936SAndrew Jones 27153d1936SAndrew Jones static inline void flush_tlb_all(void) 28153d1936SAndrew Jones { 29*a3a7fe04SAlexandru Elisei dsb(ishst); 30*a3a7fe04SAlexandru Elisei /* TLBIALLIS */ 31*a3a7fe04SAlexandru Elisei asm volatile("mcr p15, 0, %0, c8, c3, 0" :: "r" (0)); 32*a3a7fe04SAlexandru Elisei dsb(ish); 33*a3a7fe04SAlexandru Elisei isb(); 34153d1936SAndrew Jones } 35153d1936SAndrew Jones 364b5caf0cSAlex Bennée static inline void flush_tlb_page(unsigned long vaddr) 374b5caf0cSAlex Bennée { 386cba60e9SAlexandru Elisei dsb(ishst); 3920239febSAlexandru Elisei /* TLBIMVAAIS */ 4020239febSAlexandru Elisei asm volatile("mcr p15, 0, %0, c8, c3, 3" :: "r" (vaddr)); 416cba60e9SAlexandru Elisei dsb(ish); 424b5caf0cSAlex Bennée isb(); 434b5caf0cSAlex Bennée } 444b5caf0cSAlex Bennée 45f8891de2SAndrew Jones static inline void flush_dcache_addr(unsigned long vaddr) 46f8891de2SAndrew Jones { 47*a3a7fe04SAlexandru Elisei /* DCCIMVAC */ 48f8891de2SAndrew Jones asm volatile("mcr p15, 0, %0, c7, c14, 1" :: "r" (vaddr)); 49f8891de2SAndrew Jones } 50f8891de2SAndrew Jones 512f3028cdSAndrew Jones #include <asm/mmu-api.h> 52db866895SAndrew Jones 53db866895SAndrew Jones #endif /* __ASMARM_MMU_H_ */ 54