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/linux-5.10/drivers/rtc/ !
Dinterface.c1 // SPDX-License-Identifier: GPL-2.0
27 if (!rtc->offset_secs) in rtc_add_offset()
35 * between expanded range and original range, which is no need to add in rtc_add_offset()
38 if ((rtc->start_secs > rtc->range_min && secs >= rtc->start_secs) || in rtc_add_offset()
39 (rtc->start_secs < rtc->range_min && in rtc_add_offset()
40 secs <= (rtc->start_secs + rtc->range_max - rtc->range_min))) in rtc_add_offset()
43 rtc_time64_to_tm(secs + rtc->offset_secs, tm); in rtc_add_offset()
50 if (!rtc->offset_secs) in rtc_subtract_offset()
57 * device, then no need to subtract the offset when setting time to RTC in rtc_subtract_offset()
61 if (secs >= rtc->range_min && secs <= rtc->range_max) in rtc_subtract_offset()
[all …]
Drtc-dm355evm.c1 // SPDX-License-Identifier: GPL-2.0+
3 * rtc-dm355evm.c - access battery-backed counter in MSP430 firmware
19 * reasonable RTC for applications where alarms and non-NTP drift
22 * The only real glitch is the inability to read or write all four
41 * Read LSB(0) to MSB(3) bytes. Defend against the counter in dm355evm_rtc_read_time()
42 * rolling over by re-reading until the value is stable, in dm355evm_rtc_read_time()
75 dev_dbg(dev, "read timestamp %08x\n", time.value); in dm355evm_rtc_read_time()
93 * REVISIT handle non-atomic writes ... maybe just retry until in dm355evm_rtc_set_time()
94 * byte[1] sticks (no rollover)? in dm355evm_rtc_set_time()
120 /*----------------------------------------------------------------------*/
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Drtc-ds1305.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * rtc-ds1305.c -- driver for DS1305 and DS1306 SPI RTC chips
21 * otherwise you're reading it. All non-bitmask values are BCD.
27 * - Need fancy "hours" encoding in 12hour mode
28 * - Don't rely on the "day-of-week" field (or tm_wday)
29 * - Are a 21st-century clock (2000 <= year < 2100)
50 * NOTE ALSO that while we could generate once-a-second IRQs (UIE), we
52 * no alarm is pending (not the standard model), or to use the second
98 /*----------------------------------------------------------------------*/
101 * Utilities ... tolerate 12-hour AM/PM notation in case of non-Linux
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Drtc-pcf85063.c1 // SPDX-License-Identifier: GPL-2.0
7 * Maintainers: http://www.nslu2-linux.org/
12 #include <linux/clk-provider.h>
27 * PCF85063A -- Rev. 6 — 18 November 2015
28 * PCF85063TP -- Rev. 4 — 6 May 2015
30 * https://www.microcrystal.com/fileadmin/Media/Products/RTC/App.Manual/RV-8263-C7_App-Manual.pdf
31 * RV8263 -- Rev. 1.0 — January 2019
83 * event, the access must be finished within one second. So, read all in pcf85063_rtc_read_time()
86 rc = regmap_bulk_read(pcf85063->regmap, PCF85063_REG_SC, regs, in pcf85063_rtc_read_time()
91 /* if the clock has lost its power it makes no sense to use its time */ in pcf85063_rtc_read_time()
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/linux-5.10/arch/arm/mm/ !
Dcontext.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2002-2003 Deep Blue Solutions Ltd, all rights reserved.
20 #include <asm/proc-fns.h>
26 * +-------------------------+-----------+
28 * +-------------------------+-----------+
30 * +-------------------------------------+
37 * by non-64-bit operations.
59 context_id = mm->context.id.counter; in a15_erratum_get_cpumask()
80 * no need for a reserved set of tables (the active ASID tracking prevents
81 * any issues across a rollover).
[all …]
/linux-5.10/drivers/net/ethernet/sun/ !
Dcassini.h1 /* SPDX-License-Identifier: GPL-2.0+ */
29 /* cassini register map: 2M memory mapped in 32-bit memory space accessible as
30 * 32-bit words. there is no i/o port access. REG_ addresses are
62 /* top level interrupts [0-9] are auto-cleared to 0 when the status
63 * register is read. second level interrupts [13 - 18] are cleared at
64 * the source. tx completion register 3 is replicated in [19 - 31]
85 #define INTR_RX_BUF_UNAVAIL 0x00000020 /* no more receive buffers.
89 #define INTR_RX_COMP_FULL 0x00000080 /* no more room in completion
104 len of non-reassembly pkt
143 /* top level interrupt bits that are cleared during read of REG_INTR_STATUS_ALIAS.
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/linux-5.10/Documentation/devicetree/bindings/eeprom/ !
Dat24.yaml1 # SPDX-License-Identifier: GPL-2.0-only
4 ---
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Bartosz Golaszewski <bgolaszewski@baylibre.com>
17 pattern: "^atmel,(24(c|cs|mac)[0-9]+|spd)$"
19 - compatible
23 pattern: "^eeprom@[0-9a-f]{1,2}$"
33 - allOf:
34 - minItems: 1
37 … - pattern: "^(atmel|catalyst|microchip|nxp|ramtron|renesas|rohm|st),(24(c|cs|lc|mac)[0-9]+|spd)$"
[all …]
/linux-5.10/net/packet/ !
Daf_packet.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * PACKET - implements raw packet sockets.
15 * Alan Cox : new skbuff lists, look ma no backlogs!
18 * added. Also fixed the peek/read crash
22 * Alan Cox : Re-commented the code.
27 * dubious gcc output. Can you read
30 * Alan Cox : New buffers. Use sk->mac.raw.
96 - If the device has no dev->header_ops->create, there is no LL header
103 needed_headroom to be (the real WiFi header length - the fake Ethernet
105 - packet socket receives packets with pulled ll header,
[all …]
/linux-5.10/drivers/misc/eeprom/ !
Dat24.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at24.c - handle most I2C EEPROMs
5 * Copyright (C) 2005-2007 David Brownell
20 #include <linux/nvmem-provider.h>
30 /* sysfs-entry will be read-only. */
32 /* sysfs-entry will be world-readable. */
36 /* Factory-programmed serial number. */
38 /* Factory-programmed mac address. */
40 /* Does not auto-rollover reads to the next slave address. */
46 * MicroChip 24LC, etc) won't much matter for typical read/write access.
[all …]
/linux-5.10/Documentation/firmware-guide/acpi/apei/ !
Doutput_format.rst1 .. SPDX-License-Identifier: GPL-2.0
55 [cache error][, TLB error][, bus error][, micro-architectural error]
57 <proc operation string>* := unknown or generic | data read | data write | \
81 unknown | no error | single-bit ECC | multi-bit ECC | \
82 single-symbol chipkill ECC | multi-symbol chipkill ECC | master abort | \
106 downstream switch port | PCIe to PCI/PCI-X bridge | \
107 PCI/PCI-X to PCIe bridge | root complex integrated endpoint device | \
120 Bad TLP | Bad DLLP | RELAY_NUM Rollover | unknown | unknown | unknown | \
121 Replay Timer Timeout | Advisory Non-Fatal
/linux-5.10/drivers/usb/dwc2/ !
Dhcd.h1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
3 * hcd.h - DesignWare HS OTG Controller host-mode declarations
5 * Copyright (C) 2004-2013 Synopsys, Inc.
16 * 3. The names of the above-listed copyright holders may not be used
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
53 * struct dwc2_host_chan - Software host channel descriptor
60 * - USB_SPEED_LOW
61 * - USB_SPEED_FULL
62 * - USB_SPEED_HIGH
64 * - USB_ENDPOINT_XFER_CONTROL: 0
[all …]
/linux-5.10/arch/m68k/bvme6000/ !
Dconfig.c32 #include <asm/bootinfo-vme.h>
49 if (be16_to_cpu(bi->tag) == BI_VME_TYPE) in bvme6000_parse_bootinfo()
65 pit->pcddr |= 0x10; /* WDOG enable */ in bvme6000_reset()
116 pit->pgcr = 0x00; /* Unidirectional 8 bit, no handshake for now */ in config_bvme6000()
117 pit->psrr = 0x18; /* PIACK and PIRQ functions enabled */ in config_bvme6000()
118 pit->pacr = 0x00; /* Sub Mode 00, H2 i/p, no DMA */ in config_bvme6000()
119 pit->padr = 0x00; /* Just to be tidy! */ in config_bvme6000()
120 pit->paddr = 0x00; /* All inputs for now (safest) */ in config_bvme6000()
121 pit->pbcr = 0x80; /* Sub Mode 1x, H4 i/p, no DMA */ in config_bvme6000()
122 pit->pbdr = 0xbc | (*config_reg_ptr & BVME_CONFIG_SW1 ? 0 : 0x40); in config_bvme6000()
[all …]
/linux-5.10/include/sound/ !
Dhda_register.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * HD-audio controller (Azalia) registers and helpers
45 #define AZX_CORBRP_RST (1 << 15) /* read pointer reset */
107 /* Haswell/Broadwell display HD-A controller Extended Mode registers */
111 /* Skylake/Broxton vendor-specific registers */
139 /* max number of fragments - we may use more if allocating more pages for BDL */
143 /* max buffer size - no h/w limit, you can increase as you like */
152 #define STATESTS_INT_MASK ((1 << HDA_MAX_CODECS) - 1)
159 #define SD_CTL_DIR (1 << 19) /* bi-directional stream */
179 /* below are so far hardcoded - should read registers in future */
[all …]
/linux-5.10/include/linux/ !
Dhp_sdc.h2 * HP i8042 System Device Controller -- header
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
31 * HP-HIL Technical Reference Manual. Hewlett Packard Product No. 45918A
34 * for Part Number 1820-4784 Revision B. Dwg No. A-1820-4784-2
50 /* No 4X status reads take longer than this (in usec).
104 #define HP_SDC_STATUS_PUP 0x70 /* Successful power-up self test */
134 #define HP_SDC_STR 0x7f /* i8042 self-test result */
146 #define HP_SDC_CFG_ROLLOVER 0x08 /* WTF is "N-key rollover"? */
149 #define HP_SDC_CFG_KBD_OLD 0x03 /* keyboard code for non-HIL */
167 case 0x1: str = "1820-3712"; break; \
[all …]
/linux-5.10/arch/powerpc/kernel/ !
Dirq.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
8 * Copyright (C) 1996-2001 Cort Dougan
19 * interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit
47 #include <linux/radix-tree.h>
66 #include <asm/asm-prototypes.h>
115 /* This is called whenever we are re-enabling interrupts
120 * before soft-enabling interrupts, and from the exception exit
121 * path when returning from an interrupt from a soft-disabled to
126 * PACA irq_happened field since we can only re-emit one at a
[all …]
Dhead_44x.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Copyright (c) 1995-1996 Gary Thomas <gdt@linuxppc.org>
10 * Low-level exception handers, MMU support, and rewrite.
13 * Copyright (c) 1998-1999 TiVo, Inc.
23 * Copyright 2002-2005 MontaVista Software, Inc.
35 #include <asm/asm-offsets.h>
39 #include <asm/code-patching-asm.h>
47 * r3 - Board info structure pointer (DRAM, frequency, MAC address, etc.)
48 * r4 - Starting address of the init RAM disk
49 * r5 - Ending address of the init RAM disk
[all …]
/linux-5.10/drivers/infiniband/hw/hfi1/ !
Dmad.h2 * Copyright(c) 2015 - 2017 Intel Corporation.
24 * - Redistributions of source code must retain the above copyright
26 * - Redistributions in binary form must reproduce the above copyright
30 * - Neither the name of Intel Corporation nor the names of its
37 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
251 u64 timestamp; /* wider than 32 bits to detect 32 bit rollover */
341 * struct cc_state combines the (active) per-port congestion control
342 * table, and the (active) per-SL congestion settings. cc_state data
343 * may need to be read in code paths that we want to be fast, so it
431 #define COUNTER_MASK(q, n) (q << ((9 - n) * 3))
[all …]
/linux-5.10/drivers/net/ethernet/cadence/ !
Dmacb_ptp.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2017 Cadence Design Systems - https://www.cadence.com
26 #define GEM_PTP_TIMER_NAME "gem-ptp-timer"
31 if (bp->hw_dma_cap == HW_DMA_CAP_PTP) in macb_ptp_desc()
34 if (bp->hw_dma_cap == HW_DMA_CAP_64B_PTP) in macb_ptp_desc()
48 spin_lock_irqsave(&bp->tsu_clk_lock, flags); in gem_tsu_get_time()
54 /* test for nsec rollover */ in gem_tsu_get_time()
56 /* if so, use later read & re-read seconds in gem_tsu_get_time()
59 ts->tv_nsec = gem_readl(bp, TN); in gem_tsu_get_time()
63 ts->tv_nsec = first; in gem_tsu_get_time()
[all …]
/linux-5.10/drivers/scsi/ !
Dqlogicpti.h1 /* SPDX-License-Identifier: GPL-2.0 */
41 * slots available. That is, host->can_queue and host->sg_tablesize
46 #define QLOGICPTI_REQ_QUEUE_LEN 255 /* must be power of two - 1 */
47 #define QLOGICPTI_MAX_SG(ql) (4 + (((ql) > 0) ? 7*((ql) - 1) : 0))
298 * ---------
322 #define RES_QUEUE_LEN 255 /* Must be power of two - 1 */
327 #define PREV_REQ_PTR(wheee) (((wheee) - 1) & QLOGICPTI_REQ_QUEUE_LEN)
328 #define PREV_RES_PTR(wheee) (((wheee) - 1) & RES_QUEUE_LEN)
352 /* The cmd->handler is only 32-bits, so that things work even on monster
354 * scsi command pointers here. This is essentially what Matt Jacob does. -DaveM
[all …]
/linux-5.10/drivers/gpu/drm/msm/adreno/ !
Da3xx_gpu.c1 // SPDX-License-Identifier: GPL-2.0-only
33 struct msm_drm_private *priv = gpu->dev->dev_private; in a3xx_submit()
34 struct msm_ringbuffer *ring = submit->ring; in a3xx_submit()
37 for (i = 0; i < submit->nr_cmds; i++) { in a3xx_submit()
38 switch (submit->cmd[i].type) { in a3xx_submit()
40 /* ignore IB-targets */ in a3xx_submit()
44 if (priv->lastctx == submit->queue->ctx) in a3xx_submit()
49 OUT_RING(ring, lower_32_bits(submit->cmd[i].iova)); in a3xx_submit()
50 OUT_RING(ring, submit->cmd[i].size); in a3xx_submit()
57 OUT_RING(ring, submit->seqno); in a3xx_submit()
[all …]
/linux-5.10/drivers/usb/misc/ !
Diowarrior.c1 // SPDX-License-Identifier: GPL-2.0
3 * Native support for the I/O-Warrior USB devices
5 * Copyright (c) 2003-2005, 2020 Code Mercenaries GmbH
11 * usb-skeleton.c by Greg Kroah-Hartman <greg@kroah.com>
27 #define DRIVER_DESC "USB IO-Warrior driver"
68 /*--------------*/
70 /*--------------*/
81 unsigned char *int_in_buffer; /* buffer for data to be read */
85 wait_queue_head_t write_wait; /* wait-queue for writing to the device */
86 atomic_t write_busy; /* number of write-urbs submitted */
[all …]
/linux-5.10/drivers/net/wireless/marvell/mwifiex/ !
Dpcie.c4 * Copyright 2011-2020 NXP
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
12 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
14 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
193 if (!of_match_node(mwifiex_pcie_of_match_table, dev->of_node)) { in mwifiex_pcie_probe_of()
195 return -EINVAL; in mwifiex_pcie_probe_of()
207 struct pcie_service_card *card = adapter->card; in mwifiex_map_pci_memory()
210 mapping.addr = dma_map_single(&card->dev->dev, skb->data, size, flags); in mwifiex_map_pci_memory()
211 if (dma_mapping_error(&card->dev->dev, mapping.addr)) { in mwifiex_map_pci_memory()
213 return -1; in mwifiex_map_pci_memory()
[all …]
/linux-5.10/drivers/net/ethernet/ti/ !
Dam65-cpts.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com
9 #include <linux/clk-provider.h>
23 #include "am65-cpts.h"
133 AM65_CPTS_EV_ROLL, /* Time Stamp Rollover Event */
134 AM65_CPTS_EV_HALF, /* Time Stamp Half Rollover Event */
186 #define am65_cpts_write32(c, v, r) writel(v, &(c)->reg->r)
187 #define am65_cpts_read32(c, r) readl(&(c)->reg->r)
204 cpts->ts_add_val = (NSEC_PER_SEC / cpts->refclk_freq - 1) & 0x7; in am65_cpts_set_add_val()
206 am65_cpts_write32(cpts, cpts->ts_add_val, ts_add_val); in am65_cpts_set_add_val()
[all …]
/linux-5.10/drivers/net/ethernet/xircom/ !
Dxirc2ps_cs.c3 * Xircom Realport 10/100 (RE-100) driver
6 * including the CE2, CE IIps, RE-10, CEM28, CEM33, CE33, CEM56,
7 * CE3-100, CE3B, RE-100, REM10BT, and REM56G-100.
9 * 2000-09-24 <psheer@icon.co.za> The Xircom CE3B-100 may not
37 * the restrictions contained in a BSD-style copyright.)
55 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
160 DisableAutoTx = 0x40, /* disable auto-transmit */
164 /* values for the leds: Bits 2-0 for led 1
165 * 0 disabled Bits 5-3 for led 2
202 #define XIRCREG42_BOC 10 /* Back-Off Configuration */
[all …]
/linux-5.10/sound/pci/hda/ !
Dhda_controller.c1 // SPDX-License-Identifier: GPL-2.0-or-later
21 /* for art-tsc conversion */
59 return &apcm->info->stream[substream->stream]; in to_hda_pcm_stream()
69 if (!hinfo->ops.get_delay) in azx_adjust_codec_delay()
72 codec_frames = hinfo->ops.get_delay(hinfo, apcm->codec, substream); in azx_adjust_codec_delay()
74 substream->runtime->rate); in azx_adjust_codec_delay()
76 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) in azx_adjust_codec_delay()
79 return (nsec > codec_nsecs) ? nsec - codec_nsecs : 0; in azx_adjust_codec_delay()
90 struct azx *chip = apcm->chip; in azx_pcm_close()
94 mutex_lock(&chip->open_mutex); in azx_pcm_close()
[all …]

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