| /linux/arch/arm/boot/dts/aspeed/ |
| H A D | openbmc-flash-layout-128.dtsi | 8 u-boot@0 {
9 reg = <0x0 0xe0000>; // 896KB
14 reg = <0xe0000 0x20000>; // 128KB
19 reg = <0x100000 0x900000>; // 9MB
24 reg = <0xa00000 0x560000
[all...] |
| H A D | openbmc-flash-layout-64.dtsi | 11 u-boot@0 {
12 reg = <0x0 0xe0000>; // 896KB
17 reg = <0xe0000 0x20000>; // 128KB
22 reg = <0x100000 0x900000>; // 9MB
27 reg = <0xa00000 0x200000
[all...] |
| H A D | openbmc-flash-layout-64-alt.dtsi | 11 u-boot@0 {
12 reg = <0x0 0xe0000>; // 896KB
17 reg = <0xe0000 0x20000>; // 128KB
22 reg = <0x100000 0x900000>; // 9MB
27 reg = <0xa00000 0x200000
[all...] |
| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | qcom,gcc-mdm9607.yaml | 38 reg = <0x900000 0x4000>;
|
| H A D | qcom,gcc-mdm9615.yaml | 44 reg = <0x900000 0x4000>;
|
| H A D | qcom,gcc-msm8660.yaml | 49 reg = <0x900000 0x4000>;
|
| /linux/arch/arm/include/uapi/asm/ |
| H A D | unistd.h | 17 #define __NR_OABI_SYSCALL_BASE 0x900000
18 #define __NR_SYSCALL_MASK 0x0fffff
21 #define __NR_SYSCALL_BASE 0
33 #define __ARM_NR_BASE (__NR_SYSCALL_BASE+0x0f0000)
|
| /linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | apm,xgene1-msi.yaml | 37 reg = <0x79000000 0x900000>;
38 interrupts = <0x0 0x10 0x4>,
39 <0x0 0x11 0x4>,
40 <0x
[all...] |
| /linux/arch/arm/boot/dts/gemini/ |
| H A D | gemini-ssi1328.dts | 17 memory@0 {
20 reg = <0x00000000 0x8000000>;
28 bootargs = "console=ttyS0,19200n8 initrd=0x900000,9M";
37 #size-cells = <0>;
54 ethernet-port@0 {
67 reg = <0x30000000 0x03200000>;
70 pinctrl-0
[all...] |
| /linux/Documentation/devicetree/bindings/phy/ |
| H A D | ti,phy-am654-serdes.yaml | 56 - description: Clock output names for SERDES 0
86 reg = <0x900000 0x2000>;
96 mux-controls = <&serdes_mux 0>;
|
| /linux/arch/arm/boot/dts/marvell/ |
| H A D | armada-385-linksys-caiman.dts | 18 wan_amber@0 {
20 reg = <0x0>;
25 reg = <0x1>;
30 reg = <0x2>;
35 reg = <0x3>;
40 reg = <0x5>;
45 reg = <0x6>;
50 reg = <0x7>;
55 reg = <0x8>;
60 reg = <0x
[all...] |
| H A D | armada-385-linksys-shelby.dts | 18 wan_amber@0 {
20 reg = <0x0>;
25 reg = <0x1>;
30 reg = <0x2>;
35 reg = <0x3>;
40 reg = <0x5>;
45 reg = <0x6>;
50 reg = <0x7>;
55 reg = <0x8>;
60 reg = <0x
[all...] |
| H A D | armada-385-linksys-cobra.dts | 18 wan_amber@0 {
20 reg = <0x0>;
25 reg = <0x1>;
30 reg = <0x2>;
35 reg = <0x3>;
40 reg = <0x5>;
45 reg = <0x6>;
50 reg = <0x7>;
55 reg = <0x8>;
60 reg = <0x
[all...] |
| H A D | armada-xp-linksys-mamba.dts | 6 * remaps internal registers at 0xf1000000. Therefore, if earlyprintk
34 memory@0 {
36 reg = <0x00000000 0x00000000 0x00000000 0x10000000>; /* 256MB */
40 ranges = <MBUS_ID(0xf0, 0x01) 0 0
[all...] |
| /linux/arch/arm/boot/dts/microchip/ |
| H A D | pm9g45.dts | 19 reg = <0x70000000 0x8000000>;
40 pinctrl_nand_rb: nand-rb-0 {
55 timer@0 {
57 reg = <0>, <1>;
67 pinctrl-0 = <
73 slot@0 {
74 reg = <0>;
91 pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;
95 reg = <0x
[all...] |
| /linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | qcom,sm6115-tlmm.yaml | 59 - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-2])$"
101 reg = <0x500000 0x400000>,
102 <0x900000 0x400000>,
103 <0xd0000
[all...] |
| /linux/sound/drivers/vx/ |
| H A D | vx_cmd.c | 19 [CMD_VERSION] = { 0x010000, 2, RMH_SSIZE_FIXED, 1 },
20 [CMD_SUPPORTED] = { 0x020000, 1, RMH_SSIZE_FIXED, 2 },
21 [CMD_TEST_IT] = { 0x040000, 1, RMH_SSIZE_FIXED, 1 },
22 [CMD_SEND_IRQA] = { 0x070001, 1, RMH_SSIZE_FIXED, 0 },
23 [CMD_IBL] = { 0x080000, 1, RMH_SSIZE_FIXED, 4 },
24 [CMD_ASYNC] = { 0x0A0000, 1, RMH_SSIZE_ARG, 0 },
25 [CMD_RES_PIPE] = { 0x400000, 1, RMH_SSIZE_FIXED, 0 },
[all...] |
| /linux/arch/arm64/boot/dts/amlogic/ |
| H A D | amlogic-c3-c302x-aw409.dts | 22 memory@0 {
24 reg = <0x0 0x0 0x0 0x10000000>;
35 reg = <0x0 0x07f00000 0x0 0x900000>;
[all...] |
| H A D | amlogic-c3-c308l-aw419.dts | 22 memory@0 {
24 reg = <0x0 0x0 0x0 0x80000000>;
35 reg = <0x0 0x07f00000 0x0 0x900000>;
[all...] |
| /linux/arch/mips/boot/dts/mobileye/ |
| H A D | eyeq5.dtsi | 15 #size-cells = <0>;
16 cpu@0 {
19 reg = <0>;
34 reg = <0x8 0x04000000 0x0 0x1000000>;
37 reg = <0x8 0x05000000 0x
[all...] |
| /linux/arch/arm/boot/dts/qcom/ |
| H A D | qcom-mdm9615.dtsi | 27 #size-cells = <0>;
29 cpu0: cpu@0 {
31 reg = <0>;
45 #clock-cells = <0>;
66 reg = <0x02040000 0x1000>;
67 arm,data-latency = <2 2 0>;
76 reg = <0x02000000 0x1000>,
77 <0x0200200
[all...] |
| H A D | qcom-msm8660.dtsi | 18 #size-cells = <0>;
20 cpu@0 {
24 reg = <0>;
45 reg = <0x0 0x0>;
56 #clock-cells = <0>;
63 #clock-cells = <0>;
70 #clock-cells = <0>;
86 reg = < 0x02080000 0x100
[all...] |
| H A D | qcom-msm8960.dtsi | 20 #size-cells = <0>;
23 cpu@0 {
27 reg = <0>;
52 reg = <0x80000000 0>;
59 thermal-sensors = <&tsens 0>;
106 #clock-cells = <0>;
113 #clock-cells = <0>;
120 #clock-cells = <0>;
145 reg = <0x0200000
[all...] |
| /linux/drivers/net/wireless/ath/wil6210/ |
| H A D | wmi.c | 21 int agg_wsize; /* = 0; */
24 " 0 - use default; < 0 - don't auto-establish");
29 " 60G device led enablement. Set the led ID (0-2) to enable");
62 * AHB addresses starting from 0x880000
75 * 0x880000 .. 0xa80000 2Mb BAR0
76 * 0x800000 .. 0x808000 0x90000
[all...] |
| /linux/drivers/pci/controller/ |
| H A D | pcie-rockchip.h | 33 #define PCIE_CLIENT_BASE 0x0
34 #define PCIE_CLIENT_CONFIG (PCIE_CLIENT_BASE + 0x00)
35 #define PCIE_CLIENT_CONF_ENABLE HIWORD_UPDATE_BIT(0x0001)
36 #define PCIE_CLIENT_CONF_DISABLE HIWORD_UPDATE(0x0001, 0)
37 #define PCIE_CLIENT_LINK_TRAIN_ENABLE HIWORD_UPDATE_BIT(0x0002)
38 #define PCIE_CLIENT_LINK_TRAIN_DISABLE HIWORD_UPDATE(0x0002, 0)
39 #define PCIE_CLIENT_ARI_ENABLE HIWORD_UPDATE_BIT(0x0008)
40 #define PCIE_CLIENT_CONF_LANE_NUM(x) HIWORD_UPDATE(0x003
[all...] |