Lines Matching +full:0 +full:x900000
20 #size-cells = <0>;
23 cpu@0 {
27 reg = <0>;
52 reg = <0x80000000 0>;
59 thermal-sensors = <&tsens 0>;
106 #clock-cells = <0>;
113 #clock-cells = <0>;
120 #clock-cells = <0>;
145 reg = <0x02000000 0x1000>,
146 <0x02002000 0x1000>;
155 reg = <0x0200a000 0x100>;
159 cpu-offset = <0x80000>;
164 reg = <0x00700000 0x1000>;
169 reg = <0x404 0x10>;
173 reg = <0x414 0x10>;
180 gpio-ranges = <&msmgpio 0 0 152>;
185 reg = <0x800000 0x4000>;
192 reg = <0x900000 0x4000>;
213 reg = <0x28000000 0x1000>;
218 <0>,
219 <0>, <0>,
220 <0>, <0>,
221 <0>;
234 reg = <0x4000000 0x1000>;
241 <0>,
242 <0>,
243 <0>,
244 <0>,
245 <0>;
258 reg = <0x2011000 0x1000>;
261 #clock-cells = <0>;
266 reg = <0x108000 0x1000>;
267 qcom,ipc = <&l2cc 0x8 2>;
277 reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
281 #clock-cells = <0>;
286 reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
290 #clock-cells = <0>;
295 reg = <0x02089000 0x1000>, <0x02009000 0x1000>;
305 reg = <0x02099000 0x1000>, <0x02009000 0x1000>;
316 reg = <0x16400000 0x100>;
327 reg = <0x16440000 0x1000>,
328 <0x16400000 0x1000>;
338 reg = <0x500000 0x1000>;
344 reg = <0x1a500000 0x200>;
351 arm,primecell-periphid = <0x00051180>;
353 reg = <0x12180000 0x2000>;
369 reg = <0x12182000 0x4000>;
374 qcom,ee = <0>;
380 arm,primecell-periphid = <0x00051180>;
381 reg = <0x12400000 0x2000>;
397 reg = <0x12402000 0x4000>;
402 qcom,ee = <0>;
407 reg = <0x1a400000 0x100>;
413 reg = <0x16000000 0x100>;
423 #size-cells = <0>;
424 reg = <0x16080000 0x1000>;
426 cs-gpios = <&msmgpio 8 0>;
436 reg = <0x12500000 0x200>,
437 <0x12500200 0x200>;
446 ahb-burst-config = <0>;
458 resets = <&usb1 0>;
460 #phy-cells = <0>;
467 reg = <0x16200000 0x100>;
478 reg = <0x16280000 0x1000>;
479 pinctrl-0 = <&i2c3_default_state>;
487 #size-cells = <0>;