dts/mobileye/eyeq5.dtsi

15 		#size-cells = <0>;
16 		cpu@0 {
19 			reg = <0>;
34 			reg = <0x8 0x04000000 0x0 0x1000000>;
37 			reg = <0x8 0x05000000 0x0 0x1000000>;
40 			reg = <0x8 0x06000000 0x0 0x100000>;
43 			reg = <0x8 0x06100000 0x0 0x100000>;
47 			reg = <0x8 0x06200000 0x0 0x100000>;
49 		mhm_reserved_0: the-mhm-reserved-0@0 {
50 			reg = <0x8 0x00000000 0x0 0x0000800>;
55 			reg = <0x0 0x0461fe00 0x0 0x200>;
66 					reg = <0x7c 0x6>;
70 					reg = <0x82 0x6>;
85 		#address-cells = <0>;
91 		#clock-cells = <0>;
97 		#clock-cells = <0>;
103 		#clock-cells = <0>;
115 			reg = <0 0x300000 0x0 0x1000>;
120 			#size-cells = <0>;
123 			resets = <&olb 0 13>;
125 			mobileye,olb = <&olb 0>;
130 			reg = <0 0x400000 0x0 0x1000>;
135 			#size-cells = <0>;
138 			resets = <&olb 0 14>;
145 			reg = <0 0x500000 0x0 0x1000>;
150 			#size-cells = <0>;
153 			resets = <&olb 0 15>;
160 			reg = <0 0x600000 0x0 0x1000>;
165 			#size-cells = <0>;
168 			resets = <&olb 0 16>;
175 			reg = <0 0x700000 0x0 0x1000>;
180 			#size-cells = <0>;
183 			resets = <&olb 0 17>;
190 			reg = <0 0x800000 0x0 0x1000>;
196 			resets = <&olb 0 10>;
198 			pinctrl-0 = <&uart0_pins>;
203 			reg = <0 0x900000 0x0 0x1000>;
209 			resets = <&olb 0 11>;
211 			pinctrl-0 = <&uart1_pins>;
216 			reg = <0 0xa00000 0x0 0x1000>;
222 			resets = <&olb 0 12>;
224 			pinctrl-0 = <&uart2_pins>;
229 			reg = <0 0xe00000 0x0 0x400>;
238 			reg = <0x0 0x140000 0x0 0x20000>;
259 			reg = <0 0x2200000 0x0 0x1000>;
281 			reg = <0x0 0x1400000 0x0 0x1000>;
282 			gpio-bank = <0>;
288 			gpio-ranges = <&olb 0 0 29>;
291 			resets = <&olb 0 26>;
296 			reg = <0x0 0x1500000 0x0 0x1000>;
303 			gpio-ranges = <&olb 0 29 23>;
306 			resets = <&olb 0 26>;