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/linux/drivers/net/ipa/reg/
H A Dgsi_reg-v3.5.1.c14 0x0000c020 + 0x1000 * GSI_EE_AP);
17 0x0000c024 + 0x1000 * GSI_EE_AP);
20 [CHTYPE_PROTOCOL] = GENMASK(2, 0),
32 0x0001c000 + 0x4000 * GSI_EE_AP, 0x80);
35 [CH_R_LENGTH] = GENMASK(15, 0),
[all...]
H A Dgsi_reg-v3.1.c14 0x0000c020 + 0x1000 * GSI_EE_AP);
17 0x0000c024 + 0x1000 * GSI_EE_AP);
20 [CHTYPE_PROTOCOL] = GENMASK(2, 0),
32 0x0001c000 + 0x4000 * GSI_EE_AP, 0x80);
35 [CH_R_LENGTH] = GENMASK(15, 0),
[all...]
H A Dgsi_reg-v4.11.c14 0x0000c020 + 0x1000 * GSI_EE_AP);
17 0x0000c024 + 0x1000 * GSI_EE_AP);
20 [CHTYPE_PROTOCOL] = GENMASK(2, 0),
32 0x0000f000 + 0x4000 * GSI_EE_AP, 0x80);
35 [CH_R_LENGTH] = GENMASK(19, 0),
[all...]
H A Dgsi_reg-v4.9.c14 0x0000c020 + 0x1000 * GSI_EE_AP);
17 0x0000c024 + 0x1000 * GSI_EE_AP);
20 [CHTYPE_PROTOCOL] = GENMASK(2, 0),
32 0x0000f000 + 0x4000 * GSI_EE_AP, 0x80);
35 [CH_R_LENGTH] = GENMASK(19, 0),
[all...]
H A Dgsi_reg-v4.5.c14 0x0000c020 + 0x1000 * GSI_EE_AP);
17 0x0000c024 + 0x1000 * GSI_EE_AP);
20 [CHTYPE_PROTOCOL] = GENMASK(2, 0),
32 0x0000f000 + 0x4000 * GSI_EE_AP, 0x80);
35 [CH_R_LENGTH] = GENMASK(15, 0),
[all...]
H A Dgsi_reg-v4.0.c14 0x0000c020 + 0x1000 * GSI_EE_AP);
17 0x0000c024 + 0x1000 * GSI_EE_AP);
20 [CHTYPE_PROTOCOL] = GENMASK(2, 0),
32 0x0001c000 + 0x4000 * GSI_EE_AP, 0x80);
35 [CH_R_LENGTH] = GENMASK(15, 0),
[all...]
/linux/arch/arm64/boot/dts/freescale/
H A Dqoriq-bman-portals.dtsi14 bman-portal@0 {
20 reg = <0x0 0x4000>, <0x4000000 0x4000>;
26 reg = <0x10000 0x4000>, <
[all...]
H A Dqoriq-qman-portals.dtsi14 qportal0: qman-portal@0 {
20 reg = <0x0 0x4000>, <0x4000000 0x4000>;
22 cell-index = <0>;
27 reg = <0x10000 0x400
[all...]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx25.dtsi47 #size-cells = <0>;
49 cpu@0 {
52 reg = <0>;
60 reg = <0x68000000 0x8000000>;
66 #clock-cells = <0>;
73 #phy-cells = <0>;
78 #phy-cells = <0>;
92 reg = <0x43f00000 0x10000
[all...]
H A Dimx50.dtsi48 #size-cells = <0>;
49 cpu@0 {
52 reg = <0x0>;
60 reg = <0x0fffc000 0x4000>;
66 #clock-cells = <0>;
72 #clock-cells = <0>;
78 #clock-cells = <0>;
79 clock-frequency = <0>;
[all...]
H A Dimx31.dtsi35 #size-cells = <0>;
37 cpu@0 {
40 reg = <0>;
48 reg = <0x68000000 0x100000>;
60 reg = <0x1fffc000 0x4000>;
63 ranges = <0 0x1fffc00
[all...]
H A Dimx6ul.dtsi58 #size-cells = <0>;
60 cpu0: cpu@0 {
63 reg = <0>;
108 #clock-cells = <0>;
115 #clock-cells = <0>;
122 #clock-cells = <0>;
123 clock-frequency = <0>;
129 #clock-cells = <0>;
130 clock-frequency = <0>;
149 reg = <0x0090000
[all...]
H A Dimx6qdl.dtsi59 #clock-cells = <0>;
65 #clock-cells = <0>;
66 clock-frequency = <0>;
71 #clock-cells = <0>;
78 #size-cells = <0>;
83 lvds-channel@0 {
85 #size-cells = <0>;
86 reg = <0>;
89 port@0 {
90 reg = <0>;
[all...]
H A Dimx6sx.dtsi61 #size-cells = <0>;
63 cpu0: cpu@0 {
66 reg = <0>;
100 #clock-cells = <0>;
107 #clock-cells = <0>;
114 #clock-cells = <0>;
115 clock-frequency = <0>;
121 #clock-cells = <0>;
122 clock-frequency = <0>;
128 #clock-cells = <0>;
[all...]
H A Dimx51.dtsi46 reg = <0xe0000000 0x4000>;
52 #clock-cells = <0>;
58 #clock-cells = <0>;
59 clock-frequency = <0>;
64 #clock-cells = <0>;
65 clock-frequency = <0>;
70 #clock-cells = <0>;
77 #size-cells = <0>;
[all...]
H A Dimx35.dtsi39 #size-cells = <0>;
41 cpu@0 {
44 reg = <0>;
52 reg = <0x68000000 0x10000000>;
64 reg = <0x30000000 0x1000>;
73 reg = <0x43f00000 0x100000>;
78 #size-cells = <0>;
[all...]
H A Dimx6sl.dtsi51 #size-cells = <0>;
53 cpu0: cpu@0 {
56 reg = <0x0>;
86 #clock-cells = <0>;
92 #clock-cells = <0>;
100 interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
105 #phy-cells = <0>;
117 reg = <0x00900000 0x20000>;
118 ranges = <0
[all...]
H A Dimxrt1050.dtsi19 #clock-cells = <0>;
25 #clock-cells = <0>;
33 reg = <0x40184000 0x4000>;
42 reg = <0x401f8000 0x4000>;
43 fsl,mux_mask = <0x7>;
48 reg = <0x400d800
[all...]
/linux/arch/powerpc/boot/dts/fsl/
H A Db4860si-post.dtsi37 /* controller at 0x200000 */
64 dcsr-epu@0 {
79 reg = <0x13000 0x1000>;
96 reg = <0x108000 0x1000 0x109000 0x1000>;
101 reg = <0x110000 0x100
[all...]
H A Db4si-post.dtsi37 alloc-ranges = <0 0 0x10000 0>;
42 alloc-ranges = <0 0 0x10000 0>;
47 alloc-ranges = <0 0
[all...]
H A Dqoriq-bman1-portals.dtsi40 bman-portal@0 {
42 reg = <0x0 0x4000>, <0x100000 0x1000>;
43 interrupts = <105 2 0 0>;
47 reg = <0x4000
[all...]
H A Dt2081si-post.dtsi37 alloc-ranges = <0 0 0x10000 0>;
42 alloc-ranges = <0 0 0x10000 0>;
47 alloc-ranges = <0 0
[all...]
H A Dqoriq-qman1-portals.dtsi40 qportal0: qman-portal@0 {
42 reg = <0x0 0x4000>, <0x100000 0x1000>;
43 interrupts = <104 2 0 0>;
44 cell-index = <0x0>;
48 reg = <0x400
[all...]
/linux/arch/arm64/boot/dts/apple/
H A Dt600x-die0.dtsi3 * Devices used on die 0 on the Apple T6002 "M1 Ultra" SoC and present on
12 reg = <0x2 0x8e03c000 0x0 0x14000>;
21 reg = <0x2 0x8e100000 0x0 0xc000>,
22 <0x
[all...]
/linux/include/linux/mfd/wm8350/
H A Daudio.h13 #define WM8350_CLOCK_CONTROL_1 0x28
14 #define WM8350_CLOCK_CONTROL_2 0x29
15 #define WM8350_FLL_CONTROL_1 0x2A
16 #define WM8350_FLL_CONTROL_2 0x2B
17 #define WM8350_FLL_CONTROL_3 0x2C
18 #define WM8350_FLL_CONTROL_4 0x2D
19 #define WM8350_DAC_CONTROL 0x30
20 #define WM8350_DAC_DIGITAL_VOLUME_L 0x32
21 #define WM8350_DAC_DIGITAL_VOLUME_R 0x33
22 #define WM8350_DAC_LR_RATE 0x3
[all...]

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