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/qemu/hw/net/can/
H A Dtrace-events4 xlnx_can_rx_fifo_filter_reject(uint32_t id, uint8_t dlc) "Frame: ID: 0x%08x DLC: 0x%02x"
7 …b6, uint8_t db7) "Frame: ID: 0x%08x DLC: 0x%02x DATA: 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x…
8 …b6, uint8_t db7) "Frame: ID: 0x%08x DLC: 0x%02x DATA: 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x…
13 …nfd_rx_fifo_filter_reject(char *path, uint32_t id, uint8_t dlc) "%s: Frame: ID: 0x%08x DLC: 0x%02x"
14 …th, uint32_t id, uint8_t dlc, uint8_t flags) "%s: Frame: ID: 0x%08x DLC: 0x%02x CANFD Flag: 0x%02x"
15 …th, uint32_t id, uint8_t dlc, uint8_t flgas) "%s: Frame: ID: 0x%08x DLC: 0x%02x CANFD Flag: 0x%02x"
/qemu/hw/i2c/
H A Dtrace-events5 bitbang_i2c_addr(uint8_t addr) "Address 0x%02x"
6 bitbang_i2c_send(uint8_t byte) "TX byte 0x%02x"
7 bitbang_i2c_recv(uint8_t byte) "RX byte 0x%02x"
12 i2c_event(const char *event, uint8_t address) "%s(addr:0x%02x)"
13 i2c_send(uint8_t address, uint8_t data) "send(addr:0x%02x) data:0x%02x"
14 i2c_send_async(uint8_t address, uint8_t data) "send_async(addr:0x%02x) data:0x%02x"
15 i2c_recv(uint8_t address, uint8_t data) "recv(addr:0x%02x) data:0x%02x"
20 smbus_ioport_readb(uint16_t addr, uint8_t data) "[0x%04" PRIx16 "] -> val=0x%02x"
21 smbus_ioport_writeb(uint16_t addr, uint8_t data) "[0x%04" PRIx16 "] <- val=0x%02x"
22 smbus_transaction(uint8_t addr, uint8_t prot) "addr=0x%02x prot=0x%02x"
[all …]
/qemu/hw/pci/
H A Dtrace-events4 …nt32_t bus, uint32_t slot, uint32_t func, uint8_t old, uint8_t new) "%s %02x:%02x.%x REJECTED PM t…
5 …nt32_t bus, uint32_t slot, uint32_t func, uint8_t old, uint8_t new) "%s %02x:%02x.%x PM transition…
6 …int32_t slot, uint32_t func, int bar, uint64_t addr, uint64_t size) "%s %02x:%02x.%x %d,0x%"PRIx64…
7 …int32_t slot, uint32_t func, int bar, uint64_t addr, uint64_t size) "%s %02x:%02x.%x %d,0x%"PRIx64…
12 …ange(uint8_t old_checksum, uint8_t new_checksum) "ROM checksum changed from %02"PRIx8" to %02"PRIx8
15 …2_t bus, uint32_t slot, uint32_t func, unsigned offs, unsigned val) "%s %02x:%02x.%x @0x%x -> 0x%x"
16 …2_t bus, uint32_t slot, uint32_t func, unsigned offs, unsigned val) "%s %02x:%02x.%x @0x%x <- 0x%x"
22 sriov_register_vfs(const char *name, int slot, int function, int num_vfs) "%s %02x:%x: creating %d …
23 sriov_unregister_vfs(const char *name, int slot, int function) "%s %02x:%x: Unregistering vf devs"
24 …name, int slot, int fun, uint32_t offset, uint32_t val, uint32_t len) "%s %02x:%x: sriov offset 0x…
/qemu/hw/rtc/
H A Dtrace-events12 … year, int month, int day, int hour, int min, int sec) "Get time from host: %d-%d-%d %2d:%02d:%02d"
22 aspeed_rtc_read(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64
23 aspeed_rtc_write(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64
26 ds1338_recv(uint32_t addr, uint8_t value) "[0x%" PRIx32 "] -> 0x%02" PRIx8
27 ds1338_send(uint32_t addr, uint8_t value) "[0x%" PRIx32 "] <- 0x%02" PRIx8
30 m48txx_nvram_io_read(uint64_t addr, uint64_t value) "io read addr:0x%04" PRIx64 " value:0x%02" PRIx…
31 m48txx_nvram_io_write(uint64_t addr, uint64_t value) "io write addr:0x%04" PRIx64 " value:0x%02" PR…
32 m48txx_nvram_mem_read(uint32_t addr, uint32_t value) "mem read addr:0x%04x value:0x%02x"
33 m48txx_nvram_mem_write(uint32_t addr, uint32_t value) "mem write addr:0x%04x value:0x%02x"
36 goldfish_rtc_read(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64
[all …]
/qemu/include/qemu/
H A Duuid.h76 #define UUID_FMT "%02hhx%02hhx%02hhx%02hhx-" \
77 "%02hhx%02hhx-%02hhx%02hhx-" \
78 "%02hhx%02hhx-" \
79 "%02hhx%02hhx%02hhx%02hhx%02hhx%02hhx"
/qemu/hw/misc/macio/
H A Dtrace-events5 cuda_data_send(uint8_t data) "send: 0x%02x"
6 cuda_data_recv(uint8_t data) "recv: 0x%02x"
9 cuda_packet_receive_data(int i, const uint8_t data) "[%d] 0x%02x"
11 cuda_packet_send_data(int i, const uint8_t data) "[%d] 0x%02x"
27 pmu_cmd_set_int_mask(int intmask) "Setting PMU int mask to 0x%02x"
30 …int indata3, int indata4) "ADB request: len=%d, cmd=0x%02x, pflags=0x%02x, adblen=%d: 0x%02x 0x%02…
33 pmu_dispatch_unknown_cmd(int cmd) "Unknown PMU command 0x%02x"
36 pmu_debug_protocol_error(int portB) "protocol error! portB=0x%02x"
38 pmu_debug_protocol_cmd(int cmd, int cmdlen, int rsplen) "Got command byte 0x%02x, clen=%d, rlen=%d"
43 pmu_debug_protocol_cmd_resp_complete(int ier) "Response send complete. IER=0x%02x"
/qemu/target/xtensa/core-de212/
H A Dgdb-config.c.inc123 …02:03:52:a4:0c:03:60:55:11:03:52:c5:20:03:60:65:40:03:62:64:00:03:52:24:01:03:62:24:02","03:52:64:…
125 …02:03:52:a4:0c:03:60:55:11:03:52:c5:24:03:60:65:40:03:62:64:00:03:52:24:01:03:62:24:02","03:52:64:…
127 …02:03:52:a4:0c:03:60:55:11:03:52:c5:28:03:60:65:40:03:62:64:00:03:52:24:01:03:62:24:02","03:52:64:…
129 …02:03:52:a4:0f:03:60:55:11:03:52:d5:03:03:60:65:40:03:62:64:00:03:52:24:01:03:62:24:02","03:52:64:…
131 …02:03:52:a4:0f:03:60:55:11:03:52:c5:a0:03:52:d5:04:03:60:65:40:03:62:64:00:03:52:24:01:03:62:24:02…
133 …02:03:52:a4:0f:03:60:55:11:03:52:c5:a4:03:52:d5:04:03:60:65:40:03:62:64:00:03:52:24:01:03:62:24:02…
135 …02:03:52:a4:0f:03:60:55:11:03:52:c5:b0:03:52:d5:04:03:60:65:40:03:62:64:00:03:52:24:01:03:62:24:02…
137 …02:03:52:a4:0f:03:60:55:11:03:52:c5:b4:03:52:d5:04:03:60:65:40:03:62:64:00:03:52:24:01:03:62:24:02…
139 …02:03:52:a4:0f:03:60:55:11:03:52:c5:b8:03:52:d5:04:03:60:65:40:03:62:64:00:03:52:24:01:03:62:24:02…
141 …02:03:52:a4:00:03:60:55:11:03:60:65:40:03:62:64:00:03:52:24:01:03:62:24:02","03:52:64:01:03:62:64:…
[all …]
/qemu/hw/char/
H A Dtrace-events4 …llel_ioport_read(const char *desc, uint16_t addr, uint8_t value) "read [%s] addr 0x%02x val 0x%02x"
5 …el_ioport_write(const char *desc, uint16_t addr, uint8_t value) "write [%s] addr 0x%02x val 0x%02x"
8 serial_read(uint16_t addr, uint8_t value) "read addr 0x%02x val 0x%02x"
9 serial_write(uint16_t addr, uint8_t value) "write addr 0x%02x val 0x%02x"
24 …ev, unsigned int addr, unsigned int size, uint64_t value) "tty: %p reg: 0x%02x size: %d value: 0x%…
25 …ev, unsigned int addr, unsigned int size, uint64_t value) "tty: %p reg: 0x%02x size: %d value: 0x%…
41 escc_put_queue(char channel, int b) "channel %c put: 0x%02x"
42 escc_get_queue(char channel, int val) "channel %c get 0x%02x"
65 …ed rx_fifo_used, size_t rx_fifo_depth, unsigned rx_fifo_available) "LCR 0x%02x, RX FIFO used %u/%z…
66 pl011_fifo_rx_put(uint32_t c, unsigned read_count, size_t rx_fifo_depth) "RX FIFO push char [0x%02x…
[all …]
H A Dparallel.c141 pdebug("wd%02x\n", val); in parallel_ioport_write_hw()
146 pdebug("ws%02x\n", val); in parallel_ioport_write_hw()
154 pdebug("wc%02x\n", val); in parallel_ioport_write_hw()
172 pdebug("wa%02x s\n", val); in parallel_ioport_write_hw()
178 pdebug("wa%02x t\n", val); in parallel_ioport_write_hw()
181 pdebug("wa%02x\n", val); in parallel_ioport_write_hw()
187 pdebug("we%02x s\n", val); in parallel_ioport_write_hw()
192 pdebug("we%02x t\n", val); in parallel_ioport_write_hw()
195 pdebug("we%02x\n", val); in parallel_ioport_write_hw()
296 pdebug("rd%02x\n", ret); in parallel_ioport_read_hw()
[all …]
/qemu/hw/i386/
H A Dtrace-events10 …ce(uint8_t bus, uint8_t dev, uint8_t fn) "context invalidate device %02"PRIx8":%02"PRIx8".%02"PRIx8
35 …in, uint64_t hi, uint64_t lo) "%s: replay valid context device %02"PRIx8":%02"PRIx8".%02"PRIx8" do…
36 …int8_t bus, uint8_t dev, uint8_t fn) "replay invalid context device %02"PRIx8":%02"PRIx8".%02"PRIx8
43 vtd_switch_address_space(uint8_t bus, uint8_t slot, uint8_t fn, bool on) "Device %02x:%02x.%x switc…
44 …_t bus, uint8_t slot, uint8_t fn, uint64_t iova, uint64_t size) "Device %02x:%02x.%x start 0x%"PRI…
56 …slot, uint8_t func, uint64_t iova, uint64_t gpa, uint64_t mask) "dev %02x:%02x.%02x iova 0x%"PRIx6…
75 … uint64_t gpa, uint64_t txaddr) " update iotlb domid 0x%"PRIx16" devid: %02x:%02x.%x gpa 0x%"PRIx6…
90 amdvi_devtab_inval(uint8_t bus, uint8_t slot, uint8_t func) "device table entry for devid: %02x:%02…
99 …_t slot, uint8_t func, uint64_t addr, uint64_t txaddr) "hit iotlb devid %02x:%02x.%x gpa 0x%"PRIx6…
100 …us, uint8_t slot, uint8_t func, uint64_t addr, uint64_t txaddr) "devid: %02x:%02x.%x gpa 0x%"PRIx6…
[all …]
/qemu/hw/nvme/
H A Dnguid.c27 "%02hhx%02hhx%02hhx%02hhx" \
28 "%02hhx%02hhx%02hhx%02hhx" \
29 "%02hhx%02hhx%02hhx%02hhx" \
30 "%02hhx%02hhx%02hhx%02hhx"
122 ret = sscanf(ptr, "%02hhx", &id[i]); in nvme_nguid_parse()
/qemu/hw/ide/
H A Dtrace-events5 … uint32_t val, void *bus, void *s) "IDE PIO rd @ 0x%"PRIx32" (%s); val 0x%02"PRIx32"; bus %p IDES…
6 …, uint32_t val, void *bus, void *s) "IDE PIO wr @ 0x%"PRIx32" (%s); val 0x%02"PRIx32"; bus %p IDES…
7 … void *s) "IDE PIO rd @ 0x%"PRIx32" (Alt Status); val 0x%02"PRIx32"; bus %p; IDE…
8 … "IDE PIO wr @ 0x%"PRIx32" (Device Control); val 0x%02"PRIx32"; bus %p"
15 ide_bus_exec_cmd(void *bus, void *state, uint32_t cmd) "IDE exec cmd: bus %p; state %p; cmd 0x%02x"
27 bmdma_read_cmd646(uint64_t addr, uint32_t val) "bmdma: readb 0x%"PRIx64" : 0x%02x"
28 bmdma_write_cmd646(uint64_t addr, uint64_t val) "bmdma: writeb 0x%"PRIx64" : 0x%02"PRIx64
37 bmdma_read(uint64_t addr, uint8_t val) "bmdma: readb 0x%"PRIx64" : 0x%02x"
38 bmdma_write(uint64_t addr, uint64_t val) "bmdma: writeb 0x%"PRIx64" : 0x%02"PRIx64
41 sii3112_read(int size, uint64_t addr, uint64_t val) "bmdma: read (size %d) 0x%"PRIx64" : 0x%02"PRIx…
[all …]
/qemu/hw/net/
H A Dtrace-events14 lan9118_phy_read(uint16_t val, int reg) "[0x%02x] -> 0x%04" PRIx16
15 lan9118_phy_write(uint16_t val, int reg) "[0x%02x] <- 0x%04" PRIx16
28 mipsnet_irq(uint32_t isr, uint32_t intctl) "set irq to %d (0x%02x)"
33 ne2000_ioport_read(uint64_t addr, uint64_t val) "io read addr=0x%02" PRIx64 " val=0x%02" PRIx64
34 ne2000_ioport_write(uint64_t addr, uint64_t val) "io write addr=0x%02" PRIx64 " val=0x%02" PRIx64
37 open_eth_mii_write(unsigned idx, uint16_t v) "MII[0x%02x] <- 0x%04x"
38 open_eth_mii_read(unsigned idx, uint16_t v) "MII[0x%02x] -> 0x%04x"
45 open_eth_reg_read(uint32_t addr, uint32_t v) "MAC[0x%02x] -> 0x%08x"
46 open_eth_reg_write(uint32_t addr, uint32_t v) "MAC[0x%02x] <- 0x%08x"
59 pcnet_aprom_writeb(void *opaque, uint32_t addr, uint32_t val) "opaque=%p addr=0x%08x val=0x%02x"
[all …]
/qemu/hw/sd/
H A Dtrace-events17 sdbus_command(const char *bus_name, uint8_t cmd, uint32_t arg) "@%s CMD%02d arg 0x%08x"
18 sdbus_read(const char *bus_name, uint8_t value) "@%s value 0x%02x"
19 sdbus_write(const char *bus_name, uint8_t value) "@%s value 0x%02x"
26 sdhci_send_command(uint8_t cmd, uint32_t arg) "CMD%02u ARG[0x%08x]"
30 sdhci_end_transfer(uint8_t cmd, uint32_t arg) "Automatically issue CMD%02u 0x%08x"
40 …har *cmd_desc, uint8_t cmd, uint32_t arg, const char *state) "%s %20s/ CMD%02d arg 0x%08x (state %…
41 …r *acmd_desc, uint8_t acmd, uint32_t arg, const char *state) "%s %23s/ACMD%02d arg 0x%08x (state %…
57 …md_desc, uint8_t cmd, uint32_t offset, uint8_t value) "%s %20s/ CMD%02d ofs %"PRIu32" value 0x%02x"
58 …int8_t cmd, uint32_t offset, uint64_t size, uint32_t blklen) "%s %20s/ CMD%02d ofs %"PRIu32" size …
60 sdcard_ext_csd_update(unsigned index, uint8_t oval, uint8_t nval) "index %u: 0x%02x -> 0x%02x"
[all …]
/qemu/gdbstub/
H A Dtrace-events5 gdbstub_op_exiting(uint8_t code) "notifying exit with code=0x%02x"
21 gdbstub_io_got_unexpected(uint8_t ch) "Got 0x%02x when expecting ACK/NACK"
23 gdbstub_err_garbage(uint8_t ch) "received garbage between packets: 0x%02x"
25 gdbstub_err_invalid_repeat(uint8_t ch) "got invalid RLE count: 0x%02x"
27 gdbstub_err_checksum_invalid(uint8_t ch) "got invalid command checksum digit: 0x%02x"
28 …pected, uint8_t got) "got command packet with incorrect checksum, expected=0x%02x, received=0x%02x"
29 gdbstub_err_unexpected_runpkt(uint8_t ch) "unexpected packet (0x%02x) while target running"
/qemu/hw/misc/
H A Dtrace-events66 ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = 0x%02x"
67 ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= 0x%02x"
76 slavio_cfg_mem_writeb(uint32_t val) "Write config 0x%02x"
77 slavio_cfg_mem_readb(uint32_t ret) "Read config 0x%02x"
78 slavio_diag_mem_writeb(uint32_t val) "Write diag 0x%02x"
79 slavio_diag_mem_readb(uint32_t ret) "Read diag 0x%02x"
80 slavio_mdm_mem_writeb(uint32_t val) "Write modem control 0x%02x"
81 slavio_mdm_mem_readb(uint32_t ret) "Read modem control 0x%02x"
82 slavio_aux1_mem_writeb(uint32_t val) "Write aux1 0x%02x"
83 slavio_aux1_mem_readb(uint32_t ret) "Read aux1 0x%02x"
[all …]
/qemu/hw/scsi/
H A Dtrace-events16 …n, int tag, int key, int asc, int ascq) "target %d lun %d tag %d key 0x%02x asc 0x%02x ascq 0x%02x"
17 …t target, int lun, int key, int asc, int ascq) "target %d lun %d key 0x%02x asc 0x%02x ascq 0x%02x"
19 …uiry(int target, int lun, int tag, int cdb1, int cdb2) "target %d lun %d tag %d page 0x%02x/0x%02x"
161 esp_error_invalid_write(uint32_t val, uint32_t addr) "invalid write of 0x%02x at [0x%x]"
206 esp_pci_error_invalid_write_dma(uint32_t val, uint32_t addr) "invalid write of 0x%02x at [0x%x]"
229 …direct_data_buf(unsigned a, unsigned b, unsigned c, unsigned d) " data: %02x %02x %02x %02x..."
233 …igned s5, unsigned s6, unsigned s7) "Sense data, %d bytes: %02x %02x %02x %02x %02x %02x %02x %02x"
234 …unsigned s14, unsigned s15) " %02x %02x %02x %02x %02x %02x %02x %02x"
239 spapr_vscsi_process_tsk_mgmt(uint8_t func) "tsk_mgmt_func 0x%02x"
242 spapr_vscsi_do_crq(unsigned c0, unsigned c1) "crq: %02x %02x ..."
[all …]
/qemu/hw/sensor/
H A Dtrace-events4 tmp105_read(uint8_t dev, uint8_t addr) "device: 0x%02x, addr: 0x%02x"
5 tmp105_write(uint8_t dev, uint8_t addr) "device: 0x%02x, addr 0x%02x"
6 tmp105_write_shutdown(uint8_t dev) "device: 0x%02x"
/qemu/pc-bios/s390-ccw/
H A Dnetmain.c160 printf(" Using MAC address: %02x:%02x:%02x:%02x:%02x:%02x\n", in net_init_ip()
284 sprintf(uuid_str, "%02x%02x%02x%02x-%02x%02x-%02x%02x-%02x%02x-" in get_uuid()
285 "%02x%02x%02x%02x%02x%02x", uuid[0], uuid[1], uuid[2], uuid[3], in get_uuid()
/qemu/hw/block/
H A Dtrace-events4 fdc_ioport_read(uint8_t reg, uint8_t value) "read reg 0x%02x val 0x%02x"
5 fdc_ioport_write(uint8_t reg, uint8_t value) "write reg 0x%02x val 0x%02x"
21 …uint8_t cmd, uint8_t wcycle) "%s: offset:0x%04" PRIx64 " size:%u value:0x%04x cmd:0x%02x wcycle:%u"
31 pflash_timer_expired(const char *name, uint8_t cmd) "%s: command 0x%02x done"
32 …ame, uint64_t offset, uint8_t cmd, uint16_t addr0) "%s: unlock0 failed 0x%" PRIx64 " 0x%02x 0x%04x"
33 …k1_failed(const char *name, uint64_t offset, uint8_t cmd) "%s: unlock0 failed 0x%" PRIx64 " 0x%02x"
40 …te_failed(const char *name, uint64_t offset, uint8_t cmd) "%s: command failed 0x%" PRIx64 " 0x%02x"
41 pflash_write_invalid(const char *name, uint8_t cmd) "%s: invalid write for command 0x%02x"
42 pflash_write_invalid_command(const char *name, uint8_t cmd) "%s: invalid command 0x%02x (wc 5)"
43 pflash_write_invalid_state(const char *name, uint8_t cmd, int wc) "%s: invalid command state 0x%02x…
[all …]
/qemu/pc-bios/
HDhppa-firmware.img ... 02x%02x-%02x%02x-%02x%02x-% ...
/qemu/docs/
H A Dqemupciserial.inf74 HKR,Child0000,ResourceMap,1,02
79 HKR,Child0000,ResourceMap,1,02
82 HKR,Child0001,ResourceMap,1,02
87 HKR,Child0000,ResourceMap,1,02
90 HKR,Child0001,ResourceMap,1,02
93 HKR,Child0002,ResourceMap,1,02
96 HKR,Child0003,ResourceMap,1,02
/qemu/hw/tpm/
H A Dtrace-events11 tpm_tis_data_read(uint32_t value, uint32_t off) "byte 0x%02x [%d]"
28 tpm_spapr_do_crq(uint8_t raw1, uint8_t raw2) "1st 2 bytes in CRQ: 0x%02x 0x%02x"
35 tpm_spapr_do_crq_unknown_msg_type(uint8_t type) "Unknown message type 0x%02x"
36 tpm_spapr_do_crq_unknown_crq(uint8_t raw1, uint8_t raw2) "unknown CRQ 0x%02x 0x%02x ..."
/qemu/hw/riscv/
H A Dtrace-events4 riscv_iommu_new(const char *id, unsigned b, unsigned d, unsigned f) "%s: device attached %04x:%02x.…
5 …, unsigned d, unsigned f, uint64_t reason, uint64_t iova) "%s: fault %04x:%02x.%u reason: 0x%"PRIx…
6 … unsigned b, unsigned d, unsigned f, uint64_t iova) "%s: page request %04x:%02x.%u iova: 0x%"PRIx64
7 …pasid, const char *dir, uint64_t iova, uint64_t phys) "%s: translate %04x:%02x.%u #%u %s 0x%"PRIx6…
8 …unsigned d, unsigned f, uint64_t iova, uint64_t phys) "%s: translate %04x:%02x.%u MSI 0x%"PRIx64" …
15 …gned b, unsigned d, unsigned f, uint64_t iova) "%s: translate request %04x:%02x.%u iova: 0x%"PRIx64
/qemu/hw/nvram/
H A Dtrace-events4 nvram_read(uint32_t addr, uint32_t ret) "read addr %d: 0x%02x"
5 nvram_write(uint32_t addr, uint32_t old, uint32_t val) "write addr %d: 0x%02x -> 0x%02x"
18 macio_nvram_read(uint32_t addr, uint8_t val) "read addr=0x%04"PRIx32" val=0x%02x"
19 macio_nvram_write(uint32_t addr, uint8_t val) "write addr=0x%04"PRIx32" val=0x%02x"

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