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Searched refs:bas (Results 1 – 25 of 46) sorted by relevance

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/src/sys/dev/uart/
H A Duart_dev_ns8250.c150 ns8250_clrint(struct uart_bas *bas) in ns8250_clrint() argument
154 iir = uart_getreg(bas, REG_IIR); in ns8250_clrint()
158 lsr = uart_getreg(bas, REG_LSR); in ns8250_clrint()
160 (void)uart_getreg(bas, REG_DATA); in ns8250_clrint()
162 (void)uart_getreg(bas, REG_DATA); in ns8250_clrint()
164 (void)uart_getreg(bas, REG_MSR); in ns8250_clrint()
165 uart_barrier(bas); in ns8250_clrint()
166 iir = uart_getreg(bas, REG_IIR); in ns8250_clrint()
171 ns8250_get_divisor(struct uart_bas *bas) in ns8250_get_divisor() argument
176 lcr = uart_getreg(bas, REG_LCR); in ns8250_get_divisor()
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H A Duart_dev_msm.c49 #define GETREG(bas, reg) \ argument
50 bus_space_read_4((bas)->bst, (bas)->bsh, (reg))
51 #define SETREG(bas, reg, value) \ argument
52 bus_space_write_4((bas)->bst, (bas)->bsh, (reg), (value))
59 static int msm_probe(struct uart_bas *bas);
60 static void msm_init(struct uart_bas *bas, int, int, int, int);
61 static void msm_term(struct uart_bas *bas);
62 static void msm_putc(struct uart_bas *bas, int);
63 static int msm_rxready(struct uart_bas *bas);
64 static int msm_getc(struct uart_bas *bas, struct mtx *mtx);
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H A Duart_dev_imx.c73 static int imx_uart_probe(struct uart_bas *bas);
74 static void imx_uart_init(struct uart_bas *bas, int, int, int, int);
75 static void imx_uart_term(struct uart_bas *bas);
76 static void imx_uart_putc(struct uart_bas *bas, int);
77 static int imx_uart_rxready(struct uart_bas *bas);
78 static int imx_uart_getc(struct uart_bas *bas, struct mtx *);
91 dumpregs(struct uart_bas *bas, const char * msg)
98 msg, bas->bsh,
99 GETREG(bas, REG(UCR1)), GETREG(bas, REG(UCR2)),
100 GETREG(bas, REG(UCR3)), GETREG(bas, REG(UCR4)),
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H A Duart_dev_z8530.c54 uart_setmreg(struct uart_bas *bas, int reg, int val) in uart_setmreg() argument
57 uart_setreg(bas, REG_CTRL, reg); in uart_setmreg()
58 uart_barrier(bas); in uart_setmreg()
59 uart_setreg(bas, REG_CTRL, val); in uart_setmreg()
63 uart_getmreg(struct uart_bas *bas, int reg) in uart_getmreg() argument
66 uart_setreg(bas, REG_CTRL, reg); in uart_getmreg()
67 uart_barrier(bas); in uart_getmreg()
68 return (uart_getreg(bas, REG_CTRL)); in uart_getmreg()
95 z8530_param(struct uart_bas *bas, int baudrate, int databits, int stopbits, in z8530_param() argument
127 divisor = z8530_divisor(bas->rclk, baudrate); in z8530_param()
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H A Duart_dev_quicc.c46 #define quicc_read2(bas, reg) \ argument
47 bus_space_read_2((bas)->bst, (bas)->bsh, reg)
48 #define quicc_read4(bas, reg) \ argument
49 bus_space_read_4((bas)->bst, (bas)->bsh, reg)
51 #define quicc_write2(bas, reg, val) \ argument
52 bus_space_write_2((bas)->bst, (bas)->bsh, reg, val)
53 #define quicc_write4(bas, reg, val) \ argument
54 bus_space_write_4((bas)->bst, (bas)->bsh, reg, val)
84 quicc_param(struct uart_bas *bas, int baudrate, int databits, int stopbits, in quicc_param() argument
91 divisor = quicc_divisor(bas->rclk, baudrate); in quicc_param()
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H A Duart.h52 #define uart_regofs(bas, reg) ((reg) << (bas)->regshft) argument
53 #define uart_regiowidth(bas) ((bas)->regiowidth) argument
56 uart_getreg(struct uart_bas *bas, int reg) in uart_getreg() argument
60 switch (uart_regiowidth(bas)) { in uart_getreg()
63 ret = bus_space_read_8(bas->bst, bas->bsh, uart_regofs(bas, reg)); in uart_getreg()
67 ret = bus_space_read_4(bas->bst, bas->bsh, uart_regofs(bas, reg)); in uart_getreg()
70 ret = bus_space_read_2(bas->bst, bas->bsh, uart_regofs(bas, reg)); in uart_getreg()
73 ret = bus_space_read_1(bas->bst, bas->bsh, uart_regofs(bas, reg)); in uart_getreg()
81 uart_setreg(struct uart_bas *bas, int reg, uint32_t value) in uart_setreg() argument
84 switch (uart_regiowidth(bas)) { in uart_setreg()
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H A Duart_dev_mvebu.c145 uart_mvebu_probe(struct uart_bas *bas) in uart_mvebu_probe() argument
167 uart_mvebu_param(struct uart_bas *bas, int baudrate, int databits, int stopbits, in uart_mvebu_param() argument
175 ctrl = uart_getreg(bas, UART_CTRL); in uart_mvebu_param()
176 uart_setreg(bas, UART_CTRL, ctrl | CTRL_TX_FIFO_RST | CTRL_RX_FIFO_RST | in uart_mvebu_param()
178 uart_barrier(bas); in uart_mvebu_param()
199 divisor = uart_mvebu_divisor(bas->rclk, baudrate); in uart_mvebu_param()
203 ccr = uart_getreg(bas, UART_CCR); in uart_mvebu_param()
206 uart_setreg(bas, UART_CCR, ccr | divisor); in uart_mvebu_param()
207 uart_barrier(bas); in uart_mvebu_param()
214 uart_setreg(bas, UART_CTRL, ctrl); in uart_mvebu_param()
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H A Duart_dev_mu.c126 #define __uart_getreg(bas, reg) \ argument
127 bus_space_read_4((bas)->bst, (bas)->bsh, uart_regofs(bas, reg))
128 #define __uart_setreg(bas, reg, value) \ argument
129 bus_space_write_4((bas)->bst, (bas)->bsh, uart_regofs(bas, reg), value)
134 static int uart_mu_probe(struct uart_bas *bas);
135 static void uart_mu_init(struct uart_bas *bas, int, int, int, int);
136 static void uart_mu_term(struct uart_bas *bas);
137 static void uart_mu_putc(struct uart_bas *bas, int);
138 static int uart_mu_rxready(struct uart_bas *bas);
139 static int uart_mu_getc(struct uart_bas *bas, struct mtx *);
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H A Duart_dev_pl011.c147 #define __uart_getreg(bas, reg) \ argument
148 bus_space_read_4((bas)->bst, (bas)->bsh, uart_regofs(bas, reg))
149 #define __uart_setreg(bas, reg, value) \ argument
150 bus_space_write_4((bas)->bst, (bas)->bsh, uart_regofs(bas, reg), value)
155 static int uart_pl011_probe(struct uart_bas *bas);
156 static void uart_pl011_init(struct uart_bas *bas, int, int, int, int);
157 static void uart_pl011_term(struct uart_bas *bas);
158 static void uart_pl011_putc(struct uart_bas *bas, int);
159 static int uart_pl011_rxready(struct uart_bas *bas);
160 static int uart_pl011_getc(struct uart_bas *bas, struct mtx *);
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H A Duart_dev_lowrisc.c58 static int lowrisc_uart_probe(struct uart_bas *bas);
59 static void lowrisc_uart_init(struct uart_bas *bas, int, int, int, int);
60 static void lowrisc_uart_term(struct uart_bas *bas);
61 static void lowrisc_uart_putc(struct uart_bas *bas, int);
62 static int lowrisc_uart_rxready(struct uart_bas *bas);
63 static int lowrisc_uart_getc(struct uart_bas *bas, struct mtx *);
75 lowrisc_uart_probe(struct uart_bas *bas) in lowrisc_uart_probe() argument
82 lowrisc_uart_getbaud(struct uart_bas *bas) in lowrisc_uart_getbaud() argument
89 lowrisc_uart_init(struct uart_bas *bas, int baudrate, int databits, in lowrisc_uart_init() argument
97 lowrisc_uart_term(struct uart_bas *bas) in lowrisc_uart_term() argument
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H A Duart_cpu_acpi.c69 di->bas.chan = 0; in uart_cpu_acpi_init_devinfo()
70 di->bas.rclk = 0; in uart_cpu_acpi_init_devinfo()
79 di->bas.bst = uart_bus_space_mem; in uart_cpu_acpi_init_devinfo()
82 di->bas.bst = uart_bus_space_io; in uart_cpu_acpi_init_devinfo()
93 di->bas.regiowidth = 1; in uart_cpu_acpi_init_devinfo()
96 di->bas.regiowidth = 2; in uart_cpu_acpi_init_devinfo()
99 di->bas.regiowidth = 4; in uart_cpu_acpi_init_devinfo()
102 di->bas.regiowidth = 8; in uart_cpu_acpi_init_devinfo()
113 di->bas.regshft = 0; in uart_cpu_acpi_init_devinfo()
116 di->bas.regshft = 1; in uart_cpu_acpi_init_devinfo()
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H A Duart_subr.c225 di->bas.chan = 0; in uart_getenv()
226 di->bas.regshft = 0; in uart_getenv()
227 di->bas.regiowidth = 1; in uart_getenv()
228 di->bas.rclk = 0; in uart_getenv()
239 di->bas.busy_detect = uart_parse_long(&spec); in uart_getenv()
245 di->bas.chan = uart_parse_long(&spec); in uart_getenv()
254 di->bas.bst = uart_bus_space_io; in uart_getenv()
258 di->bas.bst = uart_bus_space_mem; in uart_getenv()
265 di->bas.regshft = uart_parse_long(&spec); in uart_getenv()
268 di->bas.regiowidth = uart_parse_long(&spec); in uart_getenv()
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H A Duart_cpu_powerpc.c169 di->bas.regshft = 4; in uart_cpu_getdev()
170 di->bas.chan = 1; in uart_cpu_getdev()
174 di->bas.regshft = 0; in uart_cpu_getdev()
175 di->bas.chan = 0; in uart_cpu_getdev()
182 error = OF_decode_addr(input, 0, &di->bas.bst, &di->bas.bsh, NULL); in uart_cpu_getdev()
188 if (OF_getprop(input, "clock-frequency", &di->bas.rclk, in uart_cpu_getdev()
189 sizeof(di->bas.rclk)) == -1) in uart_cpu_getdev()
190 di->bas.rclk = 230400; in uart_cpu_getdev()
194 OF_getprop(input, "reg-shift", &di->bas.regshft, in uart_cpu_getdev()
195 sizeof(di->bas.regshft)); in uart_cpu_getdev()
H A Duart_dev_lowrisc.h59 #define GETREG(bas, reg) \ argument
60 bus_space_read_2((bas)->bst, (bas)->bsh, (reg))
61 #define SETREG(bas, reg, value) \ argument
62 bus_space_write_2((bas)->bst, (bas)->bsh, (reg), (value))
H A Duart_cpu_fdt.c95 di->bas.chan = 0; in uart_cpu_getdev()
96 di->bas.regshft = shift; in uart_cpu_getdev()
97 di->bas.regiowidth = iowidth; in uart_cpu_getdev()
99 di->bas.rclk = rclk; in uart_cpu_getdev()
104 di->bas.bst = bst; in uart_cpu_getdev()
105 di->bas.bsh = bsh; in uart_cpu_getdev()
107 uart_bus_space_mem = di->bas.bst; in uart_cpu_getdev()
H A Duart_cpu.h67 struct uart_bas bas; member
121 res = di->ops->probe(&di->bas); in uart_probe()
130 di->ops->init(&di->bas, di->baudrate, di->databits, di->stopbits, in uart_init()
139 di->ops->term(&di->bas); in uart_term()
147 di->ops->putc(&di->bas, c); in uart_putc()
157 res = di->ops->rxready(&di->bas); in uart_rxready()
168 if (di->ops->rxready(&di->bas)) in uart_poll()
169 res = di->ops->getc(&di->bas, NULL); in uart_poll()
180 return (di->ops->getc(&di->bas, di->hwmtx)); in uart_getc()
/src/sys/arm/freescale/vybrid/
H A Dvf_uart.c114 static int vf_uart_probe(struct uart_bas *bas);
115 static void vf_uart_init(struct uart_bas *bas, int, int, int, int);
116 static void vf_uart_term(struct uart_bas *bas);
117 static void vf_uart_putc(struct uart_bas *bas, int);
118 static int vf_uart_rxready(struct uart_bas *bas);
119 static int vf_uart_getc(struct uart_bas *bas, struct mtx *);
133 vf_uart_probe(struct uart_bas *bas) in vf_uart_probe() argument
140 vf_uart_init(struct uart_bas *bas, int baudrate, int databits, in vf_uart_init() argument
147 vf_uart_term(struct uart_bas *bas) in vf_uart_term() argument
153 vf_uart_putc(struct uart_bas *bas, int c) in vf_uart_putc() argument
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/src/sys/arm/xilinx/
H A Duart_dev_cdnc.c54 #define RD4(bas, reg) \ argument
55 bus_space_read_4((bas)->bst, (bas)->bsh, uart_regofs((bas), (reg)))
56 #define WR4(bas, reg, value) \ argument
57 bus_space_write_4((bas)->bst, (bas)->bsh, uart_regofs((bas), (reg)), \
146 static int cdnc_uart_probe(struct uart_bas *bas);
147 static void cdnc_uart_init(struct uart_bas *bas, int, int, int, int);
148 static void cdnc_uart_term(struct uart_bas *bas);
149 static void cdnc_uart_putc(struct uart_bas *bas, int);
150 static int cdnc_uart_rxready(struct uart_bas *bas);
151 static int cdnc_uart_getc(struct uart_bas *bas, struct mtx *mtx);
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/src/sys/riscv/sifive/
H A Dsifive_uart.c88 sfuart_probe(struct uart_bas *bas) in sfuart_probe() argument
91 bas->regiowidth = 4; in sfuart_probe()
97 sfuart_init(struct uart_bas *bas, int baudrate, int databits, int stopbits, in sfuart_init() argument
102 uart_setreg(bas, SFUART_IRQ_ENABLE, 0); in sfuart_init()
108 uart_setreg(bas, SFUART_RXCTRL, reg); in sfuart_init()
117 uart_setreg(bas, SFUART_TXCTRL, reg); in sfuart_init()
124 sfuart_putc(struct uart_bas *bas, int c) in sfuart_putc() argument
127 while ((uart_getreg(bas, SFUART_TXDATA) & SFUART_TXDATA_FULL) in sfuart_putc()
131 uart_setreg(bas, SFUART_TXDATA, c); in sfuart_putc()
135 sfuart_rxready(struct uart_bas *bas) in sfuart_rxready() argument
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/src/sys/dev/scc/
H A Dscc_dev_quicc.c46 #define quicc_read2(bas, reg) \ argument
47 bus_space_read_2((bas)->bst, (bas)->bsh, reg)
48 #define quicc_read4(bas, reg) \ argument
49 bus_space_read_4((bas)->bst, (bas)->bsh, reg)
51 #define quicc_write2(bas, reg, val) \ argument
52 bus_space_write_2((bas)->bst, (bas)->bsh, reg, val)
53 #define quicc_write4(bas, reg, val) \ argument
54 bus_space_write_4((bas)->bst, (bas)->bsh, reg, val)
91 struct scc_bas *bas; in quicc_bfe_enabled() local
95 bas = &sc->sc_bas; in quicc_bfe_enabled()
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H A Dscc_bfe.h48 #define scc_regofs(bas, reg) ((reg) << (bas)->regshft) argument
50 #define scc_getreg(bas, reg) \ argument
51 bus_space_read_1((bas)->bst, (bas)->bsh, scc_regofs(bas, reg))
52 #define scc_setreg(bas, reg, value) \ argument
53 bus_space_write_1((bas)->bst, (bas)->bsh, scc_regofs(bas, reg), value)
55 #define scc_barrier(bas) \ argument
56 bus_space_barrier((bas)->bst, (bas)->bsh, 0, (bas)->range, \
H A Dscc_dev_z8530.c93 scc_getmreg(struct scc_bas *bas, int ch, int reg) in scc_getmreg() argument
96 scc_setreg(bas, ch + REG_CTRL, reg); in scc_getmreg()
97 scc_barrier(bas); in scc_getmreg()
98 return (scc_getreg(bas, ch + REG_CTRL)); in scc_getmreg()
111 struct scc_bas *bas; in z8530_bfe_iclear() local
114 bas = &sc->sc_bas; in z8530_bfe_iclear()
118 scc_setreg(bas, c + REG_CTRL, CR_RSTTXI); in z8530_bfe_iclear()
119 scc_barrier(bas); in z8530_bfe_iclear()
122 scc_getreg(bas, c + REG_DATA); in z8530_bfe_iclear()
123 scc_barrier(bas); in z8530_bfe_iclear()
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/src/sys/arm64/apple/
H A Dexynos_uart.c59 static int exynos4210_probe(struct uart_bas *bas);
61 struct uart_bas *bas, int, int, int, int);
62 static void exynos4210_init(struct uart_bas *bas, int, int, int, int);
63 static void exynos4210_s5l_init(struct uart_bas *bas, int, int, int, int);
64 static void exynos4210_term(struct uart_bas *bas);
65 static void exynos4210_putc(struct uart_bas *bas, int);
66 static int exynos4210_rxready(struct uart_bas *bas);
67 static int exynos4210_getc(struct uart_bas *bas, struct mtx *mtx);
137 exynos4210_uart_param(struct uart_bas *bas, int baudrate, int databits, in exynos4210_uart_param() argument
180 uart_setreg(bas, SSCOM_ULCON, ulcon); in exynos4210_uart_param()
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/src/contrib/netbsd-tests/lib/libc/regex/data/att/
H A Dbasic.dat186 E ^([^!]+!)?([^!]+)$ bas (0,3)(?,?)(0,3)
187 E ^([^!]+!)?([^!]+)$ bar!bas (0,7)(0,4)(4,7)
188 E ^([^!]+!)?([^!]+)$ foo!bas (0,7)(0,4)(4,7)
189 E ^.+!([^!]+!)([^!]+)$ foo!bar!bas (0,11)(4,8)(8,11)
190 E ((foo)|(bar))!bas bar!bas (0,7)(0,3)(?,?)(0,3)
191 E ((foo)|(bar))!bas foo!bar!bas (4,11)(4,7)(?,?)(4,7)
192 E ((foo)|(bar))!bas foo!bas (0,7)(0,3)(0,3)
193 E ((foo)|bar)!bas bar!bas (0,7)(0,3)
194 E ((foo)|bar)!bas foo!bar!bas (4,11)(4,7)
195 E ((foo)|bar)!bas foo!bas (0,7)(0,3)(0,3)
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/src/sys/arm/nvidia/
H A Dtegra_uart.c72 struct uart_bas *bas = &sc->sc_bas; in tegra_uart_attach() local
80 ns8250->ier = uart_getreg(bas, REG_IER) & ns8250->ier_mask; in tegra_uart_attach()
82 uart_setreg(bas, REG_IER, ns8250->ier); in tegra_uart_attach()
83 uart_barrier(bas); in tegra_uart_attach()
90 struct uart_bas *bas = &sc->sc_bas; in tegra_uart_grab() local
100 ier = uart_getreg(bas, REG_IER); in tegra_uart_grab()
101 uart_setreg(bas, REG_IER, ier & ns8250->ier_mask); in tegra_uart_grab()
103 while ((uart_getreg(bas, REG_LSR) & LSR_TEMT) == 0) in tegra_uart_grab()
106 uart_setreg(bas, REG_FCR, 0); in tegra_uart_grab()
107 uart_barrier(bas); in tegra_uart_grab()
[all …]

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