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Searched refs:wsr (Results 1 – 25 of 38) sorted by relevance

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/qemu/tests/tcg/xtensa/
H A Dtest_timer.S31 wsr a2, ccount
65 wsr a2, intenable
67 wsr a2, intclear
70 wsr a2, ccompare1
73 wsr a2, ccompare2
76 wsr a2, ccompare0
80 wsr a2, ccount
90 wsr a2, intenable
92 wsr a2, intclear
95 wsr a2, ccompare1
[all …]
H A Dtest_interrupt.S47 wsr a2, intenable
49 wsr a2, ccompare0
52 wsr a2, ccompare1
55 wsr a2, ccompare2
59 wsr a2, intclear
97 wsr a2, intset
103 wsr a2, intclear
119 wsr a2, intset
126 wsr a2, intenable
138 wsr a2, intset
[all …]
H A Dtest_break.S64 wsr a2, ibreaka0
66 wsr a2, ibreakenable
71 wsr a2, ibreaka0
73 wsr a2, ibreakenable
78 wsr a2, ibreaka0
80 wsr a2, ibreakenable
102 wsr a2, ibreaka0
105 wsr a3, ibreakenable
125 wsr a2, ps
136 wsr a2, ibreaka0
[all …]
H A Dtest_loop.S50 wsr a3, lcount
51 wsr a4, lbeg
52 wsr a5, lend
68 wsr a4, ps
75 wsr a4, ps
84 wsr a3, lcount
85 wsr a4, lbeg
86 wsr a5, lend
97 wsr a3, lbeg
109 wsr a3, lcount
[all …]
H A Dtest_windowed.S11 wsr a2, windowstart
14 wsr a2, windowbase
17 wsr a2, windowstart
27 wsr a2, windowstart
40 wsr a2, epc1
104 wsr a2, epc1
220 wsr a2, windowstart
223 wsr a2, windowstart
248 wsr a2, windowstart
291 wsr a2, ps
[all …]
H A Dtest_s32c1i.S10 wsr a2, atomctl
14 wsr a3, scompare1
31 wsr a2, atomctl
35 wsr a3, scompare1
H A Dcrt.S13 wsr a2, windowstart
15 wsr a2, windowbase
19 wsr a2, ps
H A Dtest_exclusive.S9 wsr a2, atomctl
28 wsr a2, atomctl
H A Dvectors.S11 wsr a0, excsave1
19 wsr a2, excsave1
H A Dtest_shift.S96 wsr a2, sar
124 wsr a2, sar
154 wsr a2, sar
185 wsr a2, sar
H A Dtest_mmu.S42 wsr a2, ptevaddr
148 wsr a2, ps
198 wsr a2, ps
229 wsr a2, ps
334 wsr a2, ptevaddr
374 wsr a2, excvaddr
380 wsr a2, ps
387 wsr a2, ps
403 wsr a2, ps
450 wsr a2, ps
H A Dtest_sr.S48 test_sr_op \sym, \mask & 2, wsr, HI_WSR, \sr
225 wsr a2, vecbase label
H A Dtest_mac16.S23 wsr a4, \reg
65 wsr a4, ACCLO
67 wsr a4, ACCHI
H A Dtest_fp_cpenable.S10 wsr a2, cpenable
H A Dtest_boolean.S9 wsr a2, br
H A Dfpu.h127 wsr a2, cpenable
141 wsr a2, cpenable
/qemu/target/xtensa/core-fsf/
H A Dxtensa-modules.c.inc7777 { "wsr.windowbase", 19 /* xt_iclass_wsr.windowbase */,
7786 { "wsr.windowstart", 22 /* xt_iclass_wsr.windowstart */,
8074 { "wsr.lend", 78 /* xt_iclass_wsr.lend */,
8083 { "wsr.lcount", 81 /* xt_iclass_wsr.lcount */,
8092 { "wsr.lbeg", 84 /* xt_iclass_wsr.lbeg */,
8101 { "wsr.sar", 87 /* xt_iclass_wsr.sar */,
8110 { "wsr.litbase", 90 /* xt_iclass_wsr.litbase */,
8125 { "wsr.ps", 95 /* xt_iclass_wsr.ps */,
8134 { "wsr.epc1", 98 /* xt_iclass_wsr.epc1 */,
8143 { "wsr.excsave1", 101 /* xt_iclass_wsr.excsave1 */,
[all …]
/qemu/target/xtensa/core-dc232b/
H A Dxtensa-modules.c.inc10817 { "wsr.windowbase", 19 /* xt_iclass_wsr.windowbase */,
10826 { "wsr.windowstart", 22 /* xt_iclass_wsr.windowstart */,
11120 { "wsr.lend", 80 /* xt_iclass_wsr.lend */,
11129 { "wsr.lcount", 83 /* xt_iclass_wsr.lcount */,
11138 { "wsr.lbeg", 86 /* xt_iclass_wsr.lbeg */,
11147 { "wsr.sar", 89 /* xt_iclass_wsr.sar */,
11156 { "wsr.litbase", 92 /* xt_iclass_wsr.litbase */,
11171 { "wsr.ps", 97 /* xt_iclass_wsr.ps */,
11180 { "wsr.epc1", 100 /* xt_iclass_wsr.epc1 */,
11189 { "wsr.excsave1", 103 /* xt_iclass_wsr.excsave1 */,
[all …]
/qemu/hw/watchdog/
H A Dwdt_imx2.c65 s->wsr = 0; in imx2_wdt_reset()
81 value = s->wsr; in imx2_wdt_read()
187 if (s->wsr == IMX2_WDT_SEQ1 && value == IMX2_WDT_SEQ2) { in imx2_wdt_write()
190 s->wsr = value; in imx2_wdt_write()
244 VMSTATE_UINT16(wsr, IMX2WdtState),
/qemu/target/xtensa/core-sample_controller/
H A Dxtensa-modules.c.inc8682 { "wsr.windowbase", ICLASS_xt_iclass_wsr_windowbase,
8691 { "wsr.windowstart", ICLASS_xt_iclass_wsr_windowstart,
8976 { "wsr.sar", ICLASS_xt_iclass_wsr_sar,
8985 { "wsr.memctl", ICLASS_xt_iclass_wsr_memctl,
8994 { "wsr.litbase", ICLASS_xt_iclass_wsr_litbase,
9003 { "wsr.configid0", ICLASS_xt_iclass_wsr_configid0,
9012 { "wsr.ps", ICLASS_xt_iclass_wsr_ps,
9021 { "wsr.epc1", ICLASS_xt_iclass_wsr_epc1,
9030 { "wsr.excsave1", ICLASS_xt_iclass_wsr_excsave1,
9039 { "wsr.epc2", ICLASS_xt_iclass_wsr_epc2,
[all …]
/qemu/target/xtensa/core-dc233c/
H A Dxtensa-modules.c.inc11459 { "wsr.windowbase", ICLASS_xt_iclass_wsr_windowbase,
11468 { "wsr.windowstart", ICLASS_xt_iclass_wsr_windowstart,
11762 { "wsr.lend", ICLASS_xt_iclass_wsr_lend,
11771 { "wsr.lcount", ICLASS_xt_iclass_wsr_lcount,
11780 { "wsr.lbeg", ICLASS_xt_iclass_wsr_lbeg,
11789 { "wsr.sar", ICLASS_xt_iclass_wsr_sar,
11798 { "wsr.litbase", ICLASS_xt_iclass_wsr_litbase,
11807 { "wsr.176", ICLASS_xt_iclass_wsr_176,
11816 { "wsr.ps", ICLASS_xt_iclass_wsr_ps,
11825 { "wsr.epc1", ICLASS_xt_iclass_wsr_epc1,
[all …]
/qemu/target/xtensa/core-de212/
H A Dxtensa-modules.c.inc10819 { "wsr.windowbase", ICLASS_xt_iclass_wsr_windowbase,
10828 { "wsr.windowstart", ICLASS_xt_iclass_wsr_windowstart,
11122 { "wsr.lend", ICLASS_xt_iclass_wsr_lend,
11131 { "wsr.lcount", ICLASS_xt_iclass_wsr_lcount,
11140 { "wsr.lbeg", ICLASS_xt_iclass_wsr_lbeg,
11149 { "wsr.sar", ICLASS_xt_iclass_wsr_sar,
11158 { "wsr.memctl", ICLASS_xt_iclass_wsr_memctl,
11167 { "wsr.litbase", ICLASS_xt_iclass_wsr_litbase,
11176 { "wsr.configid0", ICLASS_xt_iclass_wsr_configid0,
11185 { "wsr.ps", ICLASS_xt_iclass_wsr_ps,
[all …]
/qemu/target/xtensa/core-lx106/
H A Dxtensa-modules.c.inc6112 { "wsr.sar", ICLASS_xt_iclass_wsr_sar,
6121 { "wsr.litbase", ICLASS_xt_iclass_wsr_litbase,
6130 { "wsr.176", ICLASS_xt_iclass_wsr_176,
6139 { "wsr.ps", ICLASS_xt_iclass_wsr_ps,
6148 { "wsr.epc1", ICLASS_xt_iclass_wsr_epc1,
6157 { "wsr.excsave1", ICLASS_xt_iclass_wsr_excsave1,
6166 { "wsr.epc2", ICLASS_xt_iclass_wsr_epc2,
6175 { "wsr.excsave2", ICLASS_xt_iclass_wsr_excsave2,
6184 { "wsr.epc3", ICLASS_xt_iclass_wsr_epc3,
6193 { "wsr.excsave3", ICLASS_xt_iclass_wsr_excsave3,
[all …]
/qemu/include/hw/watchdog/
H A Dwdt_imx2.h81 uint16_t wsr; member
/qemu/target/xtensa/core-de233_fpu/
H A Dxtensa-modules.c.inc16075 { "wsr.windowbase", ICLASS_xt_iclass_wsr_windowbase,
16084 { "wsr.windowstart", ICLASS_xt_iclass_wsr_windowstart,
16384 { "wsr.lend", ICLASS_xt_iclass_wsr_lend,
16393 { "wsr.lcount", ICLASS_xt_iclass_wsr_lcount,
16402 { "wsr.lbeg", ICLASS_xt_iclass_wsr_lbeg,
16411 { "wsr.sar", ICLASS_xt_iclass_wsr_sar,
16420 { "wsr.memctl", ICLASS_xt_iclass_wsr_memctl,
16429 { "wsr.configid0", ICLASS_xt_iclass_wsr_configid0,
16438 { "wsr.ps", ICLASS_xt_iclass_wsr_ps,
16447 { "wsr.epc1", ICLASS_xt_iclass_wsr_epc1,
[all …]

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