Merge remote-tracking branch 'remotes/xtensa/tags/20190228-xtensa' into staging

target/xtensa: FLIX support, various fixes and test improvements

- add FLIX (flexible length instructions extension)

Merge remote-tracking branch 'remotes/xtensa/tags/20190228-xtensa' into staging

target/xtensa: FLIX support, various fixes and test improvements

- add FLIX (flexible length instructions extension) support;
- make testsuite runnable on wider range of xtensa cores;
- add floating point opcode tests;
- don't add duplicate 'static' in import_core.sh script;
- fix undefined opcodes detection in test_mmuhifi_c3 overlay.

# gpg: Signature made Thu 28 Feb 2019 12:53:23 GMT
# gpg: using RSA key 2B67854B98E5327DCDEB17D851F9CC91F83FA044
# gpg: issuer "jcmvbkbc@gmail.com"
# gpg: Good signature from "Max Filippov <filippov@cadence.com>" [unknown]
# gpg: aka "Max Filippov <max.filippov@cogentembedded.com>" [full]
# gpg: aka "Max Filippov <jcmvbkbc@gmail.com>" [full]
# Primary key fingerprint: 2B67 854B 98E5 327D CDEB 17D8 51F9 CC91 F83F A044

* remotes/xtensa/tags/20190228-xtensa: (40 commits)
tests/tcg/xtensa: add FPU2000 coprocessor tests
tests/tcg/xtensa: add FP1 group tests
tests/tcg/xtensa: add FP0 group conversion tests
tests/tcg/xtensa: add FP0 group arithmetic tests
tests/tcg/xtensa: add LSCI/LSCX group tests
tests/tcg/xtensa: add test for FLIX
tests/tcg/xtensa: conditionalize MMU-related tests
tests/tcg/xtensa: conditionalize windowed register tests
tests/tcg/xtensa: conditionalize and fix s32c1i tests
tests/tcg/xtensa: fix SR tests for big endian configs
tests/tcg/xtensa: conditionalize and expand SR tests
tests/tcg/xtensa: conditionalize timer/CCOUNT tests
tests/tcg/xtensa: conditionalize interrupt tests
tests/tcg/xtensa: add straightforward conditionals
tests/tcg/xtensa: conditionalize cache option tests
tests/tcg/xtensa: conditionalize debug option tests
tests/tcg/xtensa: enable boolean tests
tests/tcg/xtensa: fix endianness issues in test_b
tests/tcg/xtensa: don't use optional opcodes in generic code
tests/tcg/xtensa: support configs with LITBASE
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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tests/tcg/xtensa: conditionalize interrupt tests

Make interrupt tests conditional on the presence of interrupt option and
on the presence of level-1 and high level software interrupts. Don't use
har

tests/tcg/xtensa: conditionalize interrupt tests

Make interrupt tests conditional on the presence of interrupt option and
on the presence of level-1 and high level software interrupts. Don't use
hard-coded interrupt level for the high level interrupt tests, choose
high level software IRQ and use its configured level.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>

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target/xtensa: tests: clean up interrupt tests

Don't use hardcoded software interrupt masks, use XCHAL macros.
Mask off timer interrupt bits that are not checked for.

Signed-off-by: Max Filippov <j

target/xtensa: tests: clean up interrupt tests

Don't use hardcoded software interrupt masks, use XCHAL macros.
Mask off timer interrupt bits that are not checked for.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>

show more ...

target-xtensa: allow using core configuration in tests

Add path to the core configuration directory to test build command and
replace .include asm directive with #include to enable preprocessing.

S

target-xtensa: allow using core configuration in tests

Add path to the core configuration directory to test build command and
replace .include asm directive with #include to enable preprocessing.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>

show more ...

tests: mv tests/* -> tests/tcg

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>

target-xtensa: add regression testsuite

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>