| /qemu/hw/timer/ |
| H A D | renesas_tmr.c | 63 static void update_events(RTMRState *tmr, int ch) in update_events() argument
69 if (tmr->tccr[ch] == 0) { in update_events()
72 if (FIELD_EX8(tmr->tccr[ch], TCCR, CSS) == 0) { in update_events()
77 if (FIELD_EX8(tmr->tccr[0], TCCR, CSS) == CSS_CASCADING) { in update_events()
80 tmr->next[ch] = none; in update_events()
83 diff[cmia] = concat_reg(tmr->tcora) - concat_reg(tmr->tcnt); in update_events()
84 diff[cmib] = concat_reg(tmr->tcorb) - concat_reg(tmr->tcnt); in update_events()
85 diff[ovi] = 0x10000 - concat_reg(tmr->tcnt); in update_events()
88 diff[cmia] = tmr->tcora[ch] - tmr->tcnt[ch]; in update_events()
89 diff[cmib] = tmr->tcorb[ch] - tmr->tcnt[ch]; in update_events()
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| H A D | bcm2835_systmr.c | 33 BCM2835SystemTimerCompare *tmr = opaque; in bcm2835_systmr_timer_expire() local
35 trace_bcm2835_systmr_timer_expired(tmr->id); in bcm2835_systmr_timer_expire()
36 tmr->state->reg.ctrl_status |= 1 << tmr->id; in bcm2835_systmr_timer_expire()
37 qemu_set_irq(tmr->irq, 1); in bcm2835_systmr_timer_expire()
83 for (index = 0; index < ARRAY_SIZE(s->tmr); index++) { in bcm2835_systmr_write()
86 qemu_set_irq(s->tmr[index].irq, 0); in bcm2835_systmr_write()
97 timer_mod(&s->tmr[index].timer, now + triggers_delay_us); in bcm2835_systmr_write()
136 for (size_t i = 0; i < ARRAY_SIZE(s->tmr); i++) { in bcm2835_systmr_realize()
137 s->tmr[i].id = i; in bcm2835_systmr_realize()
138 s->tmr[i].state = s; in bcm2835_systmr_realize()
[all …]
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| /qemu/hw/acpi/ |
| H A D | ich9_tco.c | 35 int ticks = tr->tco.tmr & TCO_TMR_MASK; in tco_timer_reload()
76 tr->tco.rld = tr->tco.tmr; in tco_timer_expired()
83 return !(tr->tco.cnt1 & TCO_TMR_HLT) && tr->tco.tmr > 1; in can_start_tco_timer()
130 ret = tr->tco.tmr; in tco_ioport_readw()
147 tr->tco.rld = tr->tco.tmr; in tco_ioport_writew()
177 tr->tco.rld = tr->tco.tmr; in tco_ioport_writew()
196 tr->tco.tmr = val; in tco_ioport_writew()
241 .tmr = TCO_TMR_DEFAULT, in acpi_pm_tco_init()
268 VMSTATE_UINT16(tco.tmr, TCOIORegs),
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| H A D | core.c | 393 if (d >= muldiv64(ar->tmr.overflow_time, in acpi_pm1_evt_get_sts()
423 ar->tmr.update_sci(ar); in acpi_pm1_evt_power_down()
489 expire_time = muldiv64(ar->tmr.overflow_time, NANOSECONDS_PER_SECOND, in acpi_pm_tmr_update()
491 timer_mod(ar->tmr.timer, expire_time); in acpi_pm_tmr_update()
493 timer_del(ar->tmr.timer); in acpi_pm_tmr_update()
506 ar->tmr.overflow_time = (d + 0x800000LL) & ~0x7fffffLL; in acpi_pm_tmr_calc_overflow_time()
520 ar->tmr.update_sci(ar); in acpi_pm_tmr_timer()
546 ar->tmr.update_sci = update_sci; in acpi_pm_tmr_init()
547 ar->tmr.timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, acpi_pm_tmr_timer, ar); in acpi_pm_tmr_init()
548 memory_region_init_io(&ar->tmr.io, memory_region_owner(parent), in acpi_pm_tmr_init()
[all …]
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| H A D | ich9.c | 241 VMSTATE_TIMER_PTR(acpi_regs.tmr.timer, ICH9LPCPMRegs),
242 VMSTATE_INT64(acpi_regs.tmr.overflow_time, ICH9LPCPMRegs),
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| H A D | piix4.c | 258 VMSTATE_TIMER_PTR(ar.tmr.timer, PIIX4PMState),
259 VMSTATE_INT64(ar.tmr.overflow_time, PIIX4PMState),
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| /qemu/hw/rx/ |
| H A D | rx62n.c | 161 SysBusDevice *tmr; in register_tmr() local
165 &s->tmr[unit], TYPE_RENESAS_TMR); in register_tmr()
166 tmr = SYS_BUS_DEVICE(&s->tmr[unit]); in register_tmr()
167 qdev_prop_set_uint64(DEVICE(tmr), "input-freq", s->pclk_freq_hz); in register_tmr()
168 sysbus_realize(tmr, &error_abort); in register_tmr()
172 sysbus_connect_irq(tmr, i, in register_tmr()
175 sysbus_mmio_map(tmr, 0, RX62N_TMR_BASE + unit * 0x10); in register_tmr()
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| /qemu/hw/m68k/ |
| H A D | mcf5206.c | 24 uint16_t tmr; member
45 if ((s->tmr & TMR_ORI) != 0 && (s->ter & TER_REF)) in m5206_timer_update()
53 s->tmr = 0; in m5206_timer_reset()
65 if ((s->tmr & TMR_RST) == 0) { in m5206_timer_recalibrate()
69 prescale = (s->tmr >> 8) + 1; in m5206_timer_recalibrate()
70 mode = (s->tmr >> 1) & 3; in m5206_timer_recalibrate()
79 if ((s->tmr & TMR_FRR) == 0) { in m5206_timer_recalibrate()
106 return s->tmr; in m5206_timer_read()
124 if ((s->tmr & TMR_RST) != 0 && (val & TMR_RST) == 0) { in m5206_timer_write()
127 s->tmr = val; in m5206_timer_write()
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| /qemu/hw/intc/ |
| H A D | openpic.c | 680 static void openpic_tmr_set_tmr(OpenPICTimer *tmr, uint32_t val, bool enabled);
684 OpenPICTimer *tmr = opaque; in qemu_timer_cb() local
685 OpenPICState *opp = tmr->opp; in qemu_timer_cb()
686 uint32_t n_IRQ = tmr->n_IRQ; in qemu_timer_cb()
687 uint32_t val = tmr->tbcr & ~TBCR_CI; in qemu_timer_cb()
688 uint32_t tog = ((tmr->tccr & TCCR_TOG) ^ TCCR_TOG); /* invert toggle. */ in qemu_timer_cb()
692 tmr->tccr = val | tog; in qemu_timer_cb()
693 openpic_tmr_set_tmr(tmr, val, /*enabled=*/true); in qemu_timer_cb()
704 static void openpic_tmr_set_tmr(OpenPICTimer *tmr, uint32_t val, bool enabled) in openpic_tmr_set_tmr() argument
715 tmr->qemu_timer_active = false; in openpic_tmr_set_tmr()
[all …]
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| H A D | apic_common.c | 211 memset(s->tmr, 0, sizeof(s->tmr)); in apic_init_reset()
391 VMSTATE_UINT32_ARRAY(tmr, APICCommonState, 8),
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| H A D | apic.c | 486 apic_set_bit(s->tmr, vector_num); in apic_set_irq()
488 apic_reset_bit(s->tmr, vector_num); in apic_set_irq()
509 if (!(s->spurious_vec & APIC_SV_DIRECTED_IO) && apic_get_bit(s->tmr, isrv)) { in apic_eoi()
853 val = s->tmr[index & 7]; in apic_register_read()
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| /qemu/include/hw/timer/ |
| H A D | bcm2835_systmr.h | 39 BCM2835SystemTimerCompare tmr[BCM2835_SYSTIMER_COUNT]; member
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| /qemu/include/hw/rx/ |
| H A D | rx62n.h | 57 RTMRState tmr[RX62N_NR_TMR]; member
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| /qemu/include/hw/acpi/ |
| H A D | ich9_tco.h | 67 uint16_t tmr; member
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| H A D | acpi.h | 144 ACPIPMTimer tmr; member
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| /qemu/hw/i386/kvm/ |
| H A D | apic.c | 50 kvm_apic_set_reg(kapic, 0x18 + i, s->tmr[i]); in kvm_put_apic_state()
80 s->tmr[i] = kvm_apic_get_reg(kapic, 0x18 + i); in kvm_get_apic_state()
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| /qemu/target/i386/whpx/ |
| H A D | whpx-apic.c | 44 kapic->fields[0x18 + i].data = s->tmr[i]; in whpx_put_apic_state()
72 s->tmr[i] = kapic->fields[0x18 + i].data; in whpx_get_apic_state()
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| /qemu/include/hw/i386/ |
| H A D | apic_internal.h | 172 uint32_t tmr[8]; /* trigger mode register */ member
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| /qemu/target/i386/ |
| H A D | cpu-dump.c | 326 dump_apic_interrupt("ISR", s->isr, s->tmr); in x86_cpu_dump_local_apic_state()
327 dump_apic_interrupt("IRR", s->irr, s->tmr); in x86_cpu_dump_local_apic_state()
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| /qemu/hw/isa/ |
| H A D | vt82c686.c | 94 VMSTATE_TIMER_PTR(ar.tmr.timer, ViaPMState),
95 VMSTATE_INT64(ar.tmr.overflow_time, ViaPMState),
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