192055797SPaulo Alcantara /* 2fbae27e8SPhilippe Mathieu-Daudé * QEMU ICH9 TCO emulation (total cost of ownership) 392055797SPaulo Alcantara * 492055797SPaulo Alcantara * Copyright (c) 2015 Paulo Alcantara <pcacjr@zytor.com> 592055797SPaulo Alcantara * 692055797SPaulo Alcantara * This work is licensed under the terms of the GNU GPL, version 2 or later. 792055797SPaulo Alcantara * See the COPYING file in the top-level directory. 892055797SPaulo Alcantara */ 9ec150c7eSMarkus Armbruster 1092055797SPaulo Alcantara #ifndef HW_ACPI_TCO_H 1192055797SPaulo Alcantara #define HW_ACPI_TCO_H 1292055797SPaulo Alcantara 13*8be545baSRichard Henderson #include "system/memory.h" 1406680402SPhilippe Mathieu-Daudé #include "migration/vmstate.h" 1592055797SPaulo Alcantara 1692055797SPaulo Alcantara /* As per ICH9 spec, the internal timer has an error of ~0.6s on every tick */ 1792055797SPaulo Alcantara #define TCO_TICK_NSEC 600000000LL 1892055797SPaulo Alcantara 1992055797SPaulo Alcantara /* TCO I/O register offsets */ 2092055797SPaulo Alcantara enum { 2192055797SPaulo Alcantara TCO_RLD = 0x00, 2292055797SPaulo Alcantara TCO_DAT_IN = 0x02, 2392055797SPaulo Alcantara TCO_DAT_OUT = 0x03, 2492055797SPaulo Alcantara TCO1_STS = 0x04, 2592055797SPaulo Alcantara TCO2_STS = 0x06, 2692055797SPaulo Alcantara TCO1_CNT = 0x08, 2792055797SPaulo Alcantara TCO2_CNT = 0x0a, 2892055797SPaulo Alcantara TCO_MESSAGE1 = 0x0c, 2992055797SPaulo Alcantara TCO_MESSAGE2 = 0x0d, 3092055797SPaulo Alcantara TCO_WDCNT = 0x0e, 3192055797SPaulo Alcantara SW_IRQ_GEN = 0x10, 3292055797SPaulo Alcantara TCO_TMR = 0x12, 3392055797SPaulo Alcantara }; 3492055797SPaulo Alcantara 3592055797SPaulo Alcantara /* TCO I/O register control/status bits */ 3692055797SPaulo Alcantara enum { 3792055797SPaulo Alcantara SW_TCO_SMI = 1 << 1, 3892055797SPaulo Alcantara TCO_INT_STS = 1 << 2, 3992055797SPaulo Alcantara TCO_LOCK = 1 << 12, 4092055797SPaulo Alcantara TCO_TMR_HLT = 1 << 11, 4192055797SPaulo Alcantara TCO_TIMEOUT = 1 << 3, 4292055797SPaulo Alcantara TCO_SECOND_TO_STS = 1 << 1, 4392055797SPaulo Alcantara TCO_BOOT_STS = 1 << 2, 4492055797SPaulo Alcantara }; 4592055797SPaulo Alcantara 4692055797SPaulo Alcantara /* TCO I/O registers mask bits */ 4792055797SPaulo Alcantara enum { 4892055797SPaulo Alcantara TCO_RLD_MASK = 0x3ff, 4992055797SPaulo Alcantara TCO1_STS_MASK = 0xe870, 5092055797SPaulo Alcantara TCO2_STS_MASK = 0xfff8, 5192055797SPaulo Alcantara TCO1_CNT_MASK = 0xfeff, 5292055797SPaulo Alcantara TCO_TMR_MASK = 0x3ff, 5392055797SPaulo Alcantara }; 5492055797SPaulo Alcantara 5592055797SPaulo Alcantara typedef struct TCOIORegs { 5692055797SPaulo Alcantara struct { 5792055797SPaulo Alcantara uint16_t rld; 5892055797SPaulo Alcantara uint8_t din; 5992055797SPaulo Alcantara uint8_t dout; 6092055797SPaulo Alcantara uint16_t sts1; 6192055797SPaulo Alcantara uint16_t sts2; 6292055797SPaulo Alcantara uint16_t cnt1; 6392055797SPaulo Alcantara uint16_t cnt2; 6492055797SPaulo Alcantara uint8_t msg1; 6592055797SPaulo Alcantara uint8_t msg2; 6692055797SPaulo Alcantara uint8_t wdcnt; 6792055797SPaulo Alcantara uint16_t tmr; 6892055797SPaulo Alcantara } tco; 6992055797SPaulo Alcantara uint8_t sw_irq_gen; 7092055797SPaulo Alcantara 7192055797SPaulo Alcantara QEMUTimer *tco_timer; 7292055797SPaulo Alcantara int64_t expire_time; 7392055797SPaulo Alcantara uint8_t timeouts_no; 7492055797SPaulo Alcantara 7592055797SPaulo Alcantara MemoryRegion io; 7692055797SPaulo Alcantara } TCOIORegs; 7792055797SPaulo Alcantara 7892055797SPaulo Alcantara /* tco.c */ 7992055797SPaulo Alcantara void acpi_pm_tco_init(TCOIORegs *tr, MemoryRegion *parent); 8092055797SPaulo Alcantara 8192055797SPaulo Alcantara extern const VMStateDescription vmstate_tco_io_sts; 8292055797SPaulo Alcantara 8392055797SPaulo Alcantara #endif /* HW_ACPI_TCO_H */ 84