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Searched refs:tcg_constant_i32 (Results 1 – 25 of 61) sorted by relevance

123

/qemu/target/mips/tcg/
H A Dmsa_translate.c292 tcg_constant_i32(a->wd), in trans_msa_i8()
293 tcg_constant_i32(a->ws), in trans_msa_i8()
294 tcg_constant_i32(a->sa)); in trans_msa_i8()
318 tcg_constant_i32(a->df), in trans_SHF()
319 tcg_constant_i32(a->wd), in trans_SHF()
320 tcg_constant_i32(a->ws), in trans_SHF()
321 tcg_constant_i32(a->sa)); in trans_SHF()
334 tcg_constant_i32(a->df), in trans_msa_i5()
335 tcg_constant_i32(a->wd), in trans_msa_i5()
336 tcg_constant_i32(a->ws), in trans_msa_i5()
[all …]
H A Dtranslate.h125 gen_helper_##name(tcg_env, arg1, tcg_constant_i32(arg2)); \
129 gen_helper_##name(ret, tcg_env, tcg_constant_i32(arg1)); \
133 gen_helper_##name(tcg_env, arg1, arg2, tcg_constant_i32(arg3));\
/qemu/target/s390x/tcg/
H A Dtranslate.c348 gen_helper_per_branch(tcg_env, dest, tcg_constant_i32(s->ilen)); in per_branch()
401 gen_helper_exception(tcg_env, tcg_constant_i32(excp)); in gen_exception()
407 tcg_gen_st_i32(tcg_constant_i32(code), tcg_env, in gen_program_exception()
410 tcg_gen_st_i32(tcg_constant_i32(s->ilen), tcg_env, in gen_program_exception()
430 gen_helper_data_exception(tcg_env, tcg_constant_i32(dxc)); in gen_data_exception()
557 local_cc_op = tcg_constant_i32(s->cc_op); in gen_op_calc_cc()
811 c->u.s32.b = tcg_constant_i32(0); in disas_jcc()
864 c->u.s32.b = tcg_constant_i32(3); in disas_jcc()
868 c->u.s32.b = tcg_constant_i32(2); in disas_jcc()
872 c->u.s32.b = tcg_constant_i32(1); in disas_jcc()
[all …]
/qemu/target/arm/tcg/
H A Dtranslate-sme.c127 gen_helper_sme_zero(tcg_env, tcg_constant_i32(a->imm), in trans_ZERO()
128 tcg_constant_i32(streaming_vec_reg_size(s))); in trans_ZERO()
167 t_desc = tcg_constant_i32(simd_desc(svl, svl, 0)); in trans_MOVA()
242 tcg_constant_i32(desc)); in trans_LDST1()
284 fn(za, zn, pn, pm, tcg_constant_i32(desc)); in TRANS_FEAT()
310 fn(za, zn, zm, pn, pm, tcg_constant_i32(desc)); in TRANS_FEAT()
333 fn(za, zn, zm, pn, pm, fpst, tcg_constant_i32(desc)); in do_outprod_fpst()
354 fn(za, zn, zm, pn, pm, tcg_env, tcg_constant_i32(desc)); in do_outprod_env()
H A Dtranslate.c352 gen_helper_cpsr_write(tcg_env, var, tcg_constant_i32(mask)); in gen_set_cpsr()
366 TCGv_i32 tcg_el = tcg_constant_i32(s->current_el); in gen_rebuild_hflags()
378 gen_helper_exception_internal(tcg_env, tcg_constant_i32(excp)); in gen_exception_internal()
426 TCGv_i32 mask = tcg_constant_i32(0x00ff00ff); in gen_rev16()
534 TCGv_i32 zero = tcg_constant_i32(0); \
549 tcg_gen_umin_i32(tmp1, tmp1, tcg_constant_i32(31)); in GEN_SHIFT()
1030 gen_helper_pre_smc(tcg_env, tcg_constant_i32(syn_aa32_smc())); in gen_smc()
1045 gen_helper_exception_with_syndrome_el(tcg_env, tcg_constant_i32(excp), in gen_exception_el_v()
1046 tcg_constant_i32(syndrome), tcg_el); in gen_exception_el_v()
1051 gen_exception_el_v(excp, syndrome, tcg_constant_i32(target_el)); in gen_exception_el()
[all …]
H A Dtranslate-mve.c124 store_cpu_field(tcg_constant_i32(s->eci << 4), condexec_bits); in mve_update_and_store_eci()
333 fn(tcg_env, qd, qm, tcg_constant_i32(offset)); in do_ldst_sg_imm()
400 fn(tcg_env, tcg_constant_i32(a->qd), rn); in do_vldst_il()
561 gen_helper_mve_##HFN(env, qd, qm, tcg_constant_i32(0)); \ in DO_1OP()
565 gen_helper_mve_##SFN(env, qd, qm, tcg_constant_i32(0)); \
615 fn(tcg_env, qd, qm, tcg_constant_i32(arm_rmode_to_sf(rmode)));
653 tcg_constant_i32(arm_rmode_to_sf(RMODE))); \
658 tcg_constant_i32(arm_rmode_to_sf(RMODE))); \
1280 rda_i = tcg_constant_i32(0); in do_dual_acc()
1334 tcg_constant_i32(mask | (mask << 4)), in gen_vpst()
[all …]
/qemu/target/ppc/translate/
H A Ddfp-impl.c.inc47 tcg_env, tcg_constant_i32(a->uim), rb);\
59 tcg_env, ra, tcg_constant_i32(a->dm)); \
72 tcg_constant_i32(a->U32F1), \
73 tcg_constant_i32(a->U32F2)); \
90 tcg_constant_i32(a->I32FLD)); \
121 tcg_constant_i32(a->I32FLD)); \
H A Dfp-impl.c.inc291 crf = tcg_constant_i32(crfD(ctx->opcode));
311 crf = tcg_constant_i32(crfD(ctx->opcode));
484 tmask = tcg_constant_i32(1 << nibble);
504 TCGv_i32 st_mask = tcg_constant_i32(store_mask);
634 gen_helper_fpscr_clrbit(tcg_env, tcg_constant_i32(crb));
654 gen_helper_fpscr_setbit(tcg_env, tcg_constant_i32(crb));
683 t0 = tcg_constant_i32(flm << (w * 8));
685 t0 = tcg_constant_i32(0xffff);
687 t0 = tcg_constant_i32(0xff);
719 t1 = tcg_constant_i32(1 << sh);
H A Dstorage-ctrl-impl.c.inc61 gen_helper_SLBIA(tcg_env, tcg_constant_i32(a->ih));
75 gen_helper_SLBIAG(tcg_env, cpu_gpr[a->rs], tcg_constant_i32(a->l));
223 tcg_constant_i32(a->ric << TLBIE_F_RIC_SHIFT |
/qemu/target/m68k/
H A Dtranslate.c266 gen_helper_raise_exception(tcg_env, tcg_constant_i32(nr)); in gen_raise_exception()
278 tcg_gen_st_i32(tcg_constant_i32(this_pc), tcg_env, in gen_raise_exception_format2()
457 base = tcg_constant_i32(offset + bd); in gen_lea_indexed()
473 add = tcg_constant_i32(bd); in gen_lea_indexed()
597 gen_helper_flush_flags(tcg_env, tcg_constant_i32(s->cc_op)); in gen_flush_flags()
891 return tcg_constant_i32(offset); in gen_ea_mode()
1121 tmp = tcg_constant_i32((int8_t)read_im8(env, s)); in gen_ea_mode_fp()
1125 tmp = tcg_constant_i32((int16_t)read_im16(env, s)); in gen_ea_mode_fp()
1129 tmp = tcg_constant_i32(read_im32(env, s)); in gen_ea_mode_fp()
1133 tmp = tcg_constant_i32(read_im32(env, s)); in gen_ea_mode_fp()
[all …]
/qemu/target/i386/tcg/
H A Dtranslate.c569 return tcg_constant_i32(cur_insn_len(s)); in cur_insn_len_i32()
584 return tcg_constant_i32(-1); in eip_next_i32()
592 return tcg_constant_i32(s->pc - s->cs_base); in eip_next_i32()
815 gen_helper_check_io(tcg_env, port, tcg_constant_i32(1 << ot)); in gen_check_io()
825 tcg_constant_i32(svm_flags), in gen_check_io()
876 cc_op = tcg_constant_i32(s->cc_op); in gen_mov_eflags()
1312 TCGv_i32 t_size = tcg_constant_i32(1 << ot); in gen_bpt_io()
1531 TCGv_i32 tmp = tcg_constant_i32(opreg); in gen_helper_fp_arith_STN_ST0()
1558 gen_helper_raise_exception(tcg_env, tcg_constant_i32(trapno)); in gen_exception()
2034 gen_helper_load_seg(tcg_env, tcg_constant_i32(seg_reg), sel); in gen_movl_seg()
[all …]
/qemu/target/sparc/
H A Dtranslate.c764 tcg_gen_smax_i32(u, u, tcg_constant_i32(INT16_MIN)); in gen_op_fpadds16s()
765 tcg_gen_smin_i32(u, u, tcg_constant_i32(INT16_MAX)); in gen_op_fpadds16s()
782 tcg_gen_smax_i32(u, u, tcg_constant_i32(INT16_MIN)); in gen_op_fpsubs16s()
783 tcg_gen_smin_i32(u, u, tcg_constant_i32(INT16_MAX)); in gen_op_fpsubs16s()
794 TCGv_i32 z = tcg_constant_i32(0); in gen_op_fpadds32s()
812 TCGv_i32 z = tcg_constant_i32(0); in gen_op_fpsubs32s()
1051 gen_helper_raise_exception(tcg_env, tcg_constant_i32(which)); in gen_exception()
1074 return delay_exceptionv(dc, tcg_constant_i32(excp)); in delay_exception()
1299 tcg_gen_st_i32(tcg_constant_i32(0), tcg_env, in gen_op_clear_ieee_excp_and_FTT()
1361 TCGv_i32 z = tcg_constant_i32(0); in gen_op_fmadds()
[all …]
/qemu/target/tricore/
H A Dtranslate.c133 TCGv_i32 helper_tmp = tcg_constant_i32(arg); \
523 TCGv temp = tcg_constant_i32(con); in gen_maddi32_d()
589 TCGv temp = tcg_constant_i32(con); in gen_maddi64_d()
597 TCGv temp = tcg_constant_i32(con); in gen_maddui64_d()
605 TCGv t_n = tcg_constant_i32(n); in gen_madd_h()
632 TCGv t_n = tcg_constant_i32(n); in gen_maddsu_h()
659 TCGv t_n = tcg_constant_i32(n); in gen_maddsum_h()
694 TCGv t_n = tcg_constant_i32(n); in gen_madds_h()
731 TCGv t_n = tcg_constant_i32(n); in gen_maddsus_h()
766 TCGv t_n = tcg_constant_i32(n); in gen_maddsums_h()
[all …]
/qemu/tcg/
H A Dtcg-op.c342 tcg_gen_mov_i32(ret, tcg_constant_i32(arg)); in tcg_gen_movi_i32()
356 tcg_gen_add_i32(ret, arg1, tcg_constant_i32(arg2)); in tcg_gen_addi_i32()
370 tcg_gen_sub_i32(ret, tcg_constant_i32(arg1), arg2); in tcg_gen_subfi_i32()
416 tcg_gen_and_i32(ret, arg1, tcg_constant_i32(arg2)); in tcg_gen_andi_i32()
432 tcg_gen_or_i32(ret, arg1, tcg_constant_i32(arg2)); in tcg_gen_ori_i32()
451 tcg_gen_xor_i32(ret, arg1, tcg_constant_i32(arg2)); in tcg_gen_xori_i32()
475 tcg_gen_shl_i32(ret, arg1, tcg_constant_i32(arg2)); in tcg_gen_shli_i32()
490 tcg_gen_shr_i32(ret, arg1, tcg_constant_i32(arg2)); in tcg_gen_shri_i32()
505 tcg_gen_sar_i32(ret, arg1, tcg_constant_i32(arg2)); in tcg_gen_sari_i32()
525 tcg_gen_brcond_i32(cond, arg1, tcg_constant_i32(arg2), l); in tcg_gen_brcondi_i32()
[all …]
H A Dtcg-op-ldst.c618 tcg_constant_i32(orig_oi)); in tcg_gen_qemu_ld_i128_int()
724 tcg_constant_i32(orig_oi)); in tcg_gen_qemu_st_i128_int()
879 gen(retv, tcg_env, a64, cmpv, newv, tcg_constant_i32(oi)); in tcg_gen_atomic_cmpxchg_i32_int()
959 gen(retv, tcg_env, a64, cmpv, newv, tcg_constant_i32(oi)); in tcg_gen_atomic_cmpxchg_i64_int()
1023 tcg_constant_i32(oi)); in tcg_gen_nonatomic_cmpxchg_i128_int()
1081 gen(retv, tcg_env, a64, cmpv, newv, tcg_constant_i32(oi)); in tcg_gen_atomic_cmpxchg_i128_int()
1140 gen(ret, tcg_env, a64, val, tcg_constant_i32(oi)); in do_atomic_op_i32()
1178 gen(ret, tcg_env, a64, val, tcg_constant_i32(oi)); in do_atomic_op_i64()
/qemu/target/loongarch/tcg/insn_trans/
H A Dtrans_fcmp.c.inc44 fn(var, tcg_env, src1, src2, tcg_constant_i32(flags));
68 fn(var, tcg_env, src1, src2, tcg_constant_i32(flags));
H A Dtrans_privileged.c.inc323 gen_helper_invtlb_all_g(tcg_env, tcg_constant_i32(1));
326 gen_helper_invtlb_all_g(tcg_env, tcg_constant_i32(0));
355 TCGv_i32 mem_idx = tcg_constant_i32(ctx->mem_idx);
371 TCGv_i32 mem_idx = tcg_constant_i32(ctx->mem_idx);
/qemu/target/rx/
H A Dtranslate.c463 imm = tcg_constant_i32(a->imm); in trans_MOV_im()
731 z = tcg_constant_i32(0); in stcond()
732 _imm = tcg_constant_i32(imm); in stcond()
817 TCGv imm = tcg_constant_i32(src2); in rx_gen_op_irr()
969 TCGv z = tcg_constant_i32(0); in rx_adc()
1007 TCGv z = tcg_constant_i32(0); in rx_add()
1190 TCGv imm = tcg_constant_i32(a->imm); in trans_EMUL_ir()
1217 TCGv imm = tcg_constant_i32(a->imm); in trans_EMULU_ir()
1318 tcg_gen_sub_i32(count, tcg_constant_i32(32), tmp); in trans_SHLL_rr()
1587 TCGv pc = tcg_constant_i32(ctx->base.pc_next); in rx_save_pc()
[all …]
/qemu/target/ppc/
H A Dtranslate.c308 t0 = tcg_constant_i32(excp); in gen_exception_err_nip()
309 t1 = tcg_constant_i32(error); in gen_exception_err_nip()
330 t0 = tcg_constant_i32(excp); in gen_exception_nip()
375 tcg_constant_i32(POWERPC_EXCP_DEBUG)); in gen_debug_exception()
425 TCGv_i32 t0 = tcg_constant_i32(sprn); in spr_load_dump_spr()
439 TCGv_i32 t0 = tcg_constant_i32(sprn); in spr_store_dump_spr()
473 gen_helper_spr_core_write_generic(tcg_env, tcg_constant_i32(sprn), in spr_core_write_generic()
493 gen_helper_spr_core_write_generic(tcg_env, tcg_constant_i32(sprn), t0); in spr_core_write_generic32()
529 gen_helper_spr_write_CTRL(tcg_env, tcg_constant_i32(sprn), in spr_write_CTRL()
832 TCGv_i32 t0 = tcg_constant_i32((sprn - SPR_IBAT0U) / 2); in spr_write_ibatu()
[all …]
/qemu/target/xtensa/
H A Dtranslate.c306 tcg_gen_sub_i32(cpu_SR[SAR], tcg_constant_i32(32), dc->sar_m32); in gen_left_shift_sar()
313 gen_helper_exception(tcg_env, tcg_constant_i32(excp)); in gen_exception()
318 TCGv_i32 pc = tcg_constant_i32(dc->pc); in gen_exception_cause()
319 gen_helper_exception_cause(tcg_env, pc, tcg_constant_i32(cause)); in gen_exception_cause()
328 TCGv_i32 pc = tcg_constant_i32(dc->pc); in gen_debug_exception()
329 gen_helper_debug_exception(tcg_env, pc, tcg_constant_i32(cause)); in gen_debug_exception()
391 gen_jump_slot(dc, tcg_constant_i32(dest), in gen_jumpi()
399 tcg_constant_i32(callinc), PS_CALLINC_SHIFT, PS_CALLINC_LEN); in gen_callw_slot()
445 gen_brcond(dc, cond, t0, tcg_constant_i32(t1), addr); in gen_brcondi()
535 TCGv_i32 pc = tcg_constant_i32(dc->pc); in gen_window_check()
[all …]
/qemu/target/microblaze/
H A Dtranslate.c100 gen_helper_raise_exception(tcg_env, tcg_constant_i32(index)); in gen_raise_exception()
113 TCGv_i32 tmp = tcg_constant_i32(esr_ec); in gen_raise_hw_excp()
179 return tcg_constant_i32(0); in reg_for_read()
247 imm = tcg_constant_i32(arg->imm); in do_typeb_val()
292 TCGv_i32 zero = tcg_constant_i32(0); in gen_add()
620 ret = tcg_constant_i32(0); in DO_TYPEA()
640 ret = tcg_constant_i32(imm); in compute_ldst_addr_typeb()
1136 zero = tcg_constant_i32(0); in DO_BR()
1137 next = tcg_constant_i32(dc->base.pc_next + (delay + 1) * 4); in DO_BR()
1252 tcg_gen_st_i32(tcg_constant_i32(1), tcg_env, in trans_mbar()
[all …]
/qemu/target/riscv/insn_trans/
H A Dtrans_rvvk.c.inc253 egs = tcg_constant_i32(EGS); \
264 desc = tcg_constant_i32( \
326 egs = tcg_constant_i32(EGS); \
338 uimm_v = tcg_constant_i32(a->rs1); \
339 desc = tcg_constant_i32( \
393 egs = tcg_constant_i32(EGS); \
444 egs = tcg_constant_i32(ZVKNH_EGS);
475 egs = tcg_constant_i32(ZVKNH_EGS);
/qemu/target/avr/
H A Dtranslate.c410 TCGv Rr = tcg_constant_i32(a->imm); in trans_SUBI()
435 TCGv zero = tcg_constant_i32(0); in trans_SBC()
463 TCGv Rr = tcg_constant_i32(a->imm); in trans_SBCI()
465 TCGv zero = tcg_constant_i32(0); in trans_SBCI()
647 TCGv t0 = tcg_constant_i32(0); in trans_NEG()
940 TCGv t0 = tcg_constant_i32(ret & 0x0000ff); in gen_push_ret()
945 TCGv t0 = tcg_constant_i32(ret & 0x00ffff); in gen_push_ret()
951 TCGv lo = tcg_constant_i32(ret & 0x0000ff); in gen_push_ret()
952 TCGv hi = tcg_constant_i32((ret & 0xffff00) >> 8); in gen_push_ret()
1221 TCGv zero = tcg_constant_i32(0); in trans_CPC()
[all …]
/qemu/target/sh4/
H A Dtranslate.c528 TCGv addr = tcg_constant_i32(ctx->base.pc_next + 4 + B7_0 * 2); in _decode_opc()
536 TCGv addr = tcg_constant_i32((ctx->base.pc_next + 4 + B7_0 * 4) & ~3); in _decode_opc()
757 TCGv zero = tcg_constant_i32(0); in _decode_opc()
856 TCGv t0 = tcg_constant_i32(0); in _decode_opc()
1266 imm = tcg_constant_i32(B7_0); in _decode_opc()
1647 tcg_constant_i32(0x80), ctx->memidx, MO_UB); in _decode_opc()
1745 TCGv m = tcg_constant_i32((ctx->opcode >> 8) & 3); in _decode_opc()
1746 TCGv n = tcg_constant_i32((ctx->opcode >> 10) & 3); in _decode_opc()
1758 TCGv n = tcg_constant_i32((ctx->opcode >> 10) & 3); in _decode_opc()
1973 op_arg = tcg_constant_i32(-1); in decode_gusa()
[all …]
/qemu/accel/tcg/
H A Dtranslator.c27 tcg_gen_st8_i32(tcg_constant_i32(val), tcg_env, in set_can_do_io()
61 tcg_gen_sub_i32(count, count, tcg_constant_i32(0)); in gen_tb_start()
97 tcgv_i32_arg(tcg_constant_i32(num_insns))); in gen_tb_end()

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