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Searched refs:soft (Results 1 – 13 of 13) sorted by relevance

/qemu/tests/fp/
H A Dfp-test-log2.c25 static void compare(ufloat64 test, ufloat64 real, ufloat64 soft, bool exact) in compare() argument
30 if (real.i == soft.i) { in compare()
33 msb = 63 - __builtin_clzll(real.i ^ soft.i); in compare()
36 if (real.i > soft.i) { in compare()
37 ulp = real.i - soft.i; in compare()
39 ulp = soft.i - real.i; in compare()
51 test.i, test.d, soft.i, soft.d, real.i, real.d); in compare()
57 (int)(soft.i >> 52) - (int)(real.i >> 52)); in compare()
69 ufloat64 test, real, soft; in main() local
79 soft.i = float64_log2(test.i, &qsf); in main()
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/qemu/target/riscv/
H A Dfpu_helper.c28 int soft = get_float_exception_flags(&env->fp_status); in riscv_cpu_get_fflags() local
31 hard |= (soft & float_flag_inexact) ? FPEXC_NX : 0; in riscv_cpu_get_fflags()
32 hard |= (soft & float_flag_underflow) ? FPEXC_UF : 0; in riscv_cpu_get_fflags()
33 hard |= (soft & float_flag_overflow) ? FPEXC_OF : 0; in riscv_cpu_get_fflags()
34 hard |= (soft & float_flag_divbyzero) ? FPEXC_DZ : 0; in riscv_cpu_get_fflags()
35 hard |= (soft & float_flag_invalid) ? FPEXC_NV : 0; in riscv_cpu_get_fflags()
42 int soft = 0; in riscv_cpu_set_fflags() local
44 soft |= (hard & FPEXC_NX) ? float_flag_inexact : 0; in riscv_cpu_set_fflags()
45 soft |= (hard & FPEXC_UF) ? float_flag_underflow : 0; in riscv_cpu_set_fflags()
46 soft |= (hard & FPEXC_OF) ? float_flag_overflow : 0; in riscv_cpu_set_fflags()
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/qemu/linux-user/mips/
H A Dcpu_loop.c223 bool soft; in target_cpu_copy_regs() member
275 prog_req.soft &= interp_req.soft; in target_cpu_copy_regs()
299 !prog_req.fr1 && !prog_req.single && !prog_req.soft) { in target_cpu_copy_regs()
/qemu/fpu/
H A Dsoftfloat.c339 hard_f32_op2_fn hard, soft_f32_op2_fn soft, in float32_gen2() argument
348 goto soft; in float32_gen2()
353 goto soft; in float32_gen2()
360 goto soft; in float32_gen2()
364 soft: in float32_gen2()
365 return soft(ua.s, ub.s, s); in float32_gen2()
370 hard_f64_op2_fn hard, soft_f64_op2_fn soft, in float64_gen2() argument
379 goto soft; in float64_gen2()
384 goto soft; in float64_gen2()
391 goto soft; in float64_gen2()
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/qemu/docs/system/riscv/
H A Dmicroblaze-v-generic.rst3 The AMD MicroBlaze™ V processor is a soft-core RISC-V processor IP for AMD
/qemu/tests/tcg/arm/
H A DMakefile.softmmu-target14 $(CC) -mcpu=cortex-m0 -mfloat-abi=soft \
/qemu/docs/system/devices/
H A Dccid.rst122 …vscclient -e "db=\"sql:$PWD\" use_hw=no soft=(,Test,CAC,,id-cert,signing-cert,encryption-cert)" <q…
/qemu/linux-headers/asm-x86/
H A Dkvm.h344 __u8 soft; member
/qemu/hw/char/
H A Dtrace-events40 escc_soft_reset_chn(char channel) "soft reset channel %c"
/qemu/qapi/
H A Dblock-export.json277 # - soft: Hide export from new clients, answer with ESHUTDOWN for
/qemu/docs/about/
H A Demulation.rst52 - RISC based soft-core by Xilinx
92 - A configurable 32 bit soft core now owned by Cadence
/qemu/docs/devel/
H A Dcodebase.rst185 QEMU testsuite for soft float implementation.
/qemu/target/i386/kvm/
H A Dkvm.c5047 events.interrupt.soft = env->soft_interrupt; in kvm_put_vcpu_events()
5117 env->soft_interrupt = events.interrupt.soft; in kvm_get_vcpu_events()