| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| H A D | dcn20_fpu.c | 993 int pipe_cnt, i; in dcn20_populate_dml_writeback_from_context() local
997 for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) { in dcn20_populate_dml_writeback_from_context()
1004 pipes[pipe_cnt].dout.wb_enable = (wb_info->wb_enabled == true) ? 1 : 0; in dcn20_populate_dml_writeback_from_context()
1005 pipes[pipe_cnt].dout.num_active_wb++; in dcn20_populate_dml_writeback_from_context()
1006 pipes[pipe_cnt].dout.wb.wb_src_height = wb_info->dwb_params.cnv_params.crop_height; in dcn20_populate_dml_writeback_from_context()
1007 pipes[pipe_cnt].dout.wb.wb_src_width = wb_info->dwb_params.cnv_params.crop_width; in dcn20_populate_dml_writeback_from_context()
1008 pipes[pipe_cnt].dout.wb.wb_dst_width = wb_info->dwb_params.dest_width; in dcn20_populate_dml_writeback_from_context()
1009 pipes[pipe_cnt].dout.wb.wb_dst_height = wb_info->dwb_params.dest_height; in dcn20_populate_dml_writeback_from_context()
1010 pipes[pipe_cnt].dout.wb.wb_htaps_luma = 1; in dcn20_populate_dml_writeback_from_context()
1011 pipes[pipe_cnt].dout.wb.wb_vtaps_luma = 1; in dcn20_populate_dml_writeback_from_context()
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| H A D | dcn20_fpu.h | 38 int pipe_cnt, int i);
42 int pipe_cnt,
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| H A D | dcn314_fpu.c | 311 int i, pipe_cnt; in dcn314_populate_dml_pipes_from_context_fpu() local
321 for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) { in dcn314_populate_dml_pipes_from_context_fpu()
334 pipes[pipe_cnt].pipe.dest.vtotal = pipe->stream->adjust.v_total_min; in dcn314_populate_dml_pipes_from_context_fpu()
336 pipes[pipe_cnt].pipe.dest.vtotal = timing->v_total; in dcn314_populate_dml_pipes_from_context_fpu()
340 pipes[pipe_cnt].pipe.dest.vblank_nom = timing->v_total - pipes[pipe_cnt].pipe.dest.vactive; in dcn314_populate_dml_pipes_from_context_fpu()
341 pipes[pipe_cnt].pipe.dest.vblank_nom = min(pipes[pipe_cnt].pipe.dest.vblank_nom, num_lines); in dcn314_populate_dml_pipes_from_context_fpu()
346 pipes[pipe_cnt].pipe.dest.vblank_nom = in dcn314_populate_dml_pipes_from_context_fpu()
347 max(pipes[pipe_cnt].pipe.dest.vblank_nom, timing->v_sync_width + v_back_porch + 2); in dcn314_populate_dml_pipes_from_context_fpu()
348 …pipes[pipe_cnt].pipe.dest.vblank_nom = min(pipes[pipe_cnt].pipe.dest.vblank_nom, max_allowed_vblan… in dcn314_populate_dml_pipes_from_context_fpu()
364 pipes[pipe_cnt].pipe.src.immediate_flip = true; in dcn314_populate_dml_pipes_from_context_fpu()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| H A D | dcn30_fpu.c | 184 int pipe_cnt, i, j; in dcn30_fpu_populate_dml_writeback_from_context() local
191 for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) { in dcn30_fpu_populate_dml_writeback_from_context()
199 pipes[pipe_cnt].dout.wb_enable = 0; in dcn30_fpu_populate_dml_writeback_from_context()
200 pipes[pipe_cnt].dout.num_active_wb = 0; in dcn30_fpu_populate_dml_writeback_from_context()
206 pipes[pipe_cnt].dout.wb_enable = 1; in dcn30_fpu_populate_dml_writeback_from_context()
207 pipes[pipe_cnt].dout.num_active_wb++; in dcn30_fpu_populate_dml_writeback_from_context()
250 pipes[pipe_cnt].pipe.dest.pixel_rate_mhz, in dcn30_fpu_populate_dml_writeback_from_context()
257 pipes[pipe_cnt].pipe.dest.htotal, in dcn30_fpu_populate_dml_writeback_from_context()
262 pipes[pipe_cnt].dout.wb = dout_wb; in dcn30_fpu_populate_dml_writeback_from_context()
267 pipe_cnt++; in dcn30_fpu_populate_dml_writeback_from_context()
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| H A D | dcn30_fpu.h | 38 int pipe_cnt,
46 int pipe_cnt,
66 int pipe_cnt,
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn35/ |
| H A D | dcn35_fpu.c | 442 int i, pipe_cnt; in dcn35_populate_dml_pipes_from_context_fpu() local
453 for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) { in dcn35_populate_dml_pipes_from_context_fpu()
470 pipes[pipe_cnt].pipe.dest.vtotal = in dcn35_populate_dml_pipes_from_context_fpu()
472 pipes[pipe_cnt].pipe.dest.vblank_nom = timing->v_total - in dcn35_populate_dml_pipes_from_context_fpu()
473 pipes[pipe_cnt].pipe.dest.vactive; in dcn35_populate_dml_pipes_from_context_fpu()
476 pipes[pipe_cnt].pipe.dest.vblank_nom = timing->v_total - pipes[pipe_cnt].pipe.dest.vactive; in dcn35_populate_dml_pipes_from_context_fpu()
477 pipes[pipe_cnt].pipe.dest.vblank_nom = min(pipes[pipe_cnt].pipe.dest.vblank_nom, num_lines); in dcn35_populate_dml_pipes_from_context_fpu()
482 pipes[pipe_cnt].pipe.dest.vblank_nom = in dcn35_populate_dml_pipes_from_context_fpu()
483 max(pipes[pipe_cnt].pipe.dest.vblank_nom, timing->v_sync_width + v_back_porch + 2); in dcn35_populate_dml_pipes_from_context_fpu()
484 …pipes[pipe_cnt].pipe.dest.vblank_nom = min(pipes[pipe_cnt].pipe.dest.vblank_nom, max_allowed_vblan… in dcn35_populate_dml_pipes_from_context_fpu()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn351/ |
| H A D | dcn351_fpu.c | 475 int i, pipe_cnt; in dcn351_populate_dml_pipes_from_context_fpu() local
486 for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) { in dcn351_populate_dml_pipes_from_context_fpu()
503 pipes[pipe_cnt].pipe.dest.vtotal = in dcn351_populate_dml_pipes_from_context_fpu()
505 pipes[pipe_cnt].pipe.dest.vblank_nom = timing->v_total - in dcn351_populate_dml_pipes_from_context_fpu()
506 pipes[pipe_cnt].pipe.dest.vactive; in dcn351_populate_dml_pipes_from_context_fpu()
509 pipes[pipe_cnt].pipe.dest.vblank_nom = timing->v_total - pipes[pipe_cnt].pipe.dest.vactive; in dcn351_populate_dml_pipes_from_context_fpu()
510 pipes[pipe_cnt].pipe.dest.vblank_nom = min(pipes[pipe_cnt].pipe.dest.vblank_nom, num_lines); in dcn351_populate_dml_pipes_from_context_fpu()
515 pipes[pipe_cnt].pipe.dest.vblank_nom = in dcn351_populate_dml_pipes_from_context_fpu()
516 max(pipes[pipe_cnt].pipe.dest.vblank_nom, timing->v_sync_width + v_back_porch + 2); in dcn351_populate_dml_pipes_from_context_fpu()
517 …pipes[pipe_cnt].pipe.dest.vblank_nom = min(pipes[pipe_cnt].pipe.dest.vblank_nom, max_allowed_vblan… in dcn351_populate_dml_pipes_from_context_fpu()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn301/ |
| H A D | dcn301_fpu.c | 297 int pipe_cnt) in calculate_wm_set_for_vlevel() argument
311 wm_set->urgent_ns = get_wm_urgent(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
312 …wm_set->cstate_pstate.cstate_enter_plus_exit_ns = get_wm_stutter_enter_exit(dml, pipes, pipe_cnt) … in calculate_wm_set_for_vlevel()
313 wm_set->cstate_pstate.cstate_exit_ns = get_wm_stutter_exit(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
314 wm_set->cstate_pstate.pstate_change_ns = get_wm_dram_clock_change(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
315 wm_set->pte_meta_urgent_ns = get_wm_memory_trip(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
316 wm_set->frac_urg_bw_nom = get_fraction_of_urgent_bandwidth(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
317 wm_set->frac_urg_bw_flip = get_fraction_of_urgent_bandwidth_imm_flip(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
318 wm_set->urgent_latency_ns = get_urgent_latency(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
429 int pipe_cnt, in dcn301_fpu_calculate_wm_and_dlg() argument
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| H A D | dcn301_fpu.h | 39 int pipe_cnt,
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | dcn32_fpu.h | 37 int pipe_cnt);
44 unsigned int pipe_cnt,
56 int pipe_cnt,
64 int pipe_cnt,
70 int pipe_cnt);
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| H A D | dcn32_fpu.c | 278 int pipe_cnt, in dcn32_find_dummy_latency_index_for_fw_based_mclk_switch() argument
293 …dcn32_internal_validate_bw(dc, context, pipes, &pipe_cnt, &vlevel, DC_VALIDATE_MODE_AND_PROGRAMMIN… in dcn32_find_dummy_latency_index_for_fw_based_mclk_switch()
336 int pipe_cnt) in dcn32_helper_populate_phantom_dlg_params() argument
350 get_vstartup(&context->bw_ctx.dml, pipes, pipe_cnt, pipe_idx); in dcn32_helper_populate_phantom_dlg_params()
352 get_vupdate_offset(&context->bw_ctx.dml, pipes, pipe_cnt, pipe_idx); in dcn32_helper_populate_phantom_dlg_params()
354 get_vupdate_width(&context->bw_ctx.dml, pipes, pipe_cnt, pipe_idx); in dcn32_helper_populate_phantom_dlg_params()
356 get_vready_offset(&context->bw_ctx.dml, pipes, pipe_cnt, pipe_idx); in dcn32_helper_populate_phantom_dlg_params()
471 unsigned int pipe_cnt, in dcn32_set_phantom_stream_timing() argument
515 …phantom_vactive = get_subviewport_lines_needed_in_mall(&context->bw_ctx.dml, pipes, pipe_cnt, pipe… in dcn32_set_phantom_stream_timing()
527 phantom_bp = get_vstartup(&context->bw_ctx.dml, pipes, pipe_cnt, pipe_idx); in dcn32_set_phantom_stream_timing()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| H A D | dcn31_fpu.c | 446 int pipe_cnt) in dcn31_zero_pipe_dcc_fraction() argument
450 pipes[pipe_cnt].pipe.src.dcc_fraction_of_zs_req_luma = 0; in dcn31_zero_pipe_dcc_fraction()
451 pipes[pipe_cnt].pipe.src.dcc_fraction_of_zs_req_chroma = 0; in dcn31_zero_pipe_dcc_fraction()
485 int pipe_cnt, in dcn31_calculate_wm_and_dlg_fp() argument
501 if (pipe_cnt == 0) { in dcn31_calculate_wm_and_dlg_fp()
511 get_wm_z8_stutter_enter_exit(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; in dcn31_calculate_wm_and_dlg_fp()
513 …if (get_stutter_period(&context->bw_ctx.dml, pipes, pipe_cnt) < dc->debug.minimum_z8_residency_tim… in dcn31_calculate_wm_and_dlg_fp()
523 …bw_ctx.bw.dcn.watermarks.a.urgent_ns = get_wm_urgent(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; in dcn31_calculate_wm_and_dlg_fp()
524 …state_enter_plus_exit_ns = get_wm_stutter_enter_exit(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; in dcn31_calculate_wm_and_dlg_fp()
525 …a.cstate_pstate.cstate_exit_ns = get_wm_stutter_exit(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; in dcn31_calculate_wm_and_dlg_fp()
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| H A D | dcn31_fpu.h | 36 int pipe_cnt);
44 int pipe_cnt,
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| H A D | dcn32_resource_helpers.c | 318 uint8_t pipe_cnt = 0; in dcn32_determine_det_override() local
369 for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) { in dcn32_determine_det_override()
372 pipes[pipe_cnt].pipe.src.det_size_override = pipe_segments[i] * DCN3_2_DET_SEG_SIZE; in dcn32_determine_det_override()
373 pipe_cnt++; in dcn32_determine_det_override()
384 int i, pipe_cnt; in dcn32_set_det_allocations() local
389 for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) { in dcn32_set_det_allocations()
395 pipe_cnt++; in dcn32_set_det_allocations()
402 if (pipe_cnt == 1) { in dcn32_set_det_allocations()
753 int i, pipe_cnt; in dcn32_update_dml_pipes_odm_policy_based_on_context() local
757 for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) { in dcn32_update_dml_pipes_odm_policy_based_on_context()
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| H A D | dcn32_resource.c | 1721 unsigned int pipe_cnt, in dcn32_enable_phantom_stream() argument
1736 …dcn32_set_phantom_stream_timing(dc, context, ref_pipe, phantom_stream, pipes, pipe_cnt, dc_pipe_id… in dcn32_enable_phantom_stream()
1748 unsigned int pipe_cnt, in dcn32_add_phantom_pipes() argument
1757 phantom_stream = dcn32_enable_phantom_stream(dc, context, pipes, pipe_cnt, index); in dcn32_add_phantom_pipes()
1787 int pipe_cnt = 0; in dml1_validate() local
1805 out = dcn32_internal_validate_bw(dc, context, pipes, &pipe_cnt, &vlevel, validate_mode); in dml1_validate()
1808 if (pipe_cnt == 0) in dml1_validate()
1821 dc->res_pool->funcs->calculate_wm_and_dlg(dc, context, pipes, pipe_cnt, vlevel); in dml1_validate()
1905 int i, pipe_cnt; in dcn32_populate_dml_pipes_from_context() local
1938 for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) { in dcn32_populate_dml_pipes_from_context()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn315/ |
| H A D | dcn315_resource.c | 1701 int i, pipe_cnt, crb_idx, crb_pipes; in dcn315_populate_dml_pipes_from_context() local
1712 for (i = 0, pipe_cnt = 0, crb_pipes = 0; i < dc->res_pool->pipe_count; i++) { in dcn315_populate_dml_pipes_from_context()
1725 pipes[pipe_cnt].pipe.src.immediate_flip = true; in dcn315_populate_dml_pipes_from_context()
1727 pipes[pipe_cnt].pipe.src.unbounded_req_mode = false; in dcn315_populate_dml_pipes_from_context()
1728 pipes[pipe_cnt].pipe.dest.vfront_porch = timing->v_front_porch; in dcn315_populate_dml_pipes_from_context()
1729 pipes[pipe_cnt].pipe.src.dcc_rate = 3; in dcn315_populate_dml_pipes_from_context()
1730 pipes[pipe_cnt].dout.dsc_input_bpc = 0; in dcn315_populate_dml_pipes_from_context()
1732 dcn31_zero_pipe_dcc_fraction(pipes, pipe_cnt); in dcn315_populate_dml_pipes_from_context()
1734 int bpp = source_format_to_bpp(pipes[pipe_cnt].pipe.src.source_format); in dcn315_populate_dml_pipes_from_context()
1749 pipes[pipe_cnt].pipe.src.det_size_override = approx_det_segs_required_for_pstate; in dcn315_populate_dml_pipes_from_context()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn31/ |
| H A D | dcn31_resource.c | 1652 uint32_t pipe_cnt; in dcn31x_populate_dml_pipes_from_context() local
1657 pipe_cnt = dcn20_populate_dml_pipes_from_context(dc, context, pipes, validate_mode); in dcn31x_populate_dml_pipes_from_context()
1659 for (i = 0; i < pipe_cnt; i++) { in dcn31x_populate_dml_pipes_from_context()
1669 return pipe_cnt; in dcn31x_populate_dml_pipes_from_context()
1677 int i, pipe_cnt; in dcn31_populate_dml_pipes_from_context() local
1686 for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) { in dcn31_populate_dml_pipes_from_context()
1703 pipes[pipe_cnt].pipe.src.immediate_flip = true; in dcn31_populate_dml_pipes_from_context()
1704 pipes[pipe_cnt].pipe.src.unbounded_req_mode = false; in dcn31_populate_dml_pipes_from_context()
1705 pipes[pipe_cnt].pipe.src.gpuvm = true; in dcn31_populate_dml_pipes_from_context()
1706 pipes[pipe_cnt].pipe.dest.vfront_porch = timing->v_front_porch; in dcn31_populate_dml_pipes_from_context()
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| H A D | dcn31_resource.h | 46 int pipe_cnt,
60 int pipe_cnt);
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn30/ |
| H A D | dcn30_resource.h | 52 int pipe_cnt);
72 int pipe_cnt,
106 display_e2e_pipe_params_st *pipes, int pipe_cnt, int vlevel);
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| H A D | dcn30_resource.c | 1357 int i, pipe_cnt; in dcn30_populate_dml_pipes_from_context() local
1364 for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) { in dcn30_populate_dml_pipes_from_context()
1368 pipes[pipe_cnt++].pipe.scale_ratio_depth.lb_depth = in dcn30_populate_dml_pipes_from_context()
1372 return pipe_cnt; in dcn30_populate_dml_pipes_from_context()
1410 int pipe_cnt) in dcn30_set_mcif_arb_params() argument
1440 dcn30_fpu_set_mcif_arb_params(wb_arb_params, dml, pipes, pipe_cnt, j); in dcn30_set_mcif_arb_params()
1671 int pipe_cnt, i, pipe_idx, vlevel = 0; in dcn30_internal_validate_bw() local
1682 pipe_cnt = dc->res_pool->funcs->populate_dml_pipes(dc, context, pipes, validate_mode); in dcn30_internal_validate_bw()
1684 if (!pipe_cnt) { in dcn30_internal_validate_bw()
1689 dml_log_pipe_params(&context->bw_ctx.dml, pipes, pipe_cnt); in dcn30_internal_validate_bw()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn316/ |
| H A D | dcn316_resource.c | 1646 int i, pipe_cnt; in dcn316_populate_dml_pipes_from_context() local
1655 for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) { in dcn316_populate_dml_pipes_from_context()
1668 pipes[pipe_cnt].pipe.src.immediate_flip = true; in dcn316_populate_dml_pipes_from_context()
1670 pipes[pipe_cnt].pipe.src.unbounded_req_mode = false; in dcn316_populate_dml_pipes_from_context()
1671 pipes[pipe_cnt].pipe.dest.vfront_porch = timing->v_front_porch; in dcn316_populate_dml_pipes_from_context()
1672 pipes[pipe_cnt].pipe.src.dcc_rate = 3; in dcn316_populate_dml_pipes_from_context()
1673 pipes[pipe_cnt].dout.dsc_input_bpc = 0; in dcn316_populate_dml_pipes_from_context()
1675 dcn31_zero_pipe_dcc_fraction(pipes, pipe_cnt); in dcn316_populate_dml_pipes_from_context()
1678 if (pipes[pipe_cnt].dout.dsc_enable) { in dcn316_populate_dml_pipes_from_context()
1681 pipes[pipe_cnt].dout.dsc_input_bpc = 8; in dcn316_populate_dml_pipes_from_context()
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| /linux/drivers/gpu/drm/amd/display/dc/inc/ |
| H A D | core_types.h | 92 int pipe_cnt,
187 int pipe_cnt);
213 unsigned int pipe_cnt,
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| /linux/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | display_mode_lib.h | 106 int pipe_cnt);
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/ |
| H A D | dml2_utils.h | 122 …xt, struct resource_context *out_new_hw_state, struct dml2_context *in_ctx, unsigned int pipe_cnt);
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| /linux/drivers/usb/host/ |
| H A D | r8a66597.h | 79 unsigned char pipe_cnt[R8A66597_MAX_NUM_PIPE]; member
120 unsigned char pipe_cnt[R8A66597_MAX_NUM_PIPE]; member
|