Searched refs:lo_hi_readq (Results 1 – 16 of 16) sorted by relevance
8 static inline __u64 lo_hi_readq(const volatile void __iomem *addr) in lo_hi_readq() function43 #define readq lo_hi_readq
181 info->eccerrlog[0] = lo_hi_readq(window + X38_C0ECCERRLOG); in x38_get_and_clear_error_info()183 info->eccerrlog[1] = lo_hi_readq(window + X38_C1ECCERRLOG); in x38_get_and_clear_error_info()194 info->eccerrlog[0] = lo_hi_readq(window + X38_C0ECCERRLOG); in x38_get_and_clear_error_info()197 lo_hi_readq(window + X38_C1ECCERRLOG); in x38_get_and_clear_error_info()
293 info->eccerrlog[0] = lo_hi_readq(priv->c0errlog); in ie31200_get_and_clear_error_info()295 info->eccerrlog[1] = lo_hi_readq(priv->c1errlog); in ie31200_get_and_clear_error_info()310 info->eccerrlog[0] = lo_hi_readq(priv->c0errlog); in ie31200_get_and_clear_error_info()312 info->eccerrlog[1] = lo_hi_readq(priv->c1errlog); in ie31200_get_and_clear_error_info()323 info->eccerrlog[0] = lo_hi_readq(priv->c0errlog); in ie31200_get_and_clear_error_info()326 lo_hi_readq(priv->c1errlog); in ie31200_get_and_clear_error_info()
139 return lo_hi_readq(gwdt->control_base + SBSA_GWDT_WOR); in sbsa_gwdt_reg_read()213 timeleft += lo_hi_readq(gwdt->control_base + SBSA_GWDT_WCV) - in sbsa_gwdt_get_timeleft()
22 return lo_hi_readq(priv->io_base + addr); in hbg_reg_read64()
79 return lo_hi_readq(tcu->base + EP93XX_TIMER4_VALUE_LOW) & GENMASK_ULL(39, 0); in ep93xx_clocksource_read()
68 value = lo_hi_readq(hw->mmio + reg); in aq_hw_read_reg64()
169 return lo_hi_readq(idma64c->regs + offset); in idma64c_readq()
189 val = lo_hi_readq(priv->regs + LDMA_ORDER_ERG) & ~LDMA_CONFIG_MASK; in ls2x_dma_write_cmd()
68 return lo_hi_readq(addr + offset) & GENMASK_ULL(63, 3); in get_base()
586 reg_value = lo_hi_readq(chip->apb_regs + DMAC_APB_HW_HS_SEL_0); in dw_axi_dma_set_hw_channel()1121 llp = lo_hi_readq(chan->chan_regs + CH_LLP); in axi_chan_block_xfer_complete()
1492 return lo_hi_readq(regs); in cdnsp_read_64()
1760 return lo_hi_readq(regs); in xhci_read_64()
3186 dev->ctrl.cap = lo_hi_readq(dev->bar + NVME_REG_CAP); in nvme_pci_enable()3476 *val = lo_hi_readq(to_nvme_dev(ctrl)->bar + off); in nvme_pci_reg_read64()
217 hi_lo_readq(), lo_hi_readq(), hi_lo_readq_relaxed(), lo_hi_readq_relaxed(),
1510 base_info = lo_hi_readq(&mrioc->sysif_regs->ioc_information); in mpi3mr_bring_ioc_ready()