| /linux/drivers/gpu/drm/amd/pm/inc/ |
| H A D | amdgpu_dpm.h | 301 struct amdgpu_device *adev;
390 int amdgpu_dpm_read_sensor(struct amdgpu_device *adev, enum amd_pp_sensors sensor,
393 int amdgpu_dpm_get_apu_thermal_limit(struct amdgpu_device *adev, uint32_t *limit);
394 int amdgpu_dpm_set_apu_thermal_limit(struct amdgpu_device *adev, uint32_t limit);
396 int amdgpu_dpm_set_powergating_by_smu(struct amdgpu_device *adev,
399 extern int amdgpu_dpm_get_sclk(struct amdgpu_device *adev, bool low);
401 extern int amdgpu_dpm_get_mclk(struct amdgpu_device *adev, bool low);
403 int amdgpu_dpm_set_xgmi_pstate(struct amdgpu_device *adev,
406 int amdgpu_dpm_switch_power_profile(struct amdgpu_device *adev,
409 int amdgpu_dpm_pause_power_profile(struct amdgpu_device *adev,
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_nbio.h | 52 void (*handle_ras_controller_intr_no_bifring)(struct amdgpu_device *adev);
53 void (*handle_ras_err_event_athub_intr_no_bifring)(struct amdgpu_device *adev);
54 int (*init_ras_controller_interrupt)(struct amdgpu_device *adev);
55 int (*init_ras_err_event_athub_interrupt)(struct amdgpu_device *adev);
60 u32 (*get_hdp_flush_req_offset)(struct amdgpu_device *adev);
61 u32 (*get_hdp_flush_done_offset)(struct amdgpu_device *adev);
62 u32 (*get_pcie_index_offset)(struct amdgpu_device *adev);
63 u32 (*get_pcie_data_offset)(struct amdgpu_device *adev);
64 u32 (*get_pcie_index_hi_offset)(struct amdgpu_device *adev);
65 u32 (*get_pcie_port_index_offset)(struct amdgpu_device *adev);
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| H A D | amdgpu_ras.h | 466 typedef int (*pasid_notify)(struct amdgpu_device *adev,
512 int (*get_ras_table_version)(struct amdgpu_device *adev,
514 int (*get_badpage_count)(struct amdgpu_device *adev, uint32_t *count, uint32_t timeout);
515 int (*get_badpage_mca_addr)(struct amdgpu_device *adev, uint16_t index, uint64_t *mca_addr);
516 int (*set_timestamp)(struct amdgpu_device *adev, uint64_t timestamp);
517 int (*get_timestamp)(struct amdgpu_device *adev,
519 int (*get_badpage_ipid)(struct amdgpu_device *adev, uint16_t index, uint64_t *ipid);
520 int (*erase_ras_table)(struct amdgpu_device *adev, uint32_t *result);
529 void (*ras_smu_feature_flags)(struct amdgpu_device *adev, uint64_t *flags);
553 struct amdgpu_device *adev;
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| H A D | amdgpu.h | 123 struct amdgpu_device *adev;
323 struct amdgpu_device;
365 bool amdgpu_get_bios(struct amdgpu_device *adev);
366 bool amdgpu_read_bios(struct amdgpu_device *adev);
367 bool amdgpu_soc15_read_bios_from_rom(struct amdgpu_device *adev,
369 void amdgpu_bios_release(struct amdgpu_device *adev);
426 struct amdgpu_device *adev;
525 int amdgpu_device_wb_get(struct amdgpu_device *adev, u32 *wb);
526 void amdgpu_device_wb_free(struct amdgpu_device *adev, u32 wb);
531 int amdgpu_benchmark(struct amdgpu_device *adev, int test_number);
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| H A D | amdgpu_atombios.h | 133 amdgpu_atombios_lookup_gpio(struct amdgpu_device *adev,
136 struct amdgpu_i2c_bus_rec amdgpu_atombios_lookup_i2c_gpio(struct amdgpu_device *adev,
138 void amdgpu_atombios_i2c_init(struct amdgpu_device *adev);
139 void amdgpu_atombios_oem_i2c_init(struct amdgpu_device *adev, u8 i2c_id);
141 bool amdgpu_atombios_has_dce_engine_info(struct amdgpu_device *adev);
143 bool amdgpu_atombios_get_connector_info_from_object_table(struct amdgpu_device *adev);
145 int amdgpu_atombios_get_clock_info(struct amdgpu_device *adev);
147 int amdgpu_atombios_get_gfx_info(struct amdgpu_device *adev);
149 int amdgpu_atombios_get_vram_width(struct amdgpu_device *adev);
151 bool amdgpu_atombios_get_asic_ss_info(struct amdgpu_device *adev,
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| H A D | amdgpu_gmc.h | 111 void (*print_l2_protection_fault_status)(struct amdgpu_device *adev,
151 void (*flush_gpu_tlb)(struct amdgpu_device *adev, uint32_t vmid,
154 void (*flush_gpu_tlb_pasid)(struct amdgpu_device *adev, uint16_t pasid,
164 void (*set_prt)(struct amdgpu_device *adev, bool enable);
166 void (*get_vm_pde)(struct amdgpu_device *adev, int level,
169 void (*get_vm_pte)(struct amdgpu_device *adev,
175 void (*override_vm_pte_flags)(struct amdgpu_device *dev,
179 unsigned int (*get_vbios_fb_size)(struct amdgpu_device *adev);
181 unsigned int (*get_dcc_alignment)(struct amdgpu_device *adev);
184 struct amdgpu_device *adev);
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| H A D | amdgpu_amdkfd_gfx_v9.h | 23 void kgd_gfx_v9_program_sh_mem_settings(struct amdgpu_device *adev, uint32_t vmid,
27 int kgd_gfx_v9_set_pasid_vmid_mapping(struct amdgpu_device *adev, u32 pasid,
29 int kgd_gfx_v9_init_interrupts(struct amdgpu_device *adev, uint32_t pipe_id,
31 int kgd_gfx_v9_hqd_load(struct amdgpu_device *adev, void *mqd, uint32_t pipe_id,
35 int kgd_gfx_v9_hiq_mqd_load(struct amdgpu_device *adev, void *mqd,
38 int kgd_gfx_v9_hqd_dump(struct amdgpu_device *adev,
41 bool kgd_gfx_v9_hqd_is_occupied(struct amdgpu_device *adev,
44 int kgd_gfx_v9_hqd_destroy(struct amdgpu_device *adev, void *mqd,
48 int kgd_gfx_v9_wave_control_execute(struct amdgpu_device *adev,
51 bool kgd_gfx_v9_get_atc_vmid_pasid_mapping_info(struct amdgpu_device *adev,
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| H A D | amdgpu_xgmi.h | 36 struct amdgpu_device *hi_req_gpu;
98 struct amdgpu_hive_info *amdgpu_get_xgmi_hive(struct amdgpu_device *adev);
100 int amdgpu_xgmi_update_topology(struct amdgpu_hive_info *hive, struct amdgpu_device *adev);
101 int amdgpu_xgmi_add_device(struct amdgpu_device *adev);
102 int amdgpu_xgmi_remove_device(struct amdgpu_device *adev);
103 int amdgpu_xgmi_set_pstate(struct amdgpu_device *adev, int pstate);
104 int amdgpu_xgmi_get_hops_count(struct amdgpu_device *adev, struct amdgpu_device *peer_adev);
105 int amdgpu_xgmi_get_bandwidth(struct amdgpu_device *adev, struct amdgpu_device *peer_adev,
108 bool amdgpu_xgmi_get_is_sharing_enabled(struct amdgpu_device *adev,
109 struct amdgpu_device *peer_adev);
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| H A D | amdgpu_umc.h | 93 typedef int (*umc_func)(struct amdgpu_device *adev, uint32_t node_inst,
98 void (*err_cnt_init)(struct amdgpu_device *adev);
99 bool (*query_ras_poison_mode)(struct amdgpu_device *adev);
100 void (*ecc_info_query_ras_error_count)(struct amdgpu_device *adev,
102 void (*ecc_info_query_ras_error_address)(struct amdgpu_device *adev,
104 bool (*check_ecc_err_status)(struct amdgpu_device *adev,
106 int (*update_ecc_status)(struct amdgpu_device *adev,
108 int (*convert_ras_err_addr)(struct amdgpu_device *adev,
113 uint32_t (*get_die_id_from_pa)(struct amdgpu_device *adev,
115 void (*get_retire_flip_bits)(struct amdgpu_device *adev);
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| H A D | amdgpu_df.h | 34 void (*sw_init)(struct amdgpu_device *adev);
35 void (*sw_fini)(struct amdgpu_device *adev);
36 void (*hw_init)(struct amdgpu_device *adev);
37 void (*enable_broadcast_mode)(struct amdgpu_device *adev,
39 u32 (*get_fb_channel_number)(struct amdgpu_device *adev);
40 u32 (*get_hbm_channel_number)(struct amdgpu_device *adev);
41 void (*update_medium_grain_clock_gating)(struct amdgpu_device *adev,
43 void (*get_clockgating_state)(struct amdgpu_device *adev,
45 void (*enable_ecc_force_par_wr_rmw)(struct amdgpu_device *adev,
47 int (*pmc_start)(struct amdgpu_device *adev, uint64_t config,
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| H A D | amdgpu_gfxhub.h | 27 u64 (*get_fb_location)(struct amdgpu_device *adev);
28 u64 (*get_mc_fb_offset)(struct amdgpu_device *adev);
29 void (*setup_vm_pt_regs)(struct amdgpu_device *adev, uint32_t vmid,
31 int (*gart_enable)(struct amdgpu_device *adev);
33 void (*gart_disable)(struct amdgpu_device *adev);
34 void (*set_fault_enable_default)(struct amdgpu_device *adev, bool value);
35 void (*init)(struct amdgpu_device *adev);
36 int (*get_xgmi_info)(struct amdgpu_device *adev);
37 void (*utcl2_harvest)(struct amdgpu_device *adev);
38 void (*mode2_save_regs)(struct amdgpu_device *adev);
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| H A D | mxgpu_ai.c | 37 static void xgpu_ai_mailbox_send_ack(struct amdgpu_device *adev) in xgpu_ai_mailbox_send_ack()
42 static void xgpu_ai_mailbox_set_valid(struct amdgpu_device *adev, bool val) in xgpu_ai_mailbox_set_valid()
56 static enum idh_event xgpu_ai_mailbox_peek_msg(struct amdgpu_device *adev) in xgpu_ai_mailbox_peek_msg()
63 static int xgpu_ai_mailbox_rcv_msg(struct amdgpu_device *adev, in xgpu_ai_mailbox_rcv_msg()
78 static uint8_t xgpu_ai_peek_ack(struct amdgpu_device *adev) { in xgpu_ai_peek_ack()
82 static int xgpu_ai_poll_ack(struct amdgpu_device *adev) in xgpu_ai_poll_ack()
101 static int xgpu_ai_poll_msg(struct amdgpu_device *adev, enum idh_event event) in xgpu_ai_poll_msg()
119 static void xgpu_ai_mailbox_trans_msg (struct amdgpu_device *adev, in xgpu_ai_mailbox_trans_msg()
163 static int xgpu_ai_send_access_requests(struct amdgpu_device *adev, in xgpu_ai_send_access_requests()
195 static int xgpu_ai_request_reset(struct amdgpu_device *adev) in xgpu_ai_request_reset()
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| H A D | amdgpu_gart.h | 32 struct amdgpu_device;
54 int amdgpu_gart_table_ram_alloc(struct amdgpu_device *adev);
55 void amdgpu_gart_table_ram_free(struct amdgpu_device *adev);
56 int amdgpu_gart_table_vram_alloc(struct amdgpu_device *adev);
57 void amdgpu_gart_table_vram_free(struct amdgpu_device *adev);
58 int amdgpu_gart_init(struct amdgpu_device *adev);
59 void amdgpu_gart_dummy_page_fini(struct amdgpu_device *adev);
60 void amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset,
62 void amdgpu_gart_map(struct amdgpu_device *adev, uint64_t offset,
65 void amdgpu_gart_map_gfx9_mqd(struct amdgpu_device *adev, uint64_t offset,
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| H A D | amdgpu_mca.h | 131 int (*mca_set_debug_mode)(struct amdgpu_device *adev, bool enable);
132 …int (*mca_parse_mca_error_count)(struct amdgpu_device *adev, enum amdgpu_ras_block blk, enum amdgp…
134 int (*mca_get_valid_mca_count)(struct amdgpu_device *adev, enum amdgpu_mca_error_type type,
136 int (*mca_get_mca_entry)(struct amdgpu_device *adev, enum amdgpu_mca_error_type type,
140 void amdgpu_mca_query_correctable_error_count(struct amdgpu_device *adev,
144 void amdgpu_mca_query_uncorrectable_error_count(struct amdgpu_device *adev,
148 void amdgpu_mca_reset_error_count(struct amdgpu_device *adev,
151 void amdgpu_mca_query_ras_error_count(struct amdgpu_device *adev,
154 int amdgpu_mca_mp0_ras_sw_init(struct amdgpu_device *adev);
155 int amdgpu_mca_mp1_ras_sw_init(struct amdgpu_device *adev);
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| H A D | amdgpu_mmhub.h | 52 u64 (*get_fb_location)(struct amdgpu_device *adev);
53 u64 (*get_mc_fb_offset)(struct amdgpu_device *adev);
54 void (*init)(struct amdgpu_device *adev);
55 int (*gart_enable)(struct amdgpu_device *adev);
56 void (*set_fault_enable_default)(struct amdgpu_device *adev,
58 void (*gart_disable)(struct amdgpu_device *adev);
59 int (*set_clockgating)(struct amdgpu_device *adev,
61 void (*get_clockgating)(struct amdgpu_device *adev, u64 *flags);
62 void (*setup_vm_pt_regs)(struct amdgpu_device *adev, uint32_t vmid,
64 void (*update_power_gating)(struct amdgpu_device *adev,
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| H A D | amdgpu_amdkfd_gfx_v10.h | 23 uint32_t kgd_gfx_v10_enable_debug_trap(struct amdgpu_device *adev,
26 uint32_t kgd_gfx_v10_disable_debug_trap(struct amdgpu_device *adev,
29 int kgd_gfx_v10_validate_trap_override_request(struct amdgpu_device *adev,
32 uint32_t kgd_gfx_v10_set_wave_launch_trap_override(struct amdgpu_device *adev,
39 uint32_t kgd_gfx_v10_set_wave_launch_mode(struct amdgpu_device *adev,
42 uint32_t kgd_gfx_v10_set_address_watch(struct amdgpu_device *adev,
49 uint32_t kgd_gfx_v10_clear_address_watch(struct amdgpu_device *adev,
51 void kgd_gfx_v10_get_iq_wait_times(struct amdgpu_device *adev,
54 void kgd_gfx_v10_build_dequeue_wait_counts_packet_info(struct amdgpu_device *adev,
60 uint64_t kgd_gfx_v10_hqd_get_pq_addr(struct amdgpu_device *adev,
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| H A D | amdgpu_amdkfd.c | 70 void amdgpu_amdkfd_device_probe(struct amdgpu_device *adev) in amdgpu_amdkfd_device_probe()
93 static void amdgpu_doorbell_get_kfd_info(struct amdgpu_device *adev, in amdgpu_doorbell_get_kfd_info()
127 struct amdgpu_device *adev = container_of(work, struct amdgpu_device, in amdgpu_amdkfd_reset_work()
148 int amdgpu_amdkfd_drm_client_create(struct amdgpu_device *adev) in amdgpu_amdkfd_drm_client_create()
168 void amdgpu_amdkfd_device_init(struct amdgpu_device *adev) in amdgpu_amdkfd_device_init()
235 void amdgpu_amdkfd_device_fini_sw(struct amdgpu_device *adev) in amdgpu_amdkfd_device_fini_sw()
244 void amdgpu_amdkfd_interrupt(struct amdgpu_device *adev, in amdgpu_amdkfd_interrupt()
251 void amdgpu_amdkfd_teardown_processes(struct amdgpu_device *adev) in amdgpu_amdkfd_teardown_processes()
256 void amdgpu_amdkfd_suspend(struct amdgpu_device *adev, bool suspend_proc) in amdgpu_amdkfd_suspend()
266 int amdgpu_amdkfd_resume(struct amdgpu_device *adev, bool resume_proc) in amdgpu_amdkfd_resume()
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| H A D | nbio_v7_0.c | 35 static void nbio_v7_0_remap_hdp_registers(struct amdgpu_device *adev) in nbio_v7_0_remap_hdp_registers()
43 static u32 nbio_v7_0_get_rev_id(struct amdgpu_device *adev) in nbio_v7_0_get_rev_id()
53 static void nbio_v7_0_mc_access_enable(struct amdgpu_device *adev, bool enable) in nbio_v7_0_mc_access_enable()
62 static u32 nbio_v7_0_get_memsize(struct amdgpu_device *adev) in nbio_v7_0_get_memsize()
67 static void nbio_v7_0_sdma_doorbell_range(struct amdgpu_device *adev, int instance, in nbio_v7_0_sdma_doorbell_range()
84 static void nbio_v7_0_vcn_doorbell_range(struct amdgpu_device *adev, bool use_doorbell, in nbio_v7_0_vcn_doorbell_range()
104 static void nbio_v7_0_enable_doorbell_aperture(struct amdgpu_device *adev, in nbio_v7_0_enable_doorbell_aperture()
110 static void nbio_v7_0_enable_doorbell_selfring_aperture(struct amdgpu_device *adev, in nbio_v7_0_enable_doorbell_selfring_aperture()
116 static void nbio_v7_0_ih_doorbell_range(struct amdgpu_device *adev, in nbio_v7_0_ih_doorbell_range()
130 static uint32_t nbio_7_0_read_syshub_ind_mmr(struct amdgpu_device *adev, uint32_t offset) in nbio_7_0_read_syshub_ind_mmr()
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| H A D | nbio_v7_9.c | 34 static void nbio_v7_9_remap_hdp_registers(struct amdgpu_device *adev) in nbio_v7_9_remap_hdp_registers()
42 static u32 nbio_v7_9_get_rev_id(struct amdgpu_device *adev) in nbio_v7_9_get_rev_id()
61 static void nbio_v7_9_mc_access_enable(struct amdgpu_device *adev, bool enable) in nbio_v7_9_mc_access_enable()
70 static u32 nbio_v7_9_get_memsize(struct amdgpu_device *adev) in nbio_v7_9_get_memsize()
75 static void nbio_v7_9_sdma_doorbell_range(struct amdgpu_device *adev, int instance, in nbio_v7_9_sdma_doorbell_range()
174 static void nbio_v7_9_vcn_doorbell_range(struct amdgpu_device *adev, bool use_doorbell, in nbio_v7_9_vcn_doorbell_range()
234 static void nbio_v7_9_enable_doorbell_aperture(struct amdgpu_device *adev, in nbio_v7_9_enable_doorbell_aperture()
243 static void nbio_v7_9_enable_doorbell_selfring_aperture(struct amdgpu_device *adev, in nbio_v7_9_enable_doorbell_selfring_aperture()
265 static void nbio_v7_9_ih_doorbell_range(struct amdgpu_device *adev, in nbio_v7_9_ih_doorbell_range()
309 static void nbio_v7_9_update_medium_grain_clock_gating(struct amdgpu_device *adev, in nbio_v7_9_update_medium_grain_clock_gating()
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| H A D | amdgpu_vm.h | 259 struct amdgpu_device *adev;
501 void amdgpu_vm_manager_init(struct amdgpu_device *adev);
502 void amdgpu_vm_manager_fini(struct amdgpu_device *adev);
505 int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm, int32_t xcp_id, uint32_t pasid…
506 int amdgpu_vm_make_compute(struct amdgpu_device *adev, struct amdgpu_vm *vm);
507 void amdgpu_vm_fini(struct amdgpu_device *adev, struct amdgpu_vm *vm);
513 uint64_t amdgpu_vm_generation(struct amdgpu_device *adev, struct amdgpu_vm *vm);
514 int amdgpu_vm_validate(struct amdgpu_device *adev, struct amdgpu_vm *vm,
519 int amdgpu_vm_update_pdes(struct amdgpu_device *adev,
521 int amdgpu_vm_clear_freed(struct amdgpu_device *adev,
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| /linux/drivers/gpu/drm/amd/include/ |
| H A D | kgd_kfd_interface.h | 38 struct amdgpu_device;
222 void (*program_sh_mem_settings)(struct amdgpu_device *adev, uint32_t vmid,
227 int (*set_pasid_vmid_mapping)(struct amdgpu_device *adev, u32 pasid,
230 int (*init_interrupts)(struct amdgpu_device *adev, uint32_t pipe_id,
233 int (*hqd_load)(struct amdgpu_device *adev, void *mqd, uint32_t pipe_id,
238 int (*hiq_mqd_load)(struct amdgpu_device *adev, void *mqd,
242 int (*hqd_sdma_load)(struct amdgpu_device *adev, void *mqd,
245 int (*hqd_dump)(struct amdgpu_device *adev,
249 int (*hqd_sdma_dump)(struct amdgpu_device *adev,
253 bool (*hqd_is_occupied)(struct amdgpu_device *adev,
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| /linux/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| H A D | amdgpu_dm_irq.h | 43 int amdgpu_dm_irq_init(struct amdgpu_device *adev);
51 void amdgpu_dm_irq_fini(struct amdgpu_device *adev);
67 void *amdgpu_dm_irq_register_interrupt(struct amdgpu_device *adev,
80 void amdgpu_dm_irq_unregister_interrupt(struct amdgpu_device *adev,
84 void amdgpu_dm_set_irq_funcs(struct amdgpu_device *adev);
86 void amdgpu_dm_outbox_init(struct amdgpu_device *adev);
87 void amdgpu_dm_hpd_init(struct amdgpu_device *adev);
88 void amdgpu_dm_hpd_fini(struct amdgpu_device *adev);
94 void amdgpu_dm_irq_suspend(struct amdgpu_device *adev);
101 void amdgpu_dm_irq_resume_early(struct amdgpu_device *adev);
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| /linux/drivers/gpu/drm/amd/pm/ |
| H A D | amdgpu_dpm.c | 41 int amdgpu_dpm_get_sclk(struct amdgpu_device *adev, bool low) in amdgpu_dpm_get_sclk()
57 int amdgpu_dpm_get_mclk(struct amdgpu_device *adev, bool low) in amdgpu_dpm_get_mclk()
73 int amdgpu_dpm_set_powergating_by_smu(struct amdgpu_device *adev, in amdgpu_dpm_set_powergating_by_smu()
124 int amdgpu_dpm_set_gfx_power_up_by_imu(struct amdgpu_device *adev) in amdgpu_dpm_set_gfx_power_up_by_imu()
138 int amdgpu_dpm_baco_enter(struct amdgpu_device *adev) in amdgpu_dpm_baco_enter()
157 int amdgpu_dpm_baco_exit(struct amdgpu_device *adev) in amdgpu_dpm_baco_exit()
176 int amdgpu_dpm_set_mp1_state(struct amdgpu_device *adev, in amdgpu_dpm_set_mp1_state()
199 int amdgpu_dpm_is_baco_supported(struct amdgpu_device *adev) in amdgpu_dpm_is_baco_supported()
228 int amdgpu_dpm_mode2_reset(struct amdgpu_device *adev) in amdgpu_dpm_mode2_reset()
246 int amdgpu_dpm_enable_gfx_features(struct amdgpu_device *adev) in amdgpu_dpm_enable_gfx_features()
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| /linux/drivers/gpu/drm/amd/ras/ras_mgr/ |
| H A D | amdgpu_ras_mgr.c | 68 struct amdgpu_device *adev = (struct amdgpu_device *)ras_core->dev; in amdgpu_ras_mgr_init_event_mgr()
86 static int amdgpu_ras_mgr_init_aca_config(struct amdgpu_device *adev, in amdgpu_ras_mgr_init_aca_config()
98 static int amdgpu_ras_mgr_init_eeprom_config(struct amdgpu_device *adev, in amdgpu_ras_mgr_init_eeprom_config()
145 static int amdgpu_ras_mgr_init_mp1_config(struct amdgpu_device *adev, in amdgpu_ras_mgr_init_mp1_config()
168 static int amdgpu_ras_mgr_init_nbio_config(struct amdgpu_device *adev, in amdgpu_ras_mgr_init_nbio_config()
193 struct amdgpu_device *adev = (struct amdgpu_device *)ras_core->dev; in amdgpu_ras_mgr_get_ras_psp_system_status()
206 struct amdgpu_device *adev = (struct amdgpu_device *)ras_core->dev; in amdgpu_ras_mgr_get_ras_ta_init_param()
232 static int amdgpu_ras_mgr_init_psp_config(struct amdgpu_device *adev, in amdgpu_ras_mgr_init_psp_config()
242 static int amdgpu_ras_mgr_init_umc_config(struct amdgpu_device *adev, in amdgpu_ras_mgr_init_umc_config()
252 static struct ras_core_context *amdgpu_ras_mgr_create_ras_core(struct amdgpu_device *adev) in amdgpu_ras_mgr_create_ras_core()
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| H A D | amdgpu_ras_process.h | 29 int amdgpu_ras_process_init(struct amdgpu_device *adev);
30 int amdgpu_ras_process_fini(struct amdgpu_device *adev);
31 int amdgpu_ras_process_handle_umc_interrupt(struct amdgpu_device *adev,
33 int amdgpu_ras_process_handle_unexpected_interrupt(struct amdgpu_device *adev,
35 int amdgpu_ras_process_handle_consumption_interrupt(struct amdgpu_device *adev,
37 int amdgpu_ras_process_begin(struct amdgpu_device *adev);
38 int amdgpu_ras_process_end(struct amdgpu_device *adev);
39 int amdgpu_ras_process_pre_reset(struct amdgpu_device *adev);
40 int amdgpu_ras_process_post_reset(struct amdgpu_device *adev);
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