Lines Matching refs:amdgpu_device

35 static void nbio_v7_0_remap_hdp_registers(struct amdgpu_device *adev)
43 static u32 nbio_v7_0_get_rev_id(struct amdgpu_device *adev)
53 static void nbio_v7_0_mc_access_enable(struct amdgpu_device *adev, bool enable)
62 static u32 nbio_v7_0_get_memsize(struct amdgpu_device *adev)
67 static void nbio_v7_0_sdma_doorbell_range(struct amdgpu_device *adev, int instance,
84 static void nbio_v7_0_vcn_doorbell_range(struct amdgpu_device *adev, bool use_doorbell,
104 static void nbio_v7_0_enable_doorbell_aperture(struct amdgpu_device *adev,
110 static void nbio_v7_0_enable_doorbell_selfring_aperture(struct amdgpu_device *adev,
116 static void nbio_v7_0_ih_doorbell_range(struct amdgpu_device *adev,
130 static uint32_t nbio_7_0_read_syshub_ind_mmr(struct amdgpu_device *adev, uint32_t offset)
140 static void nbio_7_0_write_syshub_ind_mmr(struct amdgpu_device *adev, uint32_t offset,
147 static void nbio_v7_0_update_medium_grain_clock_gating(struct amdgpu_device *adev,
186 static void nbio_v7_0_update_medium_grain_light_sleep(struct amdgpu_device *adev,
206 static void nbio_v7_0_get_clockgating_state(struct amdgpu_device *adev,
222 static void nbio_v7_0_ih_control(struct amdgpu_device *adev)
238 static u32 nbio_v7_0_get_hdp_flush_req_offset(struct amdgpu_device *adev)
243 static u32 nbio_v7_0_get_hdp_flush_done_offset(struct amdgpu_device *adev)
248 static u32 nbio_v7_0_get_pcie_index_offset(struct amdgpu_device *adev)
253 static u32 nbio_v7_0_get_pcie_data_offset(struct amdgpu_device *adev)
276 static void nbio_v7_0_init_registers(struct amdgpu_device *adev)
290 static void nbio_v7_0_set_reg_remap(struct amdgpu_device *adev)