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Searched refs:reg_idx (Results 1 – 25 of 92) sorted by relevance

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/linux/drivers/net/ethernet/wangxun/libwx/
H A Dwx_vf_lib.c62 wx_set_ivar_vf(wx, 0, ring->reg_idx, v_idx); in wx_configure_msix_vf()
65 wx_set_ivar_vf(wx, 1, ring->reg_idx, v_idx); in wx_configure_msix_vf()
109 u8 reg_idx = ring->reg_idx; in wx_configure_tx_ring_vf() local
115 wr32(wx, WX_VXTXDCTL(reg_idx), WX_VXTXDCTL_FLUSH); in wx_configure_tx_ring_vf()
116 wr32(wx, WX_VXTDBAL(reg_idx), tdba & DMA_BIT_MASK(32)); in wx_configure_tx_ring_vf()
117 wr32(wx, WX_VXTDBAH(reg_idx), tdba >> 32); in wx_configure_tx_ring_vf()
124 wr32(wx, WX_VXTDH(reg_idx), 0); in wx_configure_tx_ring_vf()
125 wr32(wx, WX_VXTDT(reg_idx), 0); in wx_configure_tx_ring_vf()
126 ring->tail = wx->hw_addr + WX_VXTDT(reg_idx); in wx_configure_tx_ring_vf()
229 u8 reg_idx = ring->reg_idx; wx_configure_rx_ring_vf() local
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H A Dwx_hw.c1604 j = ring->reg_idx; in wx_vlan_strip_control()
1612 u32 vlnctrl, i, vind, bits, reg_idx; in wx_vlan_promisc_enable() local
1633 reg_idx = WX_VF_REG_OFFSET(VMDQ_P(0)); in wx_vlan_promisc_enable()
1634 bits = rd32(wx, WX_PSR_VLAN_SWC_VM(reg_idx)); in wx_vlan_promisc_enable()
1636 wr32(wx, WX_PSR_VLAN_SWC_VM(reg_idx), bits); in wx_vlan_promisc_enable()
1645 u32 i, vid, bits, vfta, vind, vlvf, reg_idx; in wx_scrub_vfta() local
1659 reg_idx = WX_VF_REG_OFFSET(VMDQ_P(0)); in wx_scrub_vfta()
1660 bits = rd32(wx, WX_PSR_VLAN_SWC_VM(reg_idx)); in wx_scrub_vfta()
1662 wr32(wx, WX_PSR_VLAN_SWC_VM(reg_idx), bits); in wx_scrub_vfta()
1815 u8 reg_idx in wx_disable_rx_queue() local
1838 u8 reg_idx = ring->reg_idx; wx_enable_rx_queue() local
1857 u16 reg_idx = rx_ring->reg_idx; wx_configure_srrctl() local
1877 u8 reg_idx = ring->reg_idx; wx_configure_tx_ring() local
1921 u16 reg_idx = ring->reg_idx; wx_configure_rx_ring() local
2630 u16 reg_idx = ring->reg_idx; wx_enable_rx_drop() local
2641 u16 reg_idx = ring->reg_idx; wx_disable_rx_drop() local
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/linux/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_lib.c24 u16 reg_idx, pool; in ixgbe_cache_ring_dcb_sriov() local
36 reg_idx = vmdq->offset * __ALIGN_MASK(1, ~vmdq->mask); in ixgbe_cache_ring_dcb_sriov()
37 for (i = 0, pool = 0; i < adapter->num_rx_queues; i++, reg_idx++) { in ixgbe_cache_ring_dcb_sriov()
39 if ((reg_idx & ~vmdq->mask) >= tcs) { in ixgbe_cache_ring_dcb_sriov()
41 reg_idx = __ALIGN_MASK(reg_idx, ~vmdq->mask); in ixgbe_cache_ring_dcb_sriov()
43 adapter->rx_ring[i]->reg_idx = reg_idx; in ixgbe_cache_ring_dcb_sriov()
47 reg_idx = vmdq->offset * __ALIGN_MASK(1, ~vmdq->mask); in ixgbe_cache_ring_dcb_sriov()
48 for (i = 0; i < adapter->num_tx_queues; i++, reg_idx in ixgbe_cache_ring_dcb_sriov()
191 u16 reg_idx, pool; ixgbe_cache_ring_sriov() local
256 int i, reg_idx; ixgbe_cache_ring_rss() local
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/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_interrupts.c249 int reg_idx; in dpu_core_irq() local
260 for (reg_idx = 0; reg_idx < MDP_INTR_MAX; reg_idx++) { in dpu_core_irq()
261 if (!test_bit(reg_idx, &intr->irq_mask)) in dpu_core_irq()
265 irq_status = DPU_REG_READ(&intr->hw, intr->intr_set[reg_idx].status_off); in dpu_core_irq()
268 enable_mask = DPU_REG_READ(&intr->hw, intr->intr_set[reg_idx].en_off); in dpu_core_irq()
272 DPU_REG_WRITE(&intr->hw, intr->intr_set[reg_idx].clr_off, in dpu_core_irq()
285 irq_idx = DPU_IRQ_IDX(reg_idx, bit - 1); in dpu_core_irq()
309 int reg_idx; in dpu_hw_intr_enable_irq_locked() local
365 int reg_idx; dpu_hw_intr_disable_irq_locked() local
460 int reg_idx; dpu_core_irq_read() local
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H A Ddpu_hw_interrupts.h39 #define DPU_IRQ_IDX(reg_idx, offset) (1 + reg_idx * 32 + offset) argument
/linux/drivers/staging/media/atomisp/pci/css_2401_system/host/
H A Disys_irq_private.h60 const unsigned int reg_idx, in isys_irqc_reg_store() argument
66 assert(reg_idx <= ISYS_IRQ_LEVEL_NO_REG_IDX); in isys_irqc_reg_store()
68 reg_addr = ISYS_IRQ_BASE[isys_irqc_id] + (reg_idx * sizeof(hrt_data)); in isys_irqc_reg_store()
77 const unsigned int reg_idx) in isys_irqc_reg_load() argument
83 assert(reg_idx <= ISYS_IRQ_LEVEL_NO_REG_IDX); in isys_irqc_reg_load()
85 reg_addr = ISYS_IRQ_BASE[isys_irqc_id] + (reg_idx * sizeof(hrt_data)); in isys_irqc_reg_load()
H A Disys_stream2mmio_private.h130 const uint32_t reg_idx) in stream2mmio_reg_load() argument
138 (reg_bank_offset + reg_idx) * sizeof(hrt_data)); in stream2mmio_reg_load()
/linux/drivers/pmdomain/renesas/
H A Drcar-gen4-sysc.c91 static int clear_irq_flags(unsigned int reg_idx, unsigned int isr_mask) in clear_irq_flags() argument
96 iowrite32(isr_mask, rcar_gen4_sysc_base + SYSCISCR(reg_idx)); in clear_irq_flags()
98 ret = readl_poll_timeout_atomic(rcar_gen4_sysc_base + SYSCISCR(reg_idx), in clear_irq_flags()
112 unsigned int reg_idx, bit_idx; in rcar_gen4_sysc_power() local
121 reg_idx = pdr / NUM_DOMAINS_EACH_REG; in rcar_gen4_sysc_power()
130 iowrite32(ioread32(rcar_gen4_sysc_base + SYSCIER(reg_idx)) | isr_mask, in rcar_gen4_sysc_power()
131 rcar_gen4_sysc_base + SYSCIER(reg_idx)); in rcar_gen4_sysc_power()
132 iowrite32(ioread32(rcar_gen4_sysc_base + SYSCIMR(reg_idx)) | isr_mask, in rcar_gen4_sysc_power()
133 rcar_gen4_sysc_base + SYSCIMR(reg_idx)); in rcar_gen4_sysc_power()
135 ret = clear_irq_flags(reg_idx, isr_mas in rcar_gen4_sysc_power()
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/linux/drivers/i2c/
H A Di2c-slave-testunit.c47 u8 reg_idx; member
86 bool is_proc_call = tu->reg_idx == 3 && tu->regs[TU_REG_DATAL] == 1 && in i2c_slave_testunit_slave_cb()
88 bool is_get_version = tu->reg_idx == 3 && in i2c_slave_testunit_slave_cb()
100 tu->reg_idx = 0; in i2c_slave_testunit_slave_cb()
110 if (tu->reg_idx < TU_NUM_REGS) in i2c_slave_testunit_slave_cb()
111 tu->regs[tu->reg_idx] = *val; in i2c_slave_testunit_slave_cb()
115 if (tu->reg_idx <= TU_NUM_REGS) in i2c_slave_testunit_slave_cb()
116 tu->reg_idx++; in i2c_slave_testunit_slave_cb()
125 if (tu->reg_idx == TU_NUM_REGS) { in i2c_slave_testunit_slave_cb()
132 * Reset reg_idx t in i2c_slave_testunit_slave_cb()
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/linux/drivers/clocksource/
H A Dtimer-mediatek-cpux.c37 static u32 mtk_cpux_readl(u32 reg_idx, struct timer_of *to) in mtk_cpux_readl() argument
39 writel(reg_idx, timer_of_base(to) + CPUX_IDX_REG); in mtk_cpux_readl()
43 static void mtk_cpux_writel(u32 val, u32 reg_idx, struct timer_of *to) in mtk_cpux_writel() argument
45 writel(reg_idx, timer_of_base(to) + CPUX_IDX_REG); in mtk_cpux_writel()
/linux/drivers/accel/habanalabs/goya/
H A Dgoya_coresight.c236 if (params->reg_idx >= ARRAY_SIZE(debug_stm_regs)) { in goya_config_stm()
241 base_reg = debug_stm_regs[params->reg_idx] - CFG_BASE; in goya_config_stm()
309 if (params->reg_idx >= ARRAY_SIZE(debug_etf_regs)) { in goya_config_etf()
314 base_reg = debug_etf_regs[params->reg_idx] - CFG_BASE; in goya_config_etf()
489 if (params->reg_idx >= ARRAY_SIZE(debug_funnel_regs)) { in goya_config_funnel()
494 base_reg = debug_funnel_regs[params->reg_idx] - CFG_BASE; in goya_config_funnel()
510 if (params->reg_idx >= ARRAY_SIZE(debug_bmon_regs)) { in goya_config_bmon()
515 base_reg = debug_bmon_regs[params->reg_idx] - CFG_BASE; in goya_config_bmon()
539 if (params->reg_idx != GOYA_BMON_PCIE_MSTR_RD && in goya_config_bmon()
540 params->reg_idx ! in goya_config_bmon()
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/linux/drivers/sh/intc/
H A Dhandle.c41 unsigned int *reg_idx, in _intc_mask_data() argument
48 while (mr && enum_id && *reg_idx < desc->hw.nr_mask_regs) { in _intc_mask_data()
49 mr = desc->hw.mask_regs + *reg_idx; in _intc_mask_data()
82 (*reg_idx)++; in _intc_mask_data()
109 unsigned int *reg_idx, in _intc_prio_data() argument
116 while (pr && enum_id && *reg_idx < desc->hw.nr_prio_regs) { in _intc_prio_data()
117 pr = desc->hw.prio_regs + *reg_idx; in _intc_prio_data()
151 (*reg_idx)++; in _intc_prio_data()
/linux/drivers/net/ethernet/intel/fm10k/
H A Dfm10k_pci.c875 u8 reg_idx = ring->reg_idx; in fm10k_configure_tx_ring() local
878 fm10k_write_reg(hw, FM10K_TXDCTL(reg_idx), 0); in fm10k_configure_tx_ring()
884 fm10k_write_reg(hw, FM10K_TDBAL(reg_idx), tdba & DMA_BIT_MASK(32)); in fm10k_configure_tx_ring()
885 fm10k_write_reg(hw, FM10K_TDBAH(reg_idx), tdba >> 32); in fm10k_configure_tx_ring()
886 fm10k_write_reg(hw, FM10K_TDLEN(reg_idx), size); in fm10k_configure_tx_ring()
889 fm10k_write_reg(hw, FM10K_TDH(reg_idx), 0); in fm10k_configure_tx_ring()
890 fm10k_write_reg(hw, FM10K_TDT(reg_idx), 0); in fm10k_configure_tx_ring()
893 ring->tail = &interface->uc_addr[FM10K_TDT(reg_idx)]; in fm10k_configure_tx_ring()
905 fm10k_write_reg(hw, FM10K_TXINT(reg_idx), txin in fm10k_configure_tx_ring()
935 u8 reg_idx = ring->reg_idx; fm10k_enable_tx_ring() local
987 u8 reg_idx = ring->reg_idx; fm10k_configure_rx_ring() local
1075 u8 reg_idx = ring->reg_idx; fm10k_update_rx_drop_en() local
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/linux/drivers/net/ethernet/intel/ixgbevf/
H A Dixgbevf_main.c204 u32 head = IXGBE_READ_REG(hw, IXGBE_VFTDH(ring->reg_idx)); in ixgbevf_get_tx_pending()
205 u32 tail = IXGBE_READ_REG(hw, IXGBE_VFTDT(ring->reg_idx)); in ixgbevf_get_tx_pending()
389 IXGBE_READ_REG(hw, IXGBE_VFTDH(tx_ring->reg_idx)), in ixgbevf_clean_tx_irq()
390 IXGBE_READ_REG(hw, IXGBE_VFTDT(tx_ring->reg_idx)), in ixgbevf_clean_tx_irq()
1366 ixgbevf_set_ivar(adapter, 0, ring->reg_idx, v_idx); in ixgbevf_configure_msix()
1369 ixgbevf_set_ivar(adapter, 1, ring->reg_idx, v_idx); in ixgbevf_configure_msix()
1692 u8 reg_idx = ring->reg_idx; in ixgbevf_configure_tx_ring() local
1695 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH); in ixgbevf_configure_tx_ring()
1698 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(reg_idx), tdb in ixgbevf_configure_tx_ring()
1808 u8 reg_idx = ring->reg_idx; ixgbevf_disable_rx_queue() local
1835 u8 reg_idx = ring->reg_idx; ixgbevf_rx_desc_queue_enable() local
1913 u8 reg_idx = ring->reg_idx; ixgbevf_configure_rx_ring() local
2521 u8 reg_idx = adapter->tx_ring[i]->reg_idx; ixgbevf_down() local
2528 u8 reg_idx = adapter->xdp_ring[i]->reg_idx; ixgbevf_down() local
2731 int reg_idx = txr_idx + xdp_idx; ixgbevf_alloc_q_vector() local
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/linux/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/
H A Disys_irq_public.h21 const unsigned int reg_idx,
25 const unsigned int reg_idx);
/linux/drivers/media/platform/mediatek/vcodec/common/
H A Dmtk_vcodec_util.c24 void __iomem *mtk_vcodec_get_reg_addr(void __iomem **reg_base, unsigned int reg_idx) in mtk_vcodec_get_reg_addr() argument
26 if (reg_idx >= NUM_MAX_VCODEC_REG_BASE) { in mtk_vcodec_get_reg_addr()
27 pr_err(MTK_DBG_V4L2_STR "Invalid arguments, reg_idx=%d", reg_idx); in mtk_vcodec_get_reg_addr()
30 return reg_base[reg_idx]; in mtk_vcodec_get_reg_addr()
/linux/drivers/irqchip/
H A Dirq-pruss-intc.c181 u8 ch, host, reg_idx; in pruss_intc_map() local
193 reg_idx = hwirq / 32; in pruss_intc_map()
197 pruss_intc_write_reg(intc, PRU_INTC_ESR(reg_idx), val); in pruss_intc_map()
198 pruss_intc_write_reg(intc, PRU_INTC_SECR(reg_idx), val); in pruss_intc_map()
224 u8 ch, host, reg_idx; in pruss_intc_unmap() local
241 reg_idx = hwirq / 32; in pruss_intc_unmap()
245 pruss_intc_write_reg(intc, PRU_INTC_ECR(reg_idx), val); in pruss_intc_unmap()
247 pruss_intc_write_reg(intc, PRU_INTC_SECR(reg_idx), val); in pruss_intc_unmap()
/linux/drivers/accel/habanalabs/gaudi/
H A Dgaudi_coresight.c398 if (params->reg_idx >= ARRAY_SIZE(debug_stm_regs)) { in gaudi_config_stm()
403 base_reg = debug_stm_regs[params->reg_idx] - CFG_BASE; in gaudi_config_stm()
476 if (params->reg_idx >= ARRAY_SIZE(debug_etf_regs)) { in gaudi_config_etf()
481 base_reg = debug_etf_regs[params->reg_idx] - CFG_BASE; in gaudi_config_etf()
703 if (params->reg_idx >= ARRAY_SIZE(debug_funnel_regs)) { in gaudi_config_funnel()
708 base_reg = debug_funnel_regs[params->reg_idx] - CFG_BASE; in gaudi_config_funnel()
723 if (params->reg_idx >= ARRAY_SIZE(debug_bmon_regs)) { in gaudi_config_bmon()
728 base_reg = debug_bmon_regs[params->reg_idx] - CFG_BASE; in gaudi_config_bmon()
791 if (params->reg_idx >= ARRAY_SIZE(debug_spmu_regs)) { in gaudi_config_spmu()
796 base_reg = debug_spmu_regs[params->reg_idx] in gaudi_config_spmu()
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/linux/drivers/bus/
H A Dimx-weim.c145 int reg_idx, num_regs; in weim_timing_setup() local
174 for (reg_idx = 0; reg_idx < num_regs; reg_idx++) { in weim_timing_setup()
177 reg_idx * OF_REG_SIZE, &cs_idx); in weim_timing_setup()
/linux/sound/soc/codecs/
H A Dmt6351.c325 int idx, old_idx, offset, reg_idx; in hp_gain_ramp_set() local
342 reg_idx = old_idx; in hp_gain_ramp_set()
345 reg_idx = idx > old_idx ? reg_idx + 1 : reg_idx - 1; in hp_gain_ramp_set()
348 if ((reg_idx >= 0 && reg_idx <= 0x12) || reg_idx == 0x1f) { in hp_gain_ramp_set()
352 (reg_idx << 7) | reg_idx); in hp_gain_ramp_set()
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/linux/include/linux/soc/mediatek/
H A Dmtk-cmdq.h142 * @reg_idx: the CMDQ internal register ID to cache read data
147 u16 reg_idx);
323 * @reg_idx: the CMDQ internal register ID
328 int cmdq_pkt_assign(struct cmdq_pkt *pkt, u16 reg_idx, u32 value);
428 u16 addr_low, u16 reg_idx) in cmdq_pkt_read_s() argument
484 static inline int cmdq_pkt_assign(struct cmdq_pkt *pkt, u16 reg_idx, u32 value) in cmdq_pkt_assign() argument
/linux/drivers/perf/hisilicon/
H A Dhisi_uncore_l3c_pmu.c109 u32 reg, reg_idx, shift, val; in hisi_l3c_pmu_write_ds() local
120 reg_idx = idx % 4; in hisi_l3c_pmu_write_ds()
121 shift = 8 * reg_idx; in hisi_l3c_pmu_write_ds()
248 u32 reg, reg_idx, shift, val; in hisi_l3c_pmu_write_evtype() local
258 reg_idx = idx % 4; in hisi_l3c_pmu_write_evtype()
259 shift = 8 * reg_idx; in hisi_l3c_pmu_write_evtype()
/linux/drivers/hwtracing/coresight/
H A Dcoresight-cti-sysfs.c798 int used = 0, reg_idx; in chan_xtrigs_in_show() local
802 for (reg_idx = 0; reg_idx < nr_trig_max; reg_idx++) { in chan_xtrigs_in_show()
803 if (chan_mask & cfg->ctiinen[reg_idx]) in chan_xtrigs_in_show()
804 used += sprintf(buf + used, "%d ", reg_idx); in chan_xtrigs_in_show()
818 int used = 0, reg_idx; in chan_xtrigs_out_show() local
822 for (reg_idx = 0; reg_idx < nr_trig_max; reg_idx in chan_xtrigs_out_show()
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/linux/drivers/net/ethernet/intel/igc/
H A Digc_tsn.c380 int reg_idx = adapter->tx_ring[i]->reg_idx; in igc_tsn_disable_offload() local
387 txdctl = rd32(IGC_TXDCTL(reg_idx)); in igc_tsn_disable_offload()
389 wr32(IGC_TXDCTL(reg_idx), txdctl); in igc_tsn_disable_offload()
470 u32 txdctl = rd32(IGC_TXDCTL(ring->reg_idx)); in igc_tsn_enable_offload()
518 wr32(IGC_TXDCTL(ring->reg_idx), txdctl); in igc_tsn_enable_offload()
/linux/drivers/regulator/
H A Dda9121-regulator.c641 int reg_idx = item->reg_index; in da9121_status_poll_on() local
644 bool persisting = (chip->persistent[reg_idx] & item->event_bit); in da9121_status_poll_on()
645 bool now_cleared = !(status[reg_idx] & item->status_bit); in da9121_status_poll_on()
648 clear[reg_idx] |= item->mask_bit; in da9121_status_poll_on()
649 chip->persistent[reg_idx] &= ~item->event_bit; in da9121_status_poll_on()
712 int reg_idx = item->reg_index; in da9121_irq_handler() local
714 bool enabled = !(mask[reg_idx] & item->mask_bit); in da9121_irq_handler()
715 bool active = (event[reg_idx] & item->event_bit); in da9121_irq_handler()
720 chip->persistent[reg_idx] |= item->event_bit; in da9121_irq_handler()
724 handled[reg_idx] | in da9121_irq_handler()
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