Lines Matching refs:reg_idx
62 wx_set_ivar_vf(wx, 0, ring->reg_idx, v_idx);
65 wx_set_ivar_vf(wx, 1, ring->reg_idx, v_idx);
109 u8 reg_idx = ring->reg_idx;
115 wr32(wx, WX_VXTXDCTL(reg_idx), WX_VXTXDCTL_FLUSH);
116 wr32(wx, WX_VXTDBAL(reg_idx), tdba & DMA_BIT_MASK(32));
117 wr32(wx, WX_VXTDBAH(reg_idx), tdba >> 32);
124 wr32(wx, WX_VXTDH(reg_idx), 0);
125 wr32(wx, WX_VXTDT(reg_idx), 0);
126 ring->tail = wx->hw_addr + WX_VXTDT(reg_idx);
139 wr32(wx, WX_VXTXDCTL(reg_idx), txdctl);
142 1000, 10000, true, wx, WX_VXTXDCTL(reg_idx));
144 wx_err(wx, "Could not enable Tx Queue %d\n", reg_idx);
229 u8 reg_idx = ring->reg_idx;
235 rxdctl = rd32(wx, WX_VXRXDCTL(reg_idx));
238 wr32(wx, WX_VXRDBAL(reg_idx), rdba & DMA_BIT_MASK(32));
239 wr32(wx, WX_VXRDBAH(reg_idx), rdba >> 32);
246 wr32(wx, WX_VXRDH(reg_idx), 0);
247 wr32(wx, WX_VXRDT(reg_idx), 0);
248 ring->tail = wx->hw_addr + WX_VXRDT(reg_idx);
263 wx_configure_srrctl_vf(wx, ring, reg_idx);
275 wr32(wx, WX_VXRXDCTL(reg_idx), rxdctl);