Searched refs:ctrl_cpu_rev (Results 1 – 3 of 3) sorted by relevance
927 ctrl_cpu = ctrl_cpu_rev[0].set | CPU_SECONDARY; in insn_intercept_init()928 ctrl_cpu &= ctrl_cpu_rev[0].clr; in insn_intercept_init()930 vmcs_write(CPU_EXEC_CTRL1, ctrl_cpu_rev[1].set); in insn_intercept_init()946 !(ctrl_cpu_rev[0].clr & insn_table[cur_insn].flag)) || in insn_intercept_main()948 !(ctrl_cpu_rev[1].clr & insn_table[cur_insn].flag))) { in insn_intercept_main()962 !(ctrl_cpu_rev[0].set & insn_table[cur_insn].flag)) || in insn_intercept_main()964 !(ctrl_cpu_rev[1].set & insn_table[cur_insn].flag))) { in insn_intercept_main()1015 vmcs_write(CPU_EXEC_CTRL0, val | ctrl_cpu_rev[0].set); in insn_intercept_exit_handler()1017 vmcs_write(CPU_EXEC_CTRL1, val | ctrl_cpu_rev[1].set); in insn_intercept_exit_handler()1047 if (!(ctrl_cpu_rev[0].clr & CPU_SECONDARY) || in __setup_ept()[all …]
71 union vmx_ctrl_msr ctrl_cpu_rev[2]; variable1104 if (ctrl_cpu_rev[0].set & CPU_SECONDARY) { in init_vmcs_ctrl()1105 ctrl_cpu[1] = (ctrl_cpu[1] | ctrl_cpu_rev[1].set) & in init_vmcs_ctrl()1106 ctrl_cpu_rev[1].clr; in init_vmcs_ctrl()1261 ctrl_cpu[0] = (ctrl_cpu[0] | ctrl_cpu_rev[0].set) & ctrl_cpu_rev[0].clr; in init_vmcs()1291 ctrl_cpu_rev[0].val = rdmsr(basic_msr.ctrl ? MSR_IA32_VMX_TRUE_PROC in init_vmx_caps()1293 if ((ctrl_cpu_rev[0].clr & CPU_SECONDARY) != 0) in init_vmx_caps()1294 ctrl_cpu_rev[1].val = rdmsr(MSR_IA32_VMX_PROCBASED_CTLS2); in init_vmx_caps()1296 ctrl_cpu_rev[1].val = 0; in init_vmx_caps()1297 if ((ctrl_cpu_rev[1].clr & (CPU_EPT | CPU_VPID)) != 0) in init_vmx_caps()[all …]
758 extern union vmx_ctrl_msr ctrl_cpu_rev[2];824 return (ctrl_cpu_rev[0].clr & CPU_SECONDARY) && in is_vpid_supported()825 (ctrl_cpu_rev[1].clr & CPU_VPID); in is_vpid_supported()