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| /qemu/rust/hw/char/pl011/src/ |
| H A D | lib.rs | f65314bdd0c287097f7dd4b002c67ceee9729039 Wed Dec 04 15:44:42 UTC 2024 Paolo Bonzini <pbonzini@redhat.com> rust: pl011: always use reset() method on registers
For CR, the ugly-ish "0.into()" idiom is already hidden within the
reset method. Do not repeat it.
For FR, standardize on reset() being equivalent to "*self = Self::default()"
and let reset_fifo toggle only the bits that are related to FIFOs. This
commit also reproduces C commit 02b1f7f6192 ("hw/char/pl011: Split RX/TX
path of pl011_reset_fifo()", 2024-09-13).
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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| H A D | device.rs | f65314bdd0c287097f7dd4b002c67ceee9729039 Wed Dec 04 15:44:42 UTC 2024 Paolo Bonzini <pbonzini@redhat.com> rust: pl011: always use reset() method on registers
For CR, the ugly-ish "0.into()" idiom is already hidden within the
reset method. Do not repeat it.
For FR, standardize on reset() being equivalent to "*self = Self::default()"
and let reset_fifo toggle only the bits that are related to FIFOs. This
commit also reproduces C commit 02b1f7f6192 ("hw/char/pl011: Split RX/TX
path of pl011_reset_fifo()", 2024-09-13).
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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