Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* rust: use native Meson support for clippy and rustdoc
* rust: add "bits", a custom bitflags implementation
* target/i386: R

Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* rust: use native Meson support for clippy and rustdoc
* rust: add "bits", a custom bitflags implementation
* target/i386: Remove FRED dependency on WRMSRNS
* target/i386: Add the immediate form MSR access instruction support
* TDX fixes

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# gpg: Signature made Tue 03 Jun 2025 16:44:43 EDT
# gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg: issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83

* tag 'for-upstream' of https://gitlab.com/bonzini/qemu:
rust: qemu-api-macros: add from_bits and into_bits to #[derive(TryInto)]
rust: pl011: use the bits macro
rust: add "bits", a custom bitflags implementation
i386/tdvf: Fix build on 32-bit host
i386/tdx: Fix build on 32-bit host
meson: use config_base_arch for target libraries
target/i386: Add the immediate form MSR access instruction support
target/i386: Add a new CPU feature word for CPUID.7.1.ECX
target/i386: Remove FRED dependency on WRMSRNS
rust: use native Meson support for clippy and rustdoc
rust: cell: remove support for running doctests with "cargo test --doc"
rust: add qemu-api doctests to "meson test"
build, dockerfiles: add support for detecting rustdoc
rust: use "objects" for Rust executables as well
meson: update to version 1.8.1
rust: bindings: allow ptr_offset_with_cast

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

show more ...

rust: pl011: use the bits macro

This avoids the repeated ".0" when using the Interrupt struct.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* target/i386/kvm: Intel TDX support
* target/i386/emulate: more lflags cleanups
* meson: remove need for explicit listing of

Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* target/i386/kvm: Intel TDX support
* target/i386/emulate: more lflags cleanups
* meson: remove need for explicit listing of dependencies in hw_common_arch and
target_common_arch
* rust: small fixes
* hpet: Reorganize register decoding to be more similar to Rust code
* target/i386: fixes for AMD models
* target/i386: new EPYC-Turin CPU model

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# gpg: Signature made Thu 29 May 2025 03:05:00 EDT
# gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg: issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83

* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (77 commits)
target/i386/tcg/helper-tcg: fix file references in comments
target/i386: Add support for EPYC-Turin model
target/i386: Update EPYC-Genoa for Cache property, perfmon-v2, RAS and SVM feature bits
target/i386: Add couple of feature bits in CPUID_Fn80000021_EAX
target/i386: Update EPYC-Milan CPU model for Cache property, RAS, SVM feature bits
target/i386: Update EPYC-Rome CPU model for Cache property, RAS, SVM feature bits
target/i386: Update EPYC CPU model for Cache property, RAS, SVM feature bits
rust: make declaration of dependent crates more consistent
docs: Add TDX documentation
i386/tdx: Validate phys_bits against host value
i386/tdx: Make invtsc default on
i386/tdx: Don't treat SYSCALL as unavailable
i386/tdx: Fetch and validate CPUID of TD guest
target/i386: Print CPUID subleaf info for unsupported feature
i386: Remove unused parameter "uint32_t bit" in feature_word_description()
i386/cgs: Introduce x86_confidential_guest_check_features()
i386/tdx: Define supported KVM features for TDX
i386/tdx: Add XFD to supported bit of TDX
i386/tdx: Add supported CPUID bits relates to XFAM
i386/tdx: Add supported CPUID bits related to TD Attributes
...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

show more ...

rust: Fix the typos in doc

These typos are found by "cargo spellcheck". Though it outputs a lot of
noise and false positives, there still are some real typos.

Signed-off-by: Zhao Liu <zhao1.liu@int

rust: Fix the typos in doc

These typos are found by "cargo spellcheck". Though it outputs a lot of
noise and false positives, there still are some real typos.

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Link: https://lore.kernel.org/r/20250520152750.2542612-6-zhao1.liu@intel.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

show more ...

Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* meson: small old patches (one from 2022)
* rust: pl011: forward port some changes from C version
* target/i386: small impro

Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* meson: small old patches (one from 2022)
* rust: pl011: forward port some changes from C version
* target/i386: small improvements to TCG emulation
* target/i386: HVF emulation cleanups
* target/i386: add its_no feature
* cs4231a: fix assertion failure
* update Linux headers

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# gpg: Signature made Mon 12 May 2025 15:03:57 EDT
# gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg: issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83

* tag 'for-upstream' of https://gitlab.com/bonzini/qemu:
target/i386: Make ITS_NO available to guests
hw/audio/cs4231a: fix assertion error in isa_bus_get_irq
linux-headers: update from 6.15 + kvm/next
target/i386: remove lflags
target/i386/emulate: mostly rewrite flags handling
target/i386/emulate: stop overloading decode->op[N].ptr
target/i386: implement TSS trap bit
target/i386: move push of error code to switch_tss_ra
target/i386: list TCG-supported features for CPUID[80000021h].EAX
target/i386: ignore misplaced REX prefixes
rust: pl011: Really use RX FIFO depth
rust: pl011: Rename RX FIFO methods
modinfo: lookup compile_commands.json by object
meson: remove unnecessary dependencies from specific_ss
meson: do not check supported TCG architecture if no emulators built
meson: drop --enable-avx* options

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

show more ...

rust: pl011: Really use RX FIFO depth

While we model a 16-elements RX FIFO since the PL011 model was
introduced in commit cdbdb648b7c ("ARM Versatile Platform Baseboard
emulation"), we only read 1 c

rust: pl011: Really use RX FIFO depth

While we model a 16-elements RX FIFO since the PL011 model was
introduced in commit cdbdb648b7c ("ARM Versatile Platform Baseboard
emulation"), we only read 1 char at a time!

Have can_receive() return how many elements are available, and use that
in receive().

This is the Rust version of commit 3e0f118f825 ("hw/char/pl011: Really
use RX FIFO depth"); but it also adds back a comment that is present
in commit f576e0733cc ("hw/char/pl011: Add support for loopback") and
absent in the Rust code.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

show more ...

rust: pl011: Rename RX FIFO methods

In preparation of having a TX FIFO, rename the RX FIFO methods.
This is the Rust version of commit 40871ca758cf ("hw/char/pl011:
Rename RX FIFO methods").

Review

rust: pl011: Rename RX FIFO methods

In preparation of having a TX FIFO, rename the RX FIFO methods.
This is the Rust version of commit 40871ca758cf ("hw/char/pl011:
Rename RX FIFO methods").

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

show more ...

Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* ci: enable RISC-V cross jobs
* rust: bump minimum supported version to 1.77
* rust: enable uninlined_format_args lint
* ini

Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* ci: enable RISC-V cross jobs
* rust: bump minimum supported version to 1.77
* rust: enable uninlined_format_args lint
* initial Emscripten support
* small fixes

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# gpg: Signature made Tue 06 May 2025 10:03:27 EDT
# gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg: issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83

* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (30 commits)
gitlab: Enable CI for wasm build
tests: Add Dockerfile containing dependencies for Emscripten build
meson: Add wasm build in build scripts
util: Add coroutine backend for emscripten
util: exclude mmap-alloc.c from compilation target on Emscripten
Disable options unsupported on Emscripten
include/qemu/osdep.h: Add Emscripten-specific OS dependencies
block: Fix type conflict of the copy_file_range stub
block: Add including of ioctl header for Emscripten build
util/cacheflush.c: Update cache flushing mechanism for Emscripten
include/glib-compat.h: Poison g_list_sort and g_slist_sort
target/s390x: Fix type conflict of GLib function pointers
target/ppc: Fix type conflict of GLib function pointers
target/i386/cpu.c: Fix type conflict of GLib function pointers
target/arm/helper.c: Fix type conflict of GLib function pointers
docs: build-system: fix typo
ci: run RISC-V cross jobs by default
rust: clippy: enable uninlined_format_args lint
target/i386/emulate: fix target_ulong format strings
docs: rust: update for newer minimum supported version
...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

show more ...

rust: remove offset_of replacement

Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* target/i386: Fix model number of Zhaoxin YongFeng vCPU template
* target/i386: Reset parked vCPUs together with the online

Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* target/i386: Fix model number of Zhaoxin YongFeng vCPU template
* target/i386: Reset parked vCPUs together with the online ones
* scsi: add conversion from ENODEV to sense
* target/i386: tweaks to flag handling
* target/i386: tweaks to SHLD/SHRD code generation
* target/i386: remove some global temporaries from TCG
* target/i386: pull emulator outside target/i386/hvf
* host/i386: consolidate getting host CPU vendor
* rust/hpet: preparation for migration support
* rust/pl011: bring over more commits from C version

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# gpg: Signature made Wed 23 Apr 2025 05:40:00 EDT
# gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg: issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83

* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (34 commits)
rust/hw/char/pl011: Extract DR write logic into separate function
rust/hw/char/pl011: Extract extract DR read logic into separate function
rust/vmstate_test: Fix typo in test_vmstate_macro_array_of_pointer_wrapped()
rust/hpet: Fix a clippy error
rust/hpet: convert HPETTimer index to u8 type
rust/hpet: convert num_timers to u8 type
i386/cpu: Consolidate the helper to get Host's vendor
target/i386/emulate: remove flags_mask
MAINTAINERS: add an entry for the x86 instruction emulator
target/i386: move x86 instruction emulator out of hvf
target/i386/emulate: add a panic.h
target/i386: add a directory for x86 instruction emulator
target/i386/hvf: rename some include guards
target/i386/hvf: drop unused headers
target/i386: rename lazy flags field and its type
target/i386/hvf: provide and use simulate_{wrmsr, rdmsr} in emul_ops
target/i386/hvf: provide and use write_mem in emul_ops
target/i386/hvf: use emul_ops->read_mem in x86_emu.c
target/i386: rename hvf_mmio_buf to emu_mmio_buf
target/i386/hvf: provide and use handle_io in emul_ops
...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

show more ...

rust/hw/char/pl011: Extract DR write logic into separate function

- Split `write()` DR case into `write_data_register()`

Signed-off-by: Rakesh Jeyasingh <rakeshjb010@gmail.com>
Link: https://lore.k

rust/hw/char/pl011: Extract DR write logic into separate function

- Split `write()` DR case into `write_data_register()`

Signed-off-by: Rakesh Jeyasingh <rakeshjb010@gmail.com>
Link: https://lore.kernel.org/r/20250407181327.171563-3-rakeshjb010@gmail.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

show more ...

rust/hw/char/pl011: Extract extract DR read logic into separate function

- Split `read()` DR case into `read_data_register()`

Signed-off-by: Rakesh Jeyasingh <rakeshjb010@gmail.com>
Link: https://l

rust/hw/char/pl011: Extract extract DR read logic into separate function

- Split `read()` DR case into `read_data_register()`

Signed-off-by: Rakesh Jeyasingh <rakeshjb010@gmail.com>
Link: https://lore.kernel.org/r/20250407181327.171563-2-rakeshjb010@gmail.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

show more ...

Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* exec/cpu-all: remove BSWAP_NEEDED
* pl011: pad C PL011State struct to same size as Rust struct
* rust: hpet: fix type of "t

Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* exec/cpu-all: remove BSWAP_NEEDED
* pl011: pad C PL011State struct to same size as Rust struct
* rust: hpet: fix type of "timers" property
* rust: hpet: fix functional tests (and really everything that uses it)
* rust: Kconfig: Factor out whether devices are Rust or C
* rust: vmstate: Fixes and tests

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# gpg: Signature made Fri 21 Mar 2025 14:34:51 EDT
# gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg: issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83

* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (24 commits)
rust: hpet: fix decoding of timer registers
rust/vmstate: Include complete crate path of VMStateFlags in vmstate_clock
rust/vmstate: Add unit test for vmstate_validate
rust/vmstate: Add unit test for pointer case
rust/vmstate: Add unit test for vmstate_{of|struct} macro
rust/vmstate: Add unit test for vmstate_of macro
rust/vmstate: Support vmstate_validate
rust/vmstate: Re-implement VMState trait for timer binding
rust/vmstate: Relax array check when build varray in vmstate_struct
rust/vmstate: Fix unnecessary VMState bound of with_varray_flag()
rust/vmstate: Fix "cannot infer type" error in vmstate_struct
rust/vmstate: Fix type check for varray in vmstate_struct
rust/vmstate: Fix size field of VMStateField with VMS_ARRAY_OF_POINTER flag
rust/vmstate: Fix num field when varray flags are set
rust/vmstate: Fix num_offset in vmstate macros
rust/vmstate: Remove unnecessary unsafe
exec/cpu-all: remove BSWAP_NEEDED
load_aout: replace bswap_needed with big_endian
rust: pl011: Check size of state struct at compile time
hw/char/pl011: Pad PL011State struct to same size as Rust impl
...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

show more ...

rust: pl011: Check size of state struct at compile time

The PL011 device's C implementation exposes its PL011State struct to
users of the device, and one common usage pattern is to embed that
struct

rust: pl011: Check size of state struct at compile time

The PL011 device's C implementation exposes its PL011State struct to
users of the device, and one common usage pattern is to embed that
struct into the user's own state struct. (The internals of the
struct are technically visible to the C user of the device, but in
practice are treated as implementation details.)

This means that the Rust version of the state struct must not be
larger than the C version's struct; otherwise it will trip a runtime
assertion in object_initialize_type() when the C user attempts to
in-place initialize the type.

Add a compile-time assertion on the Rust side, so that if we
accidentally make the Rust device state larger we know immediately
that we need to expand the padding in the C version of the struct.

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Link: https://lore.kernel.org/r/20250321112523.1774131-4-peter.maydell@linaro.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

show more ...

Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* scripts: dump stdin on meson-buildoptions error
* rust: introduce qemu_api::cell::Opaque<>
* rust: express pinning requirem

Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* scripts: dump stdin on meson-buildoptions error
* rust: introduce qemu_api::cell::Opaque<>
* rust: express pinning requirements for timers
* rust: hpet: decode HPET registers into enums
* rust: cell: add full example of declaring a SysBusDevice
* rust: qom: remove operations on &mut

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# gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg: issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
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# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
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* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (25 commits)
rust: pl011: Allow NULL chardev argument to pl011_create()
meson.build: default to -gsplit-dwarf for debug info
rust: qom: remove operations on &mut
rust: cell: add full example of declaring a SysBusDevice
rust: hpet: decode HPET registers into enums
rust: pl011: pass around registers::Data
rust: pl011: switch to safe chardev operation
rust: pl011: clean up visibilities of callbacks
rust: pl011: move register definitions out of lib.rs
rust: chardev: provide basic bindings to character devices
rust: bindings: remove more unnecessary Send/Sync impls
rust: chardev: wrap Chardev with Opaque<>
rust: memory: wrap MemoryRegion with Opaque<>
rust: sysbus: wrap SysBusDevice with Opaque<>
rust: hpet: do not access fields of SysBusDevice
rust: qdev: wrap Clock and DeviceState with Opaque<>
rust: qom: wrap Object with Opaque<>
rust: irq: wrap IRQState with Opaque<>
rust: timer: wrap QEMUTimer with Opaque<> and express pinning requirements
rust: hpet: embed Timer without the Option and Box indirection
...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

show more ...

rust: pl011: Allow NULL chardev argument to pl011_create()

It's valid for the caller to pass a NULL chardev to pl011_create();
this means "don't set the chardev property on the device", which
in tur

rust: pl011: Allow NULL chardev argument to pl011_create()

It's valid for the caller to pass a NULL chardev to pl011_create();
this means "don't set the chardev property on the device", which
in turn means "act like there's no chardev". All the chardev
frontend APIs (in C, at least) accept a NULL pointer to mean
"do nothing".

This fixes some failures in 'make check-functional' when Rust support
is enabled.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Link: https://lore.kernel.org/r/20250307190051.3274226-1-peter.maydell@linaro.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

show more ...

rust: pl011: pass around registers::Data

The values stored in the Fifo are instances of the bitfield-struct
registers::Data. Convert as soon as possible the value written
into DR, and always refer

rust: pl011: pass around registers::Data

The values stored in the Fifo are instances of the bitfield-struct
registers::Data. Convert as soon as possible the value written
into DR, and always refer to the bitfield struct; it's generally
cleaner other than PL011State::receive having to do a double
conversion u8=>u32=>registers::Data.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

show more ...

rust: pl011: switch to safe chardev operation

Switch bindings::CharBackend with chardev::CharBackend. This removes
occurrences of "unsafe" due to FFI and switches the wrappers for receive,
can_rece

rust: pl011: switch to safe chardev operation

Switch bindings::CharBackend with chardev::CharBackend. This removes
occurrences of "unsafe" due to FFI and switches the wrappers for receive,
can_receive and event callbacks to the common ones implemented by
chardev::CharBackend.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

show more ...

rust: pl011: clean up visibilities of callbacks

Do not make callbacks unnecessarily "pub", they are only used
through function pointers.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

rust: pl011: move register definitions out of lib.rs

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* qom: Use command line syntax for default values in help
* i386: support cache topology with machine's configuration
* rust:

Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* qom: Use command line syntax for default values in help
* i386: support cache topology with machine's configuration
* rust: fix duplicate symbols from monitor-fd.c
* rust: add module to convert between success/-errno and io::Result
* rust: move class_init implementation from trait to method
* pvg: configuration improvements
* kvm guestmemfd: replace assertion with error
* riscv: cleanups
* target/i386/hvf: cleanups to emulation
* target/i386: add Zhaoxin and Yongfeng CPU model

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# gpg: Signature made Wed 26 Feb 2025 16:56:43 HKT
# gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg: issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83

* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (34 commits)
target/i386: Mask CMPLegacy bit in CPUID[0x80000001].ECX for Zhaoxin CPUs
target/i386: Introduce Zhaoxin Yongfeng CPU model
target/i386: Add CPUID leaf 0xC000_0001 EDX definitions
target/i386: Add support for Zhaoxin CPU vendor identification
target/riscv: move 128-bit check to TCG realize
target/riscv: remove unused macro DEFINE_CPU
i386/cpu: add has_caches flag to check smp_cache configuration
i386/pc: Support cache topology in -machine for PC machine
i386/cpu: Update cache topology with machine's configuration
i386/cpu: Support module level cache topology
rust: qom: get rid of ClassInitImpl
rust: pl011, qemu_api tests: do not use ClassInitImpl
rust: qom: add ObjectImpl::CLASS_INIT
rust: add SysBusDeviceImpl
rust: add IsA bounds to QOM implementation traits
target/i386/hvf: drop some dead code
target/i386/hvf: move and rename simulate_{rdmsr, wrmsr}
target/i386/hvf: move and rename {load, store}_regs
target/i386/hvf: use x86_segment in x86_decode.c
target/i386/hvf: fix the declaration of hvf_handle_io
...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

show more ...

rust: qom: get rid of ClassInitImpl

Complete the conversion from the ClassInitImpl trait to class_init() methods.
This will provide more freedom to split the qemu_api crate in separate parts.

Revie

rust: qom: get rid of ClassInitImpl

Complete the conversion from the ClassInitImpl trait to class_init() methods.
This will provide more freedom to split the qemu_api crate in separate parts.

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

show more ...

rust: pl011, qemu_api tests: do not use ClassInitImpl

Outside the qemu_api crate, orphan rules make the usage of ClassInitImpl
unwieldy. Now that it is optional, do not use it.

For PL011Class, thi

rust: pl011, qemu_api tests: do not use ClassInitImpl

Outside the qemu_api crate, orphan rules make the usage of ClassInitImpl
unwieldy. Now that it is optional, do not use it.

For PL011Class, this makes it easier to provide a PL011Impl trait similar
to the ones in the qemu_api crate. The device id consts are moved there.

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

show more ...

rust: qom: add ObjectImpl::CLASS_INIT

As shown in the PL011 device, the orphan rules required a manual
implementation of ClassInitImpl for anything not in the qemu_api crate;
this gets in the way of

rust: qom: add ObjectImpl::CLASS_INIT

As shown in the PL011 device, the orphan rules required a manual
implementation of ClassInitImpl for anything not in the qemu_api crate;
this gets in the way of moving system emulation-specific code (including
DeviceClass, which as a blanket ClassInitImpl<DeviceClass> implementation)
into its own crate.

Make ClassInitImpl optional, at the cost of having to specify the CLASS_INIT
member by hand in every implementation of ObjectImpl. The next commits will
get rid of it, replacing all the "impl<T> ClassInitImpl<Class> for T" blocks
with a generic class_init<T> method on Class.

Right now the definition is always the same, but do not provide a default
as that will not be true once ClassInitImpl goes away.

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

show more ...

rust: add SysBusDeviceImpl

The only function, right now, is to ensure that anything with a
SysBusDeviceClass class is a SysBusDevice.

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paol

rust: add SysBusDeviceImpl

The only function, right now, is to ensure that anything with a
SysBusDeviceClass class is a SysBusDevice.

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

show more ...