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/linux-6.15/tools/perf/pmu-events/arch/s390/cf_z16/
Dextended.json3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …"PublicDescription": "A directory write to the Level-1 Data cache where the line was originally in…
10 "Unit": "CPU-M-CF",
14 …Translation Lookaside Buffer 2 (TLB2) and the request was made by the Level-1 Data cache. This is …
17 "Unit": "CPU-M-CF",
21 …ress for a request made by the Level-1 Data cache. Incremented by one for every TLB2 miss in progr…
24 "Unit": "CPU-M-CF",
28 … into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyte page…
31 "Unit": "CPU-M-CF",
[all …]
/linux-6.15/tools/testing/selftests/net/
Dproc_net_pktgen.c1 // SPDX-License-Identifier: GPL-2.0
31 static const char dev_cmd_min_pkt_size_3[] = "min_pkt_size 1";
39 static const char dev_cmd_imix_weights_0[] = "imix_weights 0,7 576,4 1500,1";
40 static const char dev_cmd_imix_weights_1[] = "imix_weights 101,1 102,2 103,3 104,4 105,5 106,6 107,…
41 static const char dev_cmd_imix_weights_2[] = "imix_weights 100,1 102,2 103,3 104,4 105,5 106,6 107,…
46 static const char dev_cmd_debug_0[] = "debug 1";
55 static const char dev_cmd_udp_src_min_0[] = "udp_src_min 1";
59 static const char dev_cmd_clone_skb_0[] = "clone_skb 1";
88 static const char dev_cmd_queue_map_min_0[] = "queue_map_min 1";
94 static const char dev_cmd_vlan_id_0[] = "vlan_id 1";
[all …]
/linux-6.15/drivers/gpu/drm/ci/xfails/
Dmsm-sm8350-hdk-skips.txt20 # DEBUG - Begin test msm/msm_mapping@ring
23 …u fault: ttbr0=00000001160d6000 iova=0001000000001000 dir=WRITE type=PERMISSION source=CP (0,0,0,1)
24 … gpu fault: ttbr0=00000001160d6000 iova=0001000000001000 dir=WRITE type=UNKNOWN source=CP (0,0,0,1)
25 … gpu fault: ttbr0=00000001160d6000 iova=0001000000001000 dir=WRITE type=UNKNOWN source=CP (0,0,0,1)
26 … gpu fault: ttbr0=00000001160d6000 iova=0001000000001000 dir=WRITE type=UNKNOWN source=CP (0,0,0,1)
27 … gpu fault: ttbr0=00000001160d6000 iova=0001000000001000 dir=WRITE type=UNKNOWN source=CP (0,0,0,1)
28 … gpu fault: ttbr0=00000001160d6000 iova=0001000000001000 dir=WRITE type=UNKNOWN source=CP (0,0,0,1)
30 … gpu fault: ttbr0=00000001160d6000 iova=0001000000001000 dir=WRITE type=UNKNOWN source=CP (0,0,0,1)
31 … gpu fault: ttbr0=00000001160d6000 iova=0001000000001000 dir=WRITE type=UNKNOWN source=CP (0,0,0,1)
32 … gpu fault: ttbr0=00000001160d6000 iova=0001000000001000 dir=WRITE type=UNKNOWN source=CP (0,0,0,1)
[all …]
/linux-6.15/tools/perf/pmu-events/arch/s390/cf_z13/
Dextended.json3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …"PublicDescription": "A directory write to the Level-1 Data cache where the line was originally in…
10 "Unit": "CPU-M-CF",
14 …"PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookasi…
17 "Unit": "CPU-M-CF",
21 …"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB…
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "DTLB1 One-Megabyte Page Writes",
28 …": "A translation entry has been written to the Level-1 Data Translation Lookaside Buffer for a on…
[all …]
/linux-6.15/tools/perf/pmu-events/arch/x86/snowridgex/
Duncore-memory.json4 "Counter": "0,1,2,3",
7 "PerPkg": "1",
8 …"PublicDescription": "Counts the total number of DRAM Read CAS commands, w/ and w/o auto-pre, issu…
14 "BriefDescription": "write requests to memory controller. Derived from unc_m_cas_count.wr",
15 "Counter": "0,1,2,3",
18 "PerPkg": "1",
19 …"PublicDescription": "Counts the total number of DRAM Write CAS commands issued, w/ and w/o auto-p…
26 "Counter": "0,1,2,3",
29 "PerPkg": "1",
36 "Counter": "0,1,2,3",
[all …]
/linux-6.15/kernel/
Dsysctl.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * Added hooks for /proc/sys/net (minor, minor patch), 96/4/1, Mike Shaver.
9 * Added kernel/java-{interpreter,appletviewer}, 96/5/10, Mike Shaver.
11 * Added kswapd-interval, ctrl-alt-del, printk stuff, 1/8/97, Chris Horn.
12 * Made sysctl support optional via CONFIG_SYSCTL, 1/10/97, Chris
75 const int sysctl_vals[] = { 0, 1, 2, 3, 4, 100, 200, 1000, 3000, INT_MAX, 65535, -1 };
78 const unsigned long sysctl_long_vals[] = { 0, 1, LONG_MAX };
90 * enum sysctl_writes_mode - supported sysctl write modes
92 * @SYSCTL_WRITES_LEGACY: each write syscall must fully contain the sysctl value
100 * sent to the write syscall. If dealing with strings respect the file
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/linux-6.15/tools/perf/pmu-events/arch/arm64/
Drecommended.json3 "PublicDescription": "Attributable Level 1 data cache access, read",
9 "PublicDescription": "Attributable Level 1 data cache access, write",
12 "BriefDescription": "L1D cache access, write"
15 "PublicDescription": "Attributable Level 1 data cache refill, read",
21 "PublicDescription": "Attributable Level 1 data cache refill, write",
24 "BriefDescription": "L1D cache refill, write"
27 "PublicDescription": "Attributable Level 1 data cache refill, inner",
33 "PublicDescription": "Attributable Level 1 data cache refill, outer",
39 "PublicDescription": "Attributable Level 1 data cache Write-Back, victim",
42 "BriefDescription": "L1D cache Write-Back, victim"
[all …]
/linux-6.15/drivers/gpu/drm/bridge/
Dtda998x_drv.c1 // SPDX-License-Identifier: GPL-2.0-only
15 #include <sound/hdmi-codec.h>
25 #include <media/cec-notifier.h>
27 #include <dt-bindings/display/tda998x.h>
101 * write a given register, we need to make sure CURPAGE register is set
109 #define REG_CURPAGE 0xff /* write */
114 #define REG_MAIN_CNTRL0 REG(0x00, 0x01) /* read/write */
115 # define MAIN_CNTRL0_SR (1 << 0)
116 # define MAIN_CNTRL0_DECS (1 << 1)
117 # define MAIN_CNTRL0_DEHS (1 << 2)
[all …]
/linux-6.15/tools/testing/selftests/kvm/x86/
Dhyperv_features.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Tests for Hyper-V features enablement
18 * but to activate the feature it is sufficient to set it to a non-zero
27 bool write; member
47 GUEST_ASSERT(msr->idx); in guest_msr()
49 if (msr->write) in guest_msr()
50 vector = wrmsr_safe(msr->idx, msr->write_val); in guest_msr()
52 if (!vector && (!msr->write || !is_write_only_msr(msr->idx))) in guest_msr()
53 vector = rdmsr_safe(msr->idx, &msr_val); in guest_msr()
55 if (msr->fault_expected) in guest_msr()
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/linux-6.15/tools/perf/pmu-events/arch/s390/cf_z14/
Dextended.json3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …"PublicDescription": "A directory write to the Level-1 Data cache where the line was originally in…
10 "Unit": "CPU-M-CF",
17 "Unit": "CPU-M-CF",
21 …ata cache. Incremented by one for every TLB2 miss in progress for the Level-1 Data cache on this c…
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "DTLB2 One-Megabyte Page Writes",
28 … into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyte page…
31 "Unit": "CPU-M-CF",
[all …]
/linux-6.15/tools/perf/pmu-events/arch/x86/icelakex/
Duncore-memory.json4 "Counter": "0,1,2,3",
7 "PerPkg": "1",
14 "Counter": "0,1,2,3",
17 "Experimental": "1",
18 "PerPkg": "1",
25 "Counter": "0,1,2,3",
28 "PerPkg": "1",
35 "Counter": "0,1,2,3",
38 "PerPkg": "1",
39 …"PublicDescription": "Counts the total number of DRAM Read CAS commands, w/ and w/o auto-pre, issu…
[all …]
/linux-6.15/arch/parisc/kernel/
Dperf_asm.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 /* low-level asm for "intrigue" (PA8500-8700 CPU perf counters)
5 * Copyright (C) 2001 Randolph Chung <tausq at parisc-linux.org>
6 * Copyright (C) 2001 Hewlett-Packard (Grant Grundler)
100 ;* %r24 - original DR2 value
101 ;* %r1 - scratch
102 ;* %r29 - scratch
117 ; NOTE: The PCX-W ERS states that DR2_SLOW_RET must be set before any
121 depdi,z 1,DR2_SLOW_RET,1,%r29
132 ; Cacheline start (32-byte cacheline)
[all …]
/linux-6.15/tools/perf/pmu-events/arch/s390/cf_z15/
Dextended.json3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …"PublicDescription": "A directory write to the Level-1 Data cache where the line was originally in…
10 "Unit": "CPU-M-CF",
17 "Unit": "CPU-M-CF",
21 …ata cache. Incremented by one for every TLB2 miss in progress for the Level-1 Data cache on this c…
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "DTLB2 One-Megabyte Page Writes",
28 … into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyte page…
31 "Unit": "CPU-M-CF",
[all …]
/linux-6.15/tools/perf/pmu-events/arch/s390/cf_zec12/
Dextended.json3 "Unit": "CPU-M-CF",
7 …"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB…
10 "Unit": "CPU-M-CF",
14 …"PublicDescription": "Level-1 Instruction TLB miss in progress. Incremented by one for every cycle…
17 "Unit": "CPU-M-CF",
21 …Description": "A directory write to the Level-1 Data cache directory where the returned cache line…
24 "Unit": "CPU-M-CF",
28 …ription": "A directory write to the Level-1 Instruction cache directory where the returned cache l…
31 "Unit": "CPU-M-CF",
35 …Description": "A directory write to the Level-1 Data cache directory where the returned cache line…
[all …]
/linux-6.15/arch/mips/kernel/
Dcps-vec-ns16550.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
9 #include <asm/asm-offsets.h>
17 #if CONFIG_MIPS_CPS_NS16550_WIDTH == 1
32 * _mips_cps_putc() - write a character to the UART
33 * @a0: ASCII character to write
37 1: UART_L t0, UART_LSR_OFS(t9)
39 beqz t0, 1b
45 * _mips_cps_puts() - write a string to the UART
46 * @a0: pointer to NULL-terminated ASCII string
49 * Write a null-terminated ASCII string to the UART.
[all …]
/linux-6.15/arch/s390/kernel/
Dmodule.c1 // SPDX-License-Identifier: GPL-2.0+
26 #include <asm/nospec-branch.h>
43 execmem_free(mod->arch.trampolines_start); in module_arch_cleanup()
50 mod->state == MODULE_STATE_LIVE) in module_arch_freeing_init()
53 vfree(mod->arch.syminfo); in module_arch_freeing_init()
54 mod->arch.syminfo = NULL; in module_arch_freeing_init()
61 info = me->arch.syminfo + ELF_R_SYM (rela->r_info); in check_rela()
62 switch (ELF_R_TYPE (rela->r_info)) { in check_rela()
68 case R_390_GOTENT: /* 32 bit PC rel. to GOT entry shifted by 1. */ in check_rela()
74 case R_390_GOTPLTENT: /* 32 bit rel. offset to jump slot >> 1. */ in check_rela()
[all …]
/linux-6.15/drivers/comedi/drivers/
Dpcl730.c1 // SPDX-License-Identifier: GPL-2.0
4 * Driver for Advantech PCL-730 and clones
10 * Description: Advantech PCL-730 (& compatibles)
11 * Devices: [Advantech] PCL-730 (pcl730), PCM-3730 (pcm3730), PCL-725 (pcl725),
12 * PCL-733 (pcl733), PCL-734 (pcl734),
13 * [ADLink] ACL-7130 (acl7130), ACL-7225b (acl7225b),
14 * [ICP] ISO-730 (iso730), P8R8-DIO (p8r8dio), P16R16-DIO (p16r16dio),
15 * [Diamond Systems] OPMM-1616-XT (opmm-1616-xt), PEARL-MM-P (pearl-mm-p),
16 * IR104-PBF (ir104-pbf),
21 * [0] - I/O port base
[all …]
/linux-6.15/arch/loongarch/mm/
Dfault.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
6 * Copyright (C) 1995 - 2000 by Ralf Baechle
13 #include <linux/entry-common.h>
32 int show_unhandled_signals = 1;
34 static int __kprobes spurious_fault(unsigned long write, unsigned long address) in spurious_fault() argument
62 return write ? pmd_write(pmdp_get(pmd)) : 1; in spurious_fault()
68 return write ? pte_write(ptep_get(pte)) : 1; in spurious_fault()
73 unsigned long write, unsigned long address) in no_context() argument
77 if (spurious_fault(write, address)) in no_context()
[all …]
/linux-6.15/arch/sh/include/asm/
Dwatchdog.h1 /* SPDX-License-Identifier: GPL-2.0+
3 * include/asm-sh/watchdog.h
25 * See cpu-sh2/watchdog.h for explanation of this stupidity..
36 * CKS0-2 supports a number of clock division ratios. At the time the watchdog
42 * --------------------------------------------
43 * 1/32 (initial value) 41 usecs
44 * 1/64 82 usecs
45 * 1/128 164 usecs
46 * 1/256 328 usecs
47 * 1/512 656 usecs
[all …]
/linux-6.15/scripts/
Dspdxcheck.py2 # SPDX-License-Identifier: GPL-2.0
39 self.total += 1
63 for l in open(el.path, encoding="utf-8").readlines():
64 if l.startswith('Valid-License-Identifier:'):
65 lid = l.split(':')[1].strip().upper()
71 elif l.startswith('SPDX-Exception-Identifier:'):
72 exception = l.split(':')[1].strip().upper()
75 elif l.startswith('SPDX-Licenses:'):
76 … for lic in l.split(':')[1].upper().strip().replace(' ', '').replace('\t', '').split(','):
81 elif l.startswith("License-Text:"):
[all …]
/linux-6.15/Documentation/devicetree/bindings/memory-controllers/
Dti-aemif.txt4 provide a glue-less interface to a variety of asynchronous memory devices like
11 Davinci DM646x - http://www.ti.com/lit/ug/sprueq7c/sprueq7c.pdf
12 OMAP-L138 (DA850) - http://www.ti.com/lit/ug/spruh77a/spruh77a.pdf
13 Kestone - http://www.ti.com/lit/ug/sprugz3a/sprugz3a.pdf
17 - compatible: "ti,davinci-aemif"
18 "ti,keystone-aemif"
19 "ti,da850-aemif"
21 - reg: contains offset/length value for AEMIF control registers
24 - #address-cells: Must be 2. The partition number has to be encoded in the
25 first address cell and it may accept values 0..N-1
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/linux-6.15/tools/perf/pmu-events/arch/arm64/arm/neoverse-v3/
Dl1d_cache.json4 …ription": "Counts level 1 data cache refills caused by speculatively executed load or store operat…
8 …1 data cache accesses from any load/store operations. Atomic operations that resolve in the CPUs c…
12 …write-backs of dirty data from the L1 data cache to the L2 cache. This occurs when either a dirty …
16 …"PublicDescription": "Counts cache line refills into the level 1 data cache from any memory read o…
20 …"Counts level 1 data cache accesses from any load operation. Atomic load operations that resolve i…
24 …1 data cache accesses generated by store operations. This event also counts accesses caused by a D…
28 …"Counts level 1 data cache refills caused by speculatively executed load instructions where the me…
32 …Counts level 1 data cache refills caused by speculatively executed store instructions where the me…
36 …"PublicDescription": "Counts level 1 data cache refills where the cache line data came from caches…
40 …"PublicDescription": "Counts level 1 data cache refills for which the cache line data came from ou…
[all …]
/linux-6.15/tools/perf/pmu-events/arch/x86/sapphirerapids/
Duncore-memory.json3 "BriefDescription": "Cycles - at UCLK",
4 "Counter": "0,1,2,3",
7 "PerPkg": "1",
12 "Counter": "0,1,2,3",
15 "PerPkg": "1",
20 "Counter": "0,1,2,3",
23 "Experimental": "1",
24 "PerPkg": "1",
30 "Counter": "0,1,2,3",
33 "Experimental": "1",
[all …]
/linux-6.15/tools/perf/pmu-events/arch/x86/emeraldrapids/
Duncore-memory.json3 "BriefDescription": "Cycles - at UCLK",
4 "Counter": "0,1,2,3",
7 "PerPkg": "1",
12 "Counter": "0,1,2,3",
15 "PerPkg": "1",
20 "Counter": "0,1,2,3",
23 "Experimental": "1",
24 "PerPkg": "1",
30 "Counter": "0,1,2,3",
33 "Experimental": "1",
[all …]
/linux-6.15/tools/perf/pmu-events/arch/s390/cf_z196/
Dextended.json3 "Unit": "CPU-M-CF",
7 …Description": "A directory write to the Level-1 Data Cache directory where the returned cache line…
10 "Unit": "CPU-M-CF",
14 …ription": "A directory write to the Level-1 Instruction Cache directory where the returned cache l…
17 "Unit": "CPU-M-CF",
21 …"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB…
24 "Unit": "CPU-M-CF",
28 …"PublicDescription": "Level-1 Instruction TLB miss in progress. Incremented by one for every cycle…
31 "Unit": "CPU-M-CF",
35 "PublicDescription": "Incremented by one for every store sent to Level-2 cache."
[all …]

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