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/linux-5.10/include/media/
Dv4l2-dv-timings.h3 * v4l2-dv-timings - Internal header with dv-timings helper functions
16 * @t: Timings for the video mode.
30 * typedef v4l2_check_dv_timings_fnc - timings check callback
35 * Returns true if the given timings are valid.
40 * v4l2_valid_dv_timings() - are these timings valid?
58 * timings based on capabilities
66 * timings, filtering out any timings that are not supported based on the
78 * v4l2_find_dv_timings_cap() - Find the closest timings struct
84 * @fnc: callback to check if a given timings struct is OK. May be NULL.
87 * This function tries to map the given timings to an entry in the
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/linux-5.10/drivers/video/fbdev/omap2/omapfb/dss/
Dhdmi_wp.c145 struct omap_video_timings *timings) in hdmi_wp_video_config_interface() argument
151 vsync_pol = timings->vsync_level == OMAPDSS_SIG_ACTIVE_HIGH; in hdmi_wp_video_config_interface()
152 hsync_pol = timings->hsync_level == OMAPDSS_SIG_ACTIVE_HIGH; in hdmi_wp_video_config_interface()
157 r = FLD_MOD(r, timings->interlace, 3, 3); in hdmi_wp_video_config_interface()
163 struct omap_video_timings *timings) in hdmi_wp_video_config_timing() argument
170 timing_h |= FLD_VAL(timings->hbp, 31, 20); in hdmi_wp_video_config_timing()
171 timing_h |= FLD_VAL(timings->hfp, 19, 8); in hdmi_wp_video_config_timing()
172 timing_h |= FLD_VAL(timings->hsw, 7, 0); in hdmi_wp_video_config_timing()
175 timing_v |= FLD_VAL(timings->vbp, 31, 20); in hdmi_wp_video_config_timing()
176 timing_v |= FLD_VAL(timings->vfp, 19, 8); in hdmi_wp_video_config_timing()
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/linux-5.10/Documentation/driver-api/memory-devices/
Dti-gpmc.rst23 GPMC has certain timings that has to be programmed for proper
25 timings. To have peripheral work with gpmc, peripheral timings has to
28 dependency for certain gpmc timings on gpmc clock frequency. Hence a
31 Generic routine provides a generic method to calculate gpmc timings
32 from gpmc peripheral timings. struct gpmc_device_timings fields has to
33 be updated with timings from the datasheet of the peripheral that is
34 connected to gpmc. A few of the peripheral timings can be fed either
49 on understanding of gpmc timings, peripheral timings, available
54 gpmc timing dependency on peripheral timings:
172 Many of gpmc timings are dependent on other gpmc timings (a few
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/linux-5.10/Documentation/userspace-api/media/v4l/
Ddv-timings.rst3 .. _dv-timings:
6 Digital Video (DV) Timings
10 and the corresponding video timings. Today there are many more different
13 extend the API to select the video timings for these interfaces. Since
16 set/get video timings at the input and output.
18 These ioctls deal with the detailed digital video timings that define
21 widths etc. The ``linux/v4l2-dv-timings.h`` header can be used to get
22 the timings of the formats in the :ref:`cea861` and :ref:`vesadmt`
25 To enumerate and query the attributes of the DV timings supported by a
29 DV timings for the device applications use the
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Dvidioc-query-dv-timings.rst38 The hardware may be able to detect the current DV timings automatically,
42 the timings, it will fill in the timings structure.
46 Drivers shall *not* switch timings automatically if new
47 timings are detected. Instead, drivers should send the
50 The reason is that new timings usually mean different buffer sizes as
53 :ref:`VIDIOC_QUERY_DV_TIMINGS`, and if the detected timings are valid they
54 will have to stop streaming, set the new timings, allocate new buffers
57 If the timings could not be detected because there was no signal, then
62 capabilities), then the driver fills in whatever timings it could find
65 found timings with the hardware's capabilities in order to give more
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Dvidioc-enum-dv-timings.rst13 VIDIOC_ENUM_DV_TIMINGS - VIDIOC_SUBDEV_ENUM_DV_TIMINGS - Enumerate supported Digital Video timings
38 While some DV receivers or transmitters support a wide range of timings,
39 others support only a limited number of timings. With this ioctl
40 applications can enumerate a list of known supported timings. Call
42 also supports other standards or even custom timings that are not in
45 To query the available timings, applications initialize the ``index``
51 DV timings, applications shall begin at index zero, incrementing by one
56 Drivers may enumerate a different set of DV timings after
59 When implemented by the driver DV timings of subdevices can be queried
61 subdevice node. The DV timings are specific to inputs (for DV receivers)
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Dvidioc-g-dv-timings.rst13 … VIDIOC_SUBDEV_G_DV_TIMINGS - VIDIOC_SUBDEV_S_DV_TIMINGS - Get or set DV timings for input or outp…
46 To set DV timings for the input or output, applications use the
47 :ref:`VIDIOC_S_DV_TIMINGS <VIDIOC_G_DV_TIMINGS>` ioctl and to get the current timings,
59 The ``linux/v4l2-dv-timings.h`` header can be used to get the timings of
61 the current input or output does not support DV timings (e.g. if
77 Digital video timings are not supported for this input or output.
80 The device is busy and therefore can not change the timings.
185 - Type of DV timings as listed in :ref:`dv-timing-types`.
190 - Timings defined by BT.656/1120 specifications
214 - BT.656/1120 timings
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/linux-5.10/Documentation/fb/
Dviafb.modes31 timings 39722 48 16 33 10 96 2 endmode mode "480x640-60"
33 geometry 480 640 480 640 32 timings 39722 72 24 19 1 48 3 endmode
54 geometry 640 480 640 480 32 timings 31747 120 16 16 1 64 3 endmode
75 geometry 640 480 640 480 32 timings 27777 80 56 25 1 56 3 endmode
96 geometry 640 480 640 480 32 timings 23168 104 40 25 1 64 3 endmode
117 geometry 640 480 640 480 32 timings 19081 104 40 31 1 64 3 endmode
138 geometry 720 480 720 480 32 timings 37202 88 16 14 1 72 3 endmode
159 geometry 800 480 800 480 32 timings 33805 96 24 10 3 72 7 endmode
180 geometry 720 576 720 576 32 timings 30611 96 24 17 1 72 3 endmode
202 timings 25000 88 40 23 1 128 4 hsync high vsync high endmode
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/linux-5.10/drivers/memory/tegra/
Dtegra210-emc-table.c16 struct tegra210_emc_timing *timings; in tegra210_emc_table_device_init() local
19 timings = memremap(rmem->base, rmem->size, MEMREMAP_WB); in tegra210_emc_table_device_init()
20 if (!timings) { in tegra210_emc_table_device_init()
28 if (timings[i].revision == 0) in tegra210_emc_table_device_init()
44 memunmap(timings); in tegra210_emc_table_device_init()
48 emc->derated = timings; in tegra210_emc_table_device_init()
51 emc->nominal = timings; in tegra210_emc_table_device_init()
56 rmem->priv = timings; in tegra210_emc_table_device_init()
64 struct tegra210_emc_timing *timings = rmem->priv; in tegra210_emc_table_device_release() local
67 if ((emc->nominal && timings != emc->nominal) && in tegra210_emc_table_device_release()
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/linux-5.10/drivers/media/i2c/adv748x/
Dadv748x-hdmi.c13 #include <media/v4l2-dv-timings.h>
16 #include <uapi/linux/v4l2-dv-timings.h>
48 struct v4l2_dv_timings timings; member
96 fmt->field = hdmi->timings.bt.interlaced ? in adv748x_hdmi_fill_format()
102 fmt->width = hdmi->timings.bt.width; in adv748x_hdmi_fill_format()
103 fmt->height = hdmi->timings.bt.height; in adv748x_hdmi_fill_format()
109 static void adv748x_fill_optional_dv_timings(struct v4l2_dv_timings *timings) in adv748x_fill_optional_dv_timings() argument
111 v4l2_find_dv_timings_cap(timings, &adv748x_hdmi_timings_cap, in adv748x_fill_optional_dv_timings()
172 const struct v4l2_dv_timings *timings) in adv748x_hdmi_set_video_timings() argument
179 if (!v4l2_match_dv_timings(timings, &stds[i].timings, 250000, in adv748x_hdmi_set_video_timings()
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/linux-5.10/drivers/video/fbdev/core/
Dfbmon.c224 printk("fbmon: trying to fix monitor timings\n"); in fix_edid()
638 DPRINTK(" Detailed Timings\n"); in fb_create_modedb()
655 DPRINTK(" Standard Timings\n"); in fb_create_modedb()
1148 static void fb_timings_vfreq(struct __fb_timings *timings) in fb_timings_vfreq() argument
1150 timings->hfreq = fb_get_hfreq(timings->vfreq, timings->vactive); in fb_timings_vfreq()
1151 timings->vblank = fb_get_vblank(timings->hfreq); in fb_timings_vfreq()
1152 timings->vtotal = timings->vactive + timings->vblank; in fb_timings_vfreq()
1153 timings->hblank = fb_get_hblank_by_hfreq(timings->hfreq, in fb_timings_vfreq()
1154 timings->hactive); in fb_timings_vfreq()
1155 timings->htotal = timings->hactive + timings->hblank; in fb_timings_vfreq()
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/linux-5.10/drivers/video/fbdev/omap2/omapfb/displays/
Dencoder-tfp410.c24 struct omap_video_timings timings; member
81 in->ops.dpi->set_timings(in, &ddata->timings); in tfp410_enable()
113 static void tfp410_fix_timings(struct omap_video_timings *timings) in tfp410_fix_timings() argument
115 timings->data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE; in tfp410_fix_timings()
116 timings->sync_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE; in tfp410_fix_timings()
117 timings->de_level = OMAPDSS_SIG_ACTIVE_HIGH; in tfp410_fix_timings()
121 struct omap_video_timings *timings) in tfp410_set_timings() argument
126 tfp410_fix_timings(timings); in tfp410_set_timings()
128 ddata->timings = *timings; in tfp410_set_timings()
129 dssdev->panel.timings = *timings; in tfp410_set_timings()
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Dconnector-analog-tv.c23 struct omap_video_timings timings; member
91 in->ops.atv->set_timings(in, &ddata->timings); in tvc_enable()
125 struct omap_video_timings *timings) in tvc_set_timings() argument
130 ddata->timings = *timings; in tvc_set_timings()
131 dssdev->panel.timings = *timings; in tvc_set_timings()
133 in->ops.atv->set_timings(in, timings); in tvc_set_timings()
137 struct omap_video_timings *timings) in tvc_get_timings() argument
141 *timings = ddata->timings; in tvc_get_timings()
145 struct omap_video_timings *timings) in tvc_check_timings() argument
150 return in->ops.atv->check_timings(in, timings); in tvc_check_timings()
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Dconnector-hdmi.c42 struct omap_video_timings timings; member
94 in->ops.hdmi->set_timings(in, &ddata->timings); in hdmic_enable()
121 struct omap_video_timings *timings) in hdmic_set_timings() argument
126 ddata->timings = *timings; in hdmic_set_timings()
127 dssdev->panel.timings = *timings; in hdmic_set_timings()
129 in->ops.hdmi->set_timings(in, timings); in hdmic_set_timings()
133 struct omap_video_timings *timings) in hdmic_get_timings() argument
137 *timings = ddata->timings; in hdmic_get_timings()
141 struct omap_video_timings *timings) in hdmic_check_timings() argument
146 return in->ops.hdmi->check_timings(in, timings); in hdmic_check_timings()
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Dconnector-dvi.c43 struct omap_video_timings timings; member
89 in->ops.dvi->set_timings(in, &ddata->timings); in dvic_enable()
114 struct omap_video_timings *timings) in dvic_set_timings() argument
119 ddata->timings = *timings; in dvic_set_timings()
120 dssdev->panel.timings = *timings; in dvic_set_timings()
122 in->ops.dvi->set_timings(in, timings); in dvic_set_timings()
126 struct omap_video_timings *timings) in dvic_get_timings() argument
130 *timings = ddata->timings; in dvic_get_timings()
134 struct omap_video_timings *timings) in dvic_check_timings() argument
139 return in->ops.dvi->check_timings(in, timings); in dvic_check_timings()
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Dencoder-opa362.c28 struct omap_video_timings timings; member
91 in->ops.atv->set_timings(in, &ddata->timings); in opa362_enable()
124 struct omap_video_timings *timings) in opa362_set_timings() argument
131 ddata->timings = *timings; in opa362_set_timings()
132 dssdev->panel.timings = *timings; in opa362_set_timings()
134 in->ops.atv->set_timings(in, timings); in opa362_set_timings()
138 struct omap_video_timings *timings) in opa362_get_timings() argument
144 *timings = ddata->timings; in opa362_get_timings()
148 struct omap_video_timings *timings) in opa362_check_timings() argument
155 return in->ops.atv->check_timings(in, timings); in opa362_check_timings()
/linux-5.10/drivers/ide/
Dcs5530.c27 * Here are the standard PIO mode 0-4 timings for each "format".
28 * Format-0 uses fast data reg timings, with slower command reg timings.
29 * Format-1 uses fast timings for all registers, but won't work with all drives.
37 * After chip reset, the PIO timings are set to 0x0000e132, which is not valid.
39 #define CS5530_BAD_PIO(timings) (((timings)&~0x80000000)==0x0000e132) argument
50 * will have valid default PIO timings set up before we get here.
71 * different timings can still be chosen for each drive. We could
106 unsigned int reg, timings = 0; in cs5530_set_dma_mode() local
109 case XFER_UDMA_0: timings = 0x00921250; break; in cs5530_set_dma_mode()
110 case XFER_UDMA_1: timings = 0x00911140; break; in cs5530_set_dma_mode()
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Dcs5536.c137 unsigned long timings = (unsigned long)ide_get_drivedata(drive); in cs5536_set_pio_mode() local
145 timings &= (IDE_DRV_MASK << 8); in cs5536_set_pio_mode()
146 timings |= drv_timings[pio]; in cs5536_set_pio_mode()
147 ide_set_drivedata(drive, (void *)timings); in cs5536_set_pio_mode()
180 unsigned long timings = (unsigned long)ide_get_drivedata(drive); in cs5536_set_dma_mode() local
191 timings &= IDE_DRV_MASK; in cs5536_set_dma_mode()
192 timings |= mwdma_timings[mode - XFER_MW_DMA_0] << 8; in cs5536_set_dma_mode()
193 ide_set_drivedata(drive, (void *)timings); in cs5536_set_dma_mode()
201 unsigned long timings = (unsigned long)ide_get_drivedata(drive); in cs5536_dma_start() local
204 (timings >> 8) != (timings & IDE_DRV_MASK)) in cs5536_dma_start()
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/linux-5.10/drivers/memory/
Dof_memory.c26 * default min timings provided by JEDEC.
92 * of_get_ddr_timings() - extracts the ddr timings and updates no of
95 * @dev: Device requesting for ddr timings
102 * while populating, returns default timings provided by JEDEC.
109 struct lpddr2_timings *timings = NULL; in of_get_ddr_timings() local
117 tim_compat = "jedec,lpddr2-timings"; in of_get_ddr_timings()
128 timings = devm_kcalloc(dev, arr_sz, sizeof(*timings), in of_get_ddr_timings()
131 if (!timings) in of_get_ddr_timings()
136 if (of_do_get_timings(np_tim, &timings[i])) { in of_get_ddr_timings()
137 devm_kfree(dev, timings); in of_get_ddr_timings()
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Dpl353-smc.c114 * @timings: NAND controller timing parameters
118 void pl353_smc_set_cycles(u32 timings[]) in pl353_smc_set_cycles() argument
125 timings[0] &= PL353_SMC_SET_CYCLES_T0_MASK; in pl353_smc_set_cycles()
126 timings[1] = (timings[1] & PL353_SMC_SET_CYCLES_T1_MASK) << in pl353_smc_set_cycles()
128 timings[2] = (timings[2] & PL353_SMC_SET_CYCLES_T2_MASK) << in pl353_smc_set_cycles()
130 timings[3] = (timings[3] & PL353_SMC_SET_CYCLES_T3_MASK) << in pl353_smc_set_cycles()
132 timings[4] = (timings[4] & PL353_SMC_SET_CYCLES_T4_MASK) << in pl353_smc_set_cycles()
134 timings[5] = (timings[5] & PL353_SMC_SET_CYCLES_T5_MASK) << in pl353_smc_set_cycles()
136 timings[6] = (timings[6] & PL353_SMC_SET_CYCLES_T6_MASK) << in pl353_smc_set_cycles()
138 timings[0] |= timings[1] | timings[2] | timings[3] | in pl353_smc_set_cycles()
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/linux-5.10/drivers/mtd/nand/raw/
Dnand_timings.c26 .timings.mode = 0,
27 .timings.sdr = {
71 .timings.mode = 1,
72 .timings.sdr = {
116 .timings.mode = 2,
117 .timings.sdr = {
161 .timings.mode = 3,
162 .timings.sdr = {
206 .timings.mode = 4,
207 .timings.sdr = {
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/linux-5.10/drivers/media/rc/
Drc-ir-raw.c305 * @timings: Manchester modulation timings.
310 * modulation with the timing characteristics described by @timings, writing up
319 const struct ir_raw_timings_manchester *timings, in ir_raw_gen_manchester() argument
328 if (timings->leader_pulse) { in ir_raw_gen_manchester()
331 init_ir_raw_event_duration((*ev), 1, timings->leader_pulse); in ir_raw_gen_manchester()
332 if (timings->leader_space) { in ir_raw_gen_manchester()
336 timings->leader_space); in ir_raw_gen_manchester()
346 if (timings->invert) in ir_raw_gen_manchester()
349 (*ev)->duration += timings->clock; in ir_raw_gen_manchester()
354 timings->clock); in ir_raw_gen_manchester()
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/linux-5.10/drivers/media/spi/
Dgs1662.c23 #include <media/v4l2-dv-timings.h>
24 #include <linux/v4l2-dv-timings.h>
113 /* Implement following timings before enable it.
114 * Because of we don't have access to these theoretical timings yet.
229 static int gs_status_format(u16 status, struct v4l2_dv_timings *timings) in gs_status_format() argument
236 *timings = reg_fmt[i].format; in gs_status_format()
244 static u16 get_register_timings(struct v4l2_dv_timings *timings) in get_register_timings() argument
249 if (v4l2_match_dv_timings(timings, &reg_fmt[i].format, 0, in get_register_timings()
263 struct v4l2_dv_timings *timings) in gs_s_dv_timings() argument
268 reg_value = get_register_timings(timings); in gs_s_dv_timings()
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/linux-5.10/drivers/media/rc/img-ir/
Dimg-ir-hw.c63 /* functions for preprocessing timings, ensuring max is set */
84 static void img_ir_timings_preprocess(struct img_ir_timings *timings, in img_ir_timings_preprocess() argument
87 img_ir_symbol_timing_preprocess(&timings->ldr, unit); in img_ir_timings_preprocess()
88 img_ir_symbol_timing_preprocess(&timings->s00, unit); in img_ir_timings_preprocess()
89 img_ir_symbol_timing_preprocess(&timings->s01, unit); in img_ir_timings_preprocess()
90 img_ir_symbol_timing_preprocess(&timings->s10, unit); in img_ir_timings_preprocess()
91 img_ir_symbol_timing_preprocess(&timings->s11, unit); in img_ir_timings_preprocess()
95 timings->ft.ft_min = (timings->ft.ft_min*unit + 999)/1000; in img_ir_timings_preprocess()
116 static void img_ir_timings_defaults(struct img_ir_timings *timings, in img_ir_timings_defaults() argument
119 img_ir_symbol_timing_defaults(&timings->ldr, &defaults->ldr); in img_ir_timings_defaults()
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/linux-5.10/drivers/memory/samsung/
Dexynos5422-dmc.c124 * @timings_arr_size: number of 'timings' elements
128 * @timings: DDR memory timings, from device tree
130 * @bypass_timing_row: value for timing row register for bypass timings
131 * @bypass_timing_data: value for timing data register for bypass timings
133 * timings
169 const struct lpddr3_timings *timings; member
301 * exynos5_switch_timing_regs() - Changes bank register set for DRAM timings
382 * exynos5_set_bypass_dram_timings() - Low-level changes of the DRAM timings
385 * Low-level function for changing timings for DRAM memory clocking from
409 * exynos5_dram_change_timings() - Low-level changes of the DRAM final timings
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