114  * @timings: NAND controller timing parameters
118 void pl353_smc_set_cycles(u32 timings[])  in pl353_smc_set_cycles()  argument
125 	timings[0] &= PL353_SMC_SET_CYCLES_T0_MASK;  in pl353_smc_set_cycles()
126 	timings[1] = (timings[1] & PL353_SMC_SET_CYCLES_T1_MASK) <<  in pl353_smc_set_cycles()
128 	timings[2] = (timings[2]  & PL353_SMC_SET_CYCLES_T2_MASK) <<  in pl353_smc_set_cycles()
130 	timings[3] = (timings[3]  & PL353_SMC_SET_CYCLES_T3_MASK) <<  in pl353_smc_set_cycles()
132 	timings[4] = (timings[4] & PL353_SMC_SET_CYCLES_T4_MASK) <<  in pl353_smc_set_cycles()
134 	timings[5]  = (timings[5]  & PL353_SMC_SET_CYCLES_T5_MASK) <<  in pl353_smc_set_cycles()
136 	timings[6]  = (timings[6]  & PL353_SMC_SET_CYCLES_T6_MASK) <<  in pl353_smc_set_cycles()
138 	timings[0] |= timings[1] | timings[2] | timings[3] |  in pl353_smc_set_cycles()
139 			timings[4] | timings[5] | timings[6];  in pl353_smc_set_cycles()
141 	writel(timings[0], pl353_smc_base + PL353_SMC_SET_CYCLES_OFFS);  in pl353_smc_set_cycles()