| /linux-5.10/drivers/clocksource/ |
| D | timer-ti-dm.c | 34 #include <clocksource/timer-ti-dm.h>
48 * omap_dm_timer_read_reg - read timer registers in posted and non-posted mode
49 * @timer: timer pointer over which read operation to perform
56 static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg) in omap_dm_timer_read_reg() argument
59 return __omap_dm_timer_read(timer, reg, timer->posted); in omap_dm_timer_read_reg()
63 * omap_dm_timer_write_reg - write timer registers in posted and non-posted mode
64 * @timer: timer pointer over which write operation is to perform
72 static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg, in omap_dm_timer_write_reg() argument
76 __omap_dm_timer_write(timer, reg, value, timer->posted); in omap_dm_timer_write_reg()
79 static void omap_timer_restore_context(struct omap_dm_timer *timer) in omap_timer_restore_context() argument
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| D | timer-zevio.c | 3 * linux/drivers/clocksource/zevio-timer.c
64 struct zevio_timer *timer = container_of(dev, struct zevio_timer, in zevio_timer_set_event() local
67 writel(delta, timer->timer1 + IO_CURRENT_VAL); in zevio_timer_set_event()
69 timer->timer1 + IO_CONTROL); in zevio_timer_set_event()
76 struct zevio_timer *timer = container_of(dev, struct zevio_timer, in zevio_timer_shutdown() local
79 /* Disable timer interrupts */ in zevio_timer_shutdown()
80 writel(0, timer->interrupt_regs + IO_INTR_MSK); in zevio_timer_shutdown()
81 writel(TIMER_INTR_ALL, timer->interrupt_regs + IO_INTR_ACK); in zevio_timer_shutdown()
82 /* Stop timer */ in zevio_timer_shutdown()
83 writel(CNTL_STOP_TIMER, timer->timer1 + IO_CONTROL); in zevio_timer_shutdown()
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| D | Kconfig | 35 bool "BCM2835 timer driver" if COMPILE_TEST
38 Enables the support for the BCM2835 timer driver.
41 bool "BCM mobile timer driver" if COMPILE_TEST
44 Enables the support for the BCM Kona mobile timer driver.
47 bool "Texas Instruments DaVinci timer driver" if COMPILE_TEST
49 Enables the support for the TI DaVinci timer driver.
52 bool "Digicolor timer driver" if COMPILE_TEST
56 Enables the support for the digicolor timer driver.
59 bool "DW APB timer driver" if COMPILE_TEST
61 Enables the support for the dw_apb timer.
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| D | Makefile | 2 obj-$(CONFIG_TIMER_OF) += timer-of.o
3 obj-$(CONFIG_TIMER_PROBE) += timer-probe.o
4 obj-$(CONFIG_ATMEL_PIT) += timer-atmel-pit.o
5 obj-$(CONFIG_ATMEL_ST) += timer-atmel-st.o
6 obj-$(CONFIG_ATMEL_TCB_CLKSRC) += timer-atmel-tcb.o
9 obj-$(CONFIG_CS5535_CLOCK_EVENT_SRC) += timer-cs5535.o
18 obj-$(CONFIG_DAVINCI_TIMER) += timer-davinci.o
19 obj-$(CONFIG_DIGICOLOR_TIMER) += timer-digicolor.o
20 obj-$(CONFIG_OMAP_DM_TIMER) += timer-ti-dm.o
21 obj-$(CONFIG_OMAP_DM_TIMER) += timer-ti-dm-systimer.o
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| D | timer-microchip-pit64b.c | 3 * 64-bit Periodic Interval Timer driver
37 #define MCHP_PIT64B_TLSBR 0x20 /* Timer LSB Register */
39 #define MCHP_PIT64B_TMSBR 0x24 /* Timer MSB Register */
51 * struct mchp_pit64b_timer - PIT64B timer data structure
66 * @timer: PIT64B timer
70 struct mchp_pit64b_timer timer; member
78 /* Base address for clocksource timer. */
80 /* Default cycles for clockevent timer. */
93 * timer value whatever the lapse of time between the accesses. in mchp_pit64b_cnt_read()
103 static inline void mchp_pit64b_reset(struct mchp_pit64b_timer *timer, in mchp_pit64b_reset() argument
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| D | timer-rockchip.c | 3 * Rockchip timer support
44 struct rk_timer timer; member
52 return &container_of(ce, struct rk_clkevt, ce)->timer; in rk_timer()
55 static inline void rk_timer_disable(struct rk_timer *timer) in rk_timer_disable() argument
57 writel_relaxed(TIMER_DISABLE, timer->ctrl); in rk_timer_disable()
60 static inline void rk_timer_enable(struct rk_timer *timer, u32 flags) in rk_timer_enable() argument
62 writel_relaxed(TIMER_ENABLE | flags, timer->ctrl); in rk_timer_enable()
66 struct rk_timer *timer) in rk_timer_update_counter() argument
68 writel_relaxed(cycles, timer->base + TIMER_LOAD_COUNT0); in rk_timer_update_counter()
69 writel_relaxed(0, timer->base + TIMER_LOAD_COUNT1); in rk_timer_update_counter()
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| D | dw_apb_timer.c | 49 static inline u32 apbt_readl(struct dw_apb_timer *timer, unsigned long offs) in apbt_readl() argument
51 return readl(timer->base + offs); in apbt_readl()
54 static inline void apbt_writel(struct dw_apb_timer *timer, u32 val, in apbt_writel() argument
57 writel(val, timer->base + offs); in apbt_writel()
60 static inline u32 apbt_readl_relaxed(struct dw_apb_timer *timer, unsigned long offs) in apbt_readl_relaxed() argument
62 return readl_relaxed(timer->base + offs); in apbt_readl_relaxed()
65 static inline void apbt_writel_relaxed(struct dw_apb_timer *timer, u32 val, in apbt_writel_relaxed() argument
68 writel_relaxed(val, timer->base + offs); in apbt_writel_relaxed()
71 static void apbt_disable_int(struct dw_apb_timer *timer) in apbt_disable_int() argument
73 u32 ctrl = apbt_readl(timer, APBTMR_N_CONTROL); in apbt_disable_int()
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| D | timer-u300.c | 4 * Timer COH 901 328, runs the OS timer interrupt.
27 * APP side special timer registers
28 * This timer contains four timers which can fire an interrupt each.
29 * OS (operating system) timer @ 32768 Hz
30 * DD (device driver) timer @ 1 kHz
31 * GP1 (general purpose 1) timer @ 1MHz
32 * GP2 (general purpose 2) timer @ 1MHz
35 /* Reset OS Timer 32bit (-/W) */
38 /* Enable OS Timer 32bit (-/W) */
41 /* Disable OS Timer 32bit (-/W) */
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| D | bcm2835_timer.c | 46 struct bcm2835_timer *timer = container_of(evt_dev, in bcm2835_time_set_next_event() local
49 timer->compare); in bcm2835_time_set_next_event()
55 struct bcm2835_timer *timer = dev_id; in bcm2835_time_interrupt() local
57 if (readl_relaxed(timer->control) & timer->match_mask) { in bcm2835_time_interrupt()
58 writel_relaxed(timer->match_mask, timer->control); in bcm2835_time_interrupt()
60 event_handler = READ_ONCE(timer->evt.event_handler); in bcm2835_time_interrupt()
62 event_handler(&timer->evt); in bcm2835_time_interrupt()
74 struct bcm2835_timer *timer; in bcm2835_timer_init() local
101 timer = kzalloc(sizeof(*timer), GFP_KERNEL); in bcm2835_timer_init()
102 if (!timer) { in bcm2835_timer_init()
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| /linux-5.10/include/linux/ |
| D | hrtimer.h | 21 #include <linux/timer.h>
32 * HRTIMER_MODE_PINNED - Timer is bound to CPU (is only considered
33 * when starting the timer)
34 * HRTIMER_MODE_SOFT - Timer callback function will be executed in
36 * HRTIMER_MODE_HARD - Timer callback function will be executed in
66 HRTIMER_NORESTART, /* Timer is not restarted */
67 HRTIMER_RESTART, /* Timer must be restarted */
71 * Values to track state of the timer
78 * The callback state is not part of the timer->state because clearing it would
79 * mean touching the timer after the callback, this makes it impossible to free
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| D | timer.h | 40 * @TIMER_DEFERRABLE: A deferrable timer will work normally when the
42 * to service it; instead, the timer will be serviced when the CPU
43 * eventually wakes up with a subsequent non-deferrable timer.
45 * @TIMER_IRQSAFE: An irqsafe timer is executed with IRQ disabled and
53 * @TIMER_PINNED: A pinned timer will not be affected by any timer
55 * on which the timer was enqueued.
57 * Note: Because enqueuing of timers can migrate the timer from one
60 * function is invoked via mod_timer() or add_timer(). If the timer
89 * LOCKDEP and DEBUG timer interfaces.
91 void init_timer_key(struct timer_list *timer,
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| /linux-5.10/drivers/rtc/ |
| D | rtc-brcmstb-waketimer.c | 44 static inline void brcmstb_waketmr_clear_alarm(struct brcmstb_waketmr *timer) in brcmstb_waketmr_clear_alarm() argument
46 writel_relaxed(1, timer->base + BRCMSTB_WKTMR_EVENT); in brcmstb_waketmr_clear_alarm()
47 (void)readl_relaxed(timer->base + BRCMSTB_WKTMR_EVENT); in brcmstb_waketmr_clear_alarm()
50 static void brcmstb_waketmr_set_alarm(struct brcmstb_waketmr *timer, in brcmstb_waketmr_set_alarm() argument
53 brcmstb_waketmr_clear_alarm(timer); in brcmstb_waketmr_set_alarm()
56 writel_relaxed(timer->rate, timer->base + BRCMSTB_WKTMR_PRESCALER); in brcmstb_waketmr_set_alarm()
58 writel_relaxed(secs + 1, timer->base + BRCMSTB_WKTMR_ALARM); in brcmstb_waketmr_set_alarm()
63 struct brcmstb_waketmr *timer = data; in brcmstb_waketmr_irq() local
65 pm_wakeup_event(timer->dev, 0); in brcmstb_waketmr_irq()
75 static void wktmr_read(struct brcmstb_waketmr *timer, in wktmr_read() argument
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| /linux-5.10/net/netfilter/ |
| D | xt_IDLETIMER.c | 5 * Netfilter module to trigger a timer when packet matches.
6 * After timer expires a kevent will be sent.
20 #include <linux/timer.h>
35 struct timer_list timer; member
66 struct idletimer_tg *timer; in idletimer_tg_show() local
73 timer = __idletimer_tg_find_by_label(attr->attr.name); in idletimer_tg_show()
74 if (timer) { in idletimer_tg_show()
75 if (timer->timer_type & XT_IDLETIMER_ALARM) { in idletimer_tg_show()
76 ktime_t expires_alarm = alarm_expires_remaining(&timer->alarm); in idletimer_tg_show()
80 expires = timer->timer.expires; in idletimer_tg_show()
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| /linux-5.10/arch/s390/kernel/ |
| D | vtime.c | 3 * Virtual cpu timer based timer functions.
38 u64 timer; in get_vtimer() local
40 asm volatile("stpt %0" : "=Q" (timer)); in get_vtimer()
41 return timer; in get_vtimer()
46 u64 timer; in set_vtimer() local
49 " stpt %0\n" /* Store current cpu timer value */ in set_vtimer()
51 : "=Q" (timer) : "Q" (expires)); in set_vtimer()
52 S390_lowcore.system_timer += S390_lowcore.last_update_timer - timer; in set_vtimer()
127 u64 timer, clock, user, guest, system, hardirq, softirq; in do_account_vtime() local
129 timer = S390_lowcore.last_update_timer; in do_account_vtime()
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| /linux-5.10/sound/core/ |
| D | timer.c | 17 #include <sound/timer.h>
37 MODULE_DESCRIPTION("ALSA timer interface");
45 MODULE_ALIAS("devname:snd/timer");
128 static int snd_timer_free(struct snd_timer *timer);
133 static void snd_timer_reschedule(struct snd_timer * timer, unsigned long ticks_left);
136 * create a timer instance with the given owner string.
172 * find a timer instance from the given timer id
176 struct snd_timer *timer; in snd_timer_find() local
178 list_for_each_entry(timer, &snd_timer_list, device_list) { in snd_timer_find()
179 if (timer->tmr_class != tid->dev_class) in snd_timer_find()
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| D | pcm_timer.c | 11 #include <sound/timer.h>
16 * Timer functions
44 "pcm timer resolution out of range (rate = %u, period_size = %lu)\n", in snd_pcm_timer_resolution_change()
52 static unsigned long snd_pcm_timer_resolution(struct snd_timer * timer) in snd_pcm_timer_resolution() argument
56 substream = timer->private_data; in snd_pcm_timer_resolution()
60 static int snd_pcm_timer_start(struct snd_timer * timer) in snd_pcm_timer_start() argument
64 substream = snd_timer_chip(timer); in snd_pcm_timer_start()
69 static int snd_pcm_timer_stop(struct snd_timer * timer) in snd_pcm_timer_stop() argument
73 substream = snd_timer_chip(timer); in snd_pcm_timer_stop()
92 static void snd_pcm_timer_free(struct snd_timer *timer) in snd_pcm_timer_free() argument
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| /linux-5.10/sound/isa/gus/ |
| D | gus_timer.c | 14 * Timer 1 - 80us
17 static int snd_gf1_timer1_start(struct snd_timer * timer) in snd_gf1_timer1_start() argument
24 gus = snd_timer_chip(timer); in snd_gf1_timer1_start()
26 ticks = timer->sticks; in snd_gf1_timer1_start()
28 snd_gf1_write8(gus, SNDRV_GF1_GB_ADLIB_TIMER_1, 256 - ticks); /* timer 1 count */ in snd_gf1_timer1_start()
29 snd_gf1_write8(gus, SNDRV_GF1_GB_SOUND_BLASTER_CONTROL, tmp); /* enable timer 1 IRQ */ in snd_gf1_timer1_start()
30 snd_gf1_adlib_write(gus, 0x04, tmp >> 2); /* timer 2 start */ in snd_gf1_timer1_start()
35 static int snd_gf1_timer1_stop(struct snd_timer * timer) in snd_gf1_timer1_stop() argument
41 gus = snd_timer_chip(timer); in snd_gf1_timer1_stop()
44 snd_gf1_write8(gus, SNDRV_GF1_GB_SOUND_BLASTER_CONTROL, tmp); /* disable timer #1 */ in snd_gf1_timer1_stop()
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| /linux-5.10/include/clocksource/ |
| D | timer-ti-dm.h | 45 /* timer interrupt enable bits */
59 /* timer capabilities used in hwmod database */
67 * timer errata flags
71 * timer counter register is never read. For more details please refer to
124 int omap_dm_timer_get_irq(struct omap_dm_timer *timer);
128 int omap_dm_timer_trigger(struct omap_dm_timer *timer);
139 * These registers are offsets from timer->iobase.
155 * These registers are offsets from timer->func_base. The func_base
175 #define OMAP_TIMER_CTRL_ST (1 << 0) /* start timer */
254 static inline u32 __omap_dm_timer_read(struct omap_dm_timer *timer, u32 reg, in __omap_dm_timer_read() argument
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| /linux-5.10/arch/nios2/kernel/ |
| D | time.c | 22 #define ALTR_TIMER_COMPATIBLE "altr,timer-1.0"
42 struct nios2_timer timer; member
47 struct nios2_timer timer; member
63 static u16 timer_readw(struct nios2_timer *timer, u32 offs) in timer_readw() argument
65 return readw(timer->base + offs); in timer_readw()
68 static void timer_writew(struct nios2_timer *timer, u16 val, u32 offs) in timer_writew() argument
70 writew(val, timer->base + offs); in timer_writew()
73 static inline unsigned long read_timersnapshot(struct nios2_timer *timer) in read_timersnapshot() argument
77 timer_writew(timer, 0, ALTERA_TIMER_SNAPL_REG); in read_timersnapshot()
78 count = timer_readw(timer, ALTERA_TIMER_SNAPH_REG) << 16 | in read_timersnapshot()
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| /linux-5.10/kernel/time/ |
| D | hrtimer.c | 9 * In contrast to the low-resolution timeout API, aka timer wheel,
16 * Based on the original timer wheel code
41 #include <linux/timer.h>
47 #include <trace/events/timer.h>
61 * The timer bases:
64 * into the timer bases by the hrtimer_base_type enum. When trying
135 * timer->base->cpu_base
154 * means that all timers which are tied to this base via timer->base are
160 * When the timer's base is locked, and the timer removed from list, it is
161 * possible to set timer->base = &migration_base and drop the lock: the timer
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| D | timer.c | 16 * 2000-10-05 Implemented scalable SMP per-CPU timer handling.
57 #include <trace/events/timer.h>
64 * The timer wheel has LVL_DEPTH array levels. Each level provides an array of
71 * The array level of a newly armed timer depends on the relative expiry
75 * Contrary to the original timer wheel implementation, which aims for 'exact'
77 * the timers into the lower array levels. The previous 'classic' timer wheel
82 * This is an optimization of the original timer wheel implementation for the
83 * majority of the timer wheel use cases: timeouts. The vast majority of
294 * due to delays of the timer irq, long irq off times etc etc) then in round_jiffies_common()
477 static inline unsigned int timer_get_idx(struct timer_list *timer) in timer_get_idx() argument
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| D | posix-cpu-timers.c | 13 #include <trace/events/timer.h>
21 static void posix_cpu_timer_rearm(struct k_itimer *timer);
33 * Called after updating RLIMIT_CPU to run cpu timer and update
60 * If the encoded PID is 0, then the timer is targeted at current in pid_for_clock()
106 static inline struct task_struct *cpu_timer_task_rcu(struct k_itimer *timer) in cpu_timer_task_rcu() argument
108 return pid_task(timer->it.cpu.pid, clock_pid_type(timer->it_clock)); in cpu_timer_task_rcu()
115 static u64 bump_cpu_timer(struct k_itimer *timer, u64 now) in bump_cpu_timer() argument
117 u64 delta, incr, expires = timer->it.cpu.node.expires; in bump_cpu_timer()
120 if (!timer->it_interval) in bump_cpu_timer()
126 incr = timer->it_interval; in bump_cpu_timer()
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| /linux-5.10/sound/core/seq/oss/ |
| D | seq_oss_timer.c | 5 * Timer control routines
24 static void calc_alsa_tempo(struct seq_oss_timer *timer);
29 * create and register a new timer.
54 * delete timer.
55 * if no more timer exists, stop the queue.
70 * 0 : not a timer event -- enqueue this event
116 calc_alsa_tempo(struct seq_oss_timer *timer) in calc_alsa_tempo() argument
118 timer->tempo = (60 * 1000000) / timer->oss_tempo; in calc_alsa_tempo()
119 timer->ppq = timer->oss_timebase; in calc_alsa_tempo()
124 * dispatch a timer event
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| /linux-5.10/Documentation/devicetree/bindings/timer/ |
| D | ti,timer.txt | 1 OMAP Timer bindings
5 OMAP44xx devices have timer instances that are 100%
8 So for OMAP44xx devices timer instances may use
11 ti,omap2420-timer (applicable to OMAP24xx devices)
12 ti,omap3430-timer (applicable to OMAP3xxx/44xx devices)
13 ti,omap4430-timer (applicable to OMAP44xx devices)
14 ti,omap5430-timer (applicable to OMAP543x devices)
15 ti,am335x-timer (applicable to AM335x devices)
16 ti,am335x-timer-1ms (applicable to AM335x devices)
18 - reg: Contains timer register address range (base address and
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| D | rockchip,rk-timer.txt | 1 Rockchip rk timer
5 "rockchip,rv1108-timer", "rockchip,rk3288-timer": for Rockchip RV1108
6 "rockchip,rk3036-timer", "rockchip,rk3288-timer": for Rockchip RK3036
7 "rockchip,rk3066-timer", "rockchip,rk3288-timer": for Rockchip RK3066
8 "rockchip,rk3188-timer", "rockchip,rk3288-timer": for Rockchip RK3188
9 "rockchip,rk3228-timer", "rockchip,rk3288-timer": for Rockchip RK3228
10 "rockchip,rk3229-timer", "rockchip,rk3288-timer": for Rockchip RK3229
11 "rockchip,rk3288-timer": for Rockchip RK3288
12 "rockchip,rk3368-timer", "rockchip,rk3288-timer": for Rockchip RK3368
13 "rockchip,rk3399-timer": for Rockchip RK3399
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