45 /* timer interrupt enable bits */
59 /* timer capabilities used in hwmod database */
67  * timer errata flags
71  * timer counter register is never read. For more details please refer to
124 int omap_dm_timer_get_irq(struct omap_dm_timer *timer);
128 int omap_dm_timer_trigger(struct omap_dm_timer *timer);
139  * These registers are offsets from timer->iobase.
155  * These registers are offsets from timer->func_base. The func_base
175 #define		OMAP_TIMER_CTRL_ST		(1 << 0) /* start timer */
254 static inline u32 __omap_dm_timer_read(struct omap_dm_timer *timer, u32 reg,  in __omap_dm_timer_read()  argument
258 		while (readl_relaxed(timer->pend) & (reg >> WPSHIFT))  in __omap_dm_timer_read()
261 	return readl_relaxed(timer->func_base + (reg & 0xff));  in __omap_dm_timer_read()
264 static inline void __omap_dm_timer_write(struct omap_dm_timer *timer,  in __omap_dm_timer_write()  argument
268 		while (readl_relaxed(timer->pend) & (reg >> WPSHIFT))  in __omap_dm_timer_write()
271 	writel_relaxed(val, timer->func_base + (reg & 0xff));  in __omap_dm_timer_write()
274 static inline void __omap_dm_timer_init_regs(struct omap_dm_timer *timer)  in __omap_dm_timer_init_regs()  argument
279 	tidr = readl_relaxed(timer->io_base);  in __omap_dm_timer_init_regs()
281 		timer->revision = 1;  in __omap_dm_timer_init_regs()
282 		timer->irq_stat = timer->io_base + OMAP_TIMER_V1_STAT_OFFSET;  in __omap_dm_timer_init_regs()
283 		timer->irq_ena = timer->io_base + OMAP_TIMER_V1_INT_EN_OFFSET;  in __omap_dm_timer_init_regs()
284 		timer->irq_dis = timer->io_base + OMAP_TIMER_V1_INT_EN_OFFSET;  in __omap_dm_timer_init_regs()
285 		timer->pend = timer->io_base + _OMAP_TIMER_WRITE_PEND_OFFSET;  in __omap_dm_timer_init_regs()
286 		timer->func_base = timer->io_base;  in __omap_dm_timer_init_regs()
288 		timer->revision = 2;  in __omap_dm_timer_init_regs()
289 		timer->irq_stat = timer->io_base + OMAP_TIMER_V2_IRQSTATUS;  in __omap_dm_timer_init_regs()
290 		timer->irq_ena = timer->io_base + OMAP_TIMER_V2_IRQENABLE_SET;  in __omap_dm_timer_init_regs()
291 		timer->irq_dis = timer->io_base + OMAP_TIMER_V2_IRQENABLE_CLR;  in __omap_dm_timer_init_regs()
292 		timer->pend = timer->io_base +  in __omap_dm_timer_init_regs()
295 		timer->func_base = timer->io_base + OMAP_TIMER_V2_FUNC_OFFSET;  in __omap_dm_timer_init_regs()
301  * @timer:      pointer to timer instance handle
303  * Enables the write posted mode for the timer. When posted mode is enabled
304  * writes to certain timer registers are immediately acknowledged by the
307  * timer registers.
309 static inline void __omap_dm_timer_enable_posted(struct omap_dm_timer *timer)  in __omap_dm_timer_enable_posted()  argument
311 	if (timer->posted)  in __omap_dm_timer_enable_posted()
314 	if (timer->errata & OMAP_TIMER_ERRATA_I103_I767) {  in __omap_dm_timer_enable_posted()
315 		timer->posted = OMAP_TIMER_NONPOSTED;  in __omap_dm_timer_enable_posted()
316 		__omap_dm_timer_write(timer, OMAP_TIMER_IF_CTRL_REG, 0, 0);  in __omap_dm_timer_enable_posted()
320 	__omap_dm_timer_write(timer, OMAP_TIMER_IF_CTRL_REG,  in __omap_dm_timer_enable_posted()
322 	timer->context.tsicr = OMAP_TIMER_CTRL_POSTED;  in __omap_dm_timer_enable_posted()
323 	timer->posted = OMAP_TIMER_POSTED;  in __omap_dm_timer_enable_posted()
327  * __omap_dm_timer_override_errata - override errata flags for a timer
328  * @timer:      pointer to timer handle
331  * For a given timer, override a timer errata by clearing the flags
333  * overridden for a timer if the timer is used in such a way the erratum
336 static inline void __omap_dm_timer_override_errata(struct omap_dm_timer *timer,  in __omap_dm_timer_override_errata()  argument
339 	timer->errata &= ~errata;  in __omap_dm_timer_override_errata()
342 static inline void __omap_dm_timer_stop(struct omap_dm_timer *timer,  in __omap_dm_timer_stop()  argument
347 	l = __omap_dm_timer_read(timer, OMAP_TIMER_CTRL_REG, posted);  in __omap_dm_timer_stop()
350 		__omap_dm_timer_write(timer, OMAP_TIMER_CTRL_REG, l, posted);  in __omap_dm_timer_stop()
353 		__omap_dm_timer_read(timer, OMAP_TIMER_CTRL_REG, posted);  in __omap_dm_timer_stop()
356 		 * timer is stopped  in __omap_dm_timer_stop()
363 	writel_relaxed(OMAP_TIMER_INT_OVERFLOW, timer->irq_stat);  in __omap_dm_timer_stop()
366 static inline void __omap_dm_timer_load_start(struct omap_dm_timer *timer,  in __omap_dm_timer_load_start()  argument
370 	__omap_dm_timer_write(timer, OMAP_TIMER_COUNTER_REG, load, posted);  in __omap_dm_timer_load_start()
371 	__omap_dm_timer_write(timer, OMAP_TIMER_CTRL_REG, ctrl, posted);  in __omap_dm_timer_load_start()
374 static inline void __omap_dm_timer_int_enable(struct omap_dm_timer *timer,  in __omap_dm_timer_int_enable()  argument
377 	writel_relaxed(value, timer->irq_ena);  in __omap_dm_timer_int_enable()
378 	__omap_dm_timer_write(timer, OMAP_TIMER_WAKEUP_EN_REG, value, 0);  in __omap_dm_timer_int_enable()
382 __omap_dm_timer_read_counter(struct omap_dm_timer *timer, int posted)  in __omap_dm_timer_read_counter()  argument
384 	return __omap_dm_timer_read(timer, OMAP_TIMER_COUNTER_REG, posted);  in __omap_dm_timer_read_counter()
387 static inline void __omap_dm_timer_write_status(struct omap_dm_timer *timer,  in __omap_dm_timer_write_status()  argument
390 	writel_relaxed(value, timer->irq_stat);  in __omap_dm_timer_write_status()