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/linux-5.10/include/linux/mmc/
Dhost.h1 /* SPDX-License-Identifier: GPL-2.0-only */
12 #include <linux/fault-inject.h>
17 #include <linux/dma-direction.h>
108 * ios->clock might be 0. For some controllers, setting 0Hz
118 * 1 for a read-only card
119 * -ENOSYS when not supported (equal to NULL callback)
128 * -ENOSYS when not supported (equal to NULL callback)
179 /* Allocate resources, and make the CQE operational */
181 /* Free resources, and make the CQE non-operational */
184 * Issue a read, write or DCMD request to the CQE. Also deal with the
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/linux-5.10/drivers/infiniband/ulp/rtrs/
Drtrs-pri.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Copyright (c) 2014 - 2018 ProfitBricks GmbH. All rights reserved.
6 * Copyright (c) 2018 - 2019 1&1 IONOS Cloud GmbH. All rights reserved.
7 * Copyright (c) 2019 - 2020 1&1 IONOS SE. All rights reserved.
28 MAX_IMM_TYPE_MASK = ((1 << MAX_IMM_TYPE_BITS) - 1),
30 MAX_IMM_PAYL_MASK = ((1 << MAX_IMM_PAYL_BITS) - 1),
118 struct ib_cqe cqe; member
126 * enum rtrs_msg_types - RTRS message types, see also rtrs/README
142 * enum rtrs_msg_flags - RTRS message flags.
152 * struct rtrs_sg_desc - RDMA-Buffer entry description
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/linux-5.10/drivers/infiniband/ulp/iser/
Discsi_iser.h7 * based on code maintained by open-iscsi@googlegroups.com
11 * Copyright (c) 2013-2014 Mellanox Technologies. All rights reserved.
23 * - Redistributions of source code must retain the above
27 * - Redistributions in binary form must reproduce the above
58 #include <linux/dma-mapping.h>
127 * supports -EAGAIN scheme where tx is suspended till the QP has room for more *
147 - ISER_MAX_TX_MISC_PDUS \
148 - ISER_MAX_RX_MISC_PDUS) / \
185 * struct iser_data_buf - iSER data buffer
206 * struct iser_mem_reg - iSER memory registration info
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/linux-5.10/drivers/infiniband/hw/cxgb4/
Dcq.c2 * Copyright (c) 2009-2010 Chelsio, Inc. All rights reserved.
14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
49 res_wr->op_nres = cpu_to_be32( in destroy_cq()
53 res_wr->len16_pkd = cpu_to_be32(DIV_ROUND_UP(wr_len, 16)); in destroy_cq()
54 res_wr->cookie = (uintptr_t)wr_waitp; in destroy_cq()
55 res = res_wr->res; in destroy_cq()
56 res->u.cq.restype = FW_RI_RES_TYPE_CQ; in destroy_cq()
57 res->u.cq.op = FW_RI_RES_OP_RESET; in destroy_cq()
58 res->u.cq.iqid = cpu_to_be32(cq->cqid); in destroy_cq()
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/linux-5.10/drivers/infiniband/hw/efa/
Defa_com.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 * Copyright 2018-2020 Amazon.com, Inc. or its affiliates. All rights reserved.
71 struct efa_com_mmio_read *mmio_read = &edev->mmio_read; in efa_com_reg_read32()
77 read_resp = mmio_read->read_resp; in efa_com_reg_read32()
79 spin_lock(&mmio_read->lock); in efa_com_reg_read32()
80 mmio_read->seq_num++; in efa_com_reg_read32()
83 read_resp->req_id = mmio_read->seq_num + 0x9aL; in efa_com_reg_read32()
86 mmio_read->seq_num); in efa_com_reg_read32()
88 writel(mmio_read_reg, edev->reg_bar + EFA_REGS_MMIO_REG_READ_OFF); in efa_com_reg_read32()
90 exp_time = jiffies + usecs_to_jiffies(mmio_read->mmio_read_timeout); in efa_com_reg_read32()
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/linux-5.10/Documentation/devicetree/bindings/mmc/
Dbrcm,sdhci-brcmstb.txt4 and the properties used by the sdhci-brcmstb driver.
11 - compatible: should be one of the following
12 - "brcm,bcm7425-sdhci"
13 - "brcm,bcm7445-sdhci"
14 - "brcm,bcm7216-sdhci"
16 Refer to clocks/clock-bindings.txt for generic clock consumer properties.
21 sd-uhs-sdr50;
22 sd-uhs-ddr50;
23 sd-uhs-sdr104;
24 sdhci,auto-cmd12;
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Dmmc-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
25 "#address-cells":
30 "#size-cells":
37 broken-cd:
42 cd-gpios:
46 non-removable:
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/linux-5.10/drivers/infiniband/hw/vmw_pvrdma/
Dpvrdma_dev_api.h2 * Copyright (c) 2012-2016 VMware, Inc. All rights reserved.
7 * 2-Clause License. This program is distributed in the hope that it
11 * http://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html.
17 * The BSD 2-Clause License
23 * - Redistributions of source code must retain the above
27 * - Redistributions in binary form must reproduce the above
68 * Masks and accessors for page directory, which is a two-level lookup:
69 * page directory -> page table -> page. Only one directory for now, but we
83 * Max MSI-X vectors.
101 #define PVRDMA_CQ_FLAG_ARMED_SOL BIT(0) /* Armed for solicited-only. */
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/linux-5.10/drivers/net/ethernet/qlogic/qede/
Dqede_fp.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
3 * Copyright (c) 2015-2017 QLogic Corporation
4 * Copyright (c) 2019-2020 Marvell International Ltd.
33 /* In case lazy-allocation is allowed, postpone allocation until the in qede_alloc_rx_buffer()
37 if (allow_lazy && likely(rxq->filled_buffers > 12)) { in qede_alloc_rx_buffer()
38 rxq->filled_buffers--; in qede_alloc_rx_buffer()
44 return -ENOMEM; in qede_alloc_rx_buffer()
49 mapping = dma_map_page(rxq->dev, data, 0, in qede_alloc_rx_buffer()
50 PAGE_SIZE, rxq->data_direction); in qede_alloc_rx_buffer()
51 if (unlikely(dma_mapping_error(rxq->dev, mapping))) { in qede_alloc_rx_buffer()
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/linux-5.10/drivers/net/ethernet/amazon/ena/
Dena_admin_defs.h1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
3 * Copyright 2015-2020 Amazon.com, Inc. or its affiliates. All rights reserved.
114 * 1 : ctrl_data - control buffer address valid
115 * 2 : ctrl_data_indirect - control buffer address
137 * 7:5 : sq_direction - 0x1 - Tx; 0x2 - Rx
188 * 7:5 : sq_direction - 0x1 - Tx, 0x2 - Rx
194 /* 3:0 : placement_policy - Describing where the SQ
196 * 0x1 - descriptors and headers are in OS memory,
197 * 0x3 - descriptors and headers in device memory
199 * 6:4 : completion_policy - Describing what policy
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Dena_com.c1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
3 * Copyright 2015-2020 Amazon.com, Inc. or its affiliates. All rights reserved.
11 /* Timeout in micro-sec */
49 /* Abort - canceled by the driver */
73 if ((addr & GENMASK_ULL(ena_dev->dma_addr_bits - 1, 0)) != addr) { in ena_com_mem_addr_set()
74 pr_err("DMA address has more bits that the device supports\n"); in ena_com_mem_addr_set()
75 return -EINVAL; in ena_com_mem_addr_set()
78 ena_addr->mem_addr_low = lower_32_bits(addr); in ena_com_mem_addr_set()
79 ena_addr->mem_addr_high = (u16)upper_32_bits(addr); in ena_com_mem_addr_set()
86 struct ena_com_admin_sq *sq = &admin_queue->sq; in ena_com_admin_init_sq()
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/linux-5.10/drivers/mmc/host/
Dsdhci-brcmstb.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * sdhci-brcmstb.c Support for SDHCI on Broadcom BRCMSTB SoC's
15 #include "sdhci-pltfm.h"
43 dev_dbg(mmc_dev(mmc), "%s(): Setting HS400-Enhanced-Strobe mode\n", in sdhci_brcmstb_hs400es()
45 reg = readl(host->ioaddr + SDHCI_VENDOR); in sdhci_brcmstb_hs400es()
46 if (ios->enhanced_strobe) in sdhci_brcmstb_hs400es()
50 writel(reg, host->ioaddr + SDHCI_VENDOR); in sdhci_brcmstb_hs400es()
57 host->mmc->actual_clock = 0; in sdhci_brcmstb_set_clock()
59 clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock); in sdhci_brcmstb_set_clock()
73 dev_dbg(mmc_dev(host->mmc), "%s: Setting UHS signaling for %d timing\n", in sdhci_brcmstb_set_uhs_signaling()
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Dsdhci-tegra.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/dma-mapping.h>
23 #include <linux/mmc/slot-gpio.h>
27 #include "sdhci-pltfm.h"
119 /* SDMMC CQE Base Address for Tegra Host Ver 4.1 and Higher */
176 const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data; in tegra_sdhci_readw()
178 if (unlikely((soc_data->nvquirks & NVQUIRK_FORCE_SDHCI_SPEC_200) && in tegra_sdhci_readw()
184 return readw(host->ioaddr + reg); in tegra_sdhci_readw()
197 pltfm_host->xfer_mode_shadow = val; in tegra_sdhci_writew()
200 writel((val << 16) | pltfm_host->xfer_mode_shadow, in tegra_sdhci_writew()
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Dsdhci.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * linux/drivers/mmc/host/sdhci.h - Secure Digital Host Controller Interface driver
7 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
166 #define SDHCI_INT_ALL_MASK ((unsigned int)-1)
188 #define SDHCI_CTRL_HS400 0x0005 /* Non-standard */
233 #define SDHCI_SUPPORT_HS400 0x80000000 /* Non-standard */
242 /* 4C-4F reserved for more max current */
249 /* 55-57 reserved */
254 /* 60-FB reserved */
261 #define SDHCI_PRESET_FOR_HS400 0x74 /* Non-standard */
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Dsdhci-msm.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * drivers/mmc/host/sdhci-msm.c - Qualcomm SDHCI Platform driver
5 * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
20 #include "sdhci-pltfm.h"
119 #define INVALID_TUNING_PHASE -1
133 /* Max load for eMMC Vdd-io supply */
137 msm_host->var_ops->msm_readl_relaxed(host, offset)
140 msm_host->var_ops->msm_writel_relaxed(val, host, offset)
294 return msm_host->offset; in sdhci_priv_msm_offset()
307 return readl_relaxed(msm_host->core_mem + offset); in sdhci_msm_mci_variant_readl_relaxed()
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Dsdhci-esdhc-imx.c1 // SPDX-License-Identifier: GPL-2.0
5 * derived from the OF-version.
23 #include <linux/mmc/slot-gpio.h>
27 #include <linux/platform_data/mmc-esdhc-imx.h>
29 #include "sdhci-pltfm.h"
30 #include "sdhci-esdhc.h"
82 #define ESDHC_TUNE_CTRL_MAX ((1 << 7) - 1)
133 * open ended multi-blk IO. Otherwise the TC INT wouldn't
147 /* The IP supports manual tuning process */
149 /* The IP supports standard tuning process */
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/linux-5.10/drivers/net/ethernet/broadcom/bnx2x/
Dbnx2x_cmn.c3 * Copyright (c) 2007-2013 Broadcom Corporation
46 netif_napi_add(bp->dev, &bnx2x_fp(bp, i, napi), in bnx2x_add_all_napi_cnic()
57 netif_napi_add(bp->dev, &bnx2x_fp(bp, i, napi), in bnx2x_add_all_napi()
75 * bnx2x_move_fp - move content of the fastpath structure.
81 * Makes sure the contents of the bp->fp[to].napi is kept
89 struct bnx2x_fastpath *from_fp = &bp->fp[from]; in bnx2x_move_fp()
90 struct bnx2x_fastpath *to_fp = &bp->fp[to]; in bnx2x_move_fp()
91 struct bnx2x_sp_objs *from_sp_objs = &bp->sp_objs[from]; in bnx2x_move_fp()
92 struct bnx2x_sp_objs *to_sp_objs = &bp->sp_objs[to]; in bnx2x_move_fp()
93 struct bnx2x_fp_stats *from_fp_stats = &bp->fp_stats[from]; in bnx2x_move_fp()
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/linux-5.10/drivers/mmc/core/
Dcore.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2003-2004 Russell King, All Rights Reserved.
7 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
24 #include <linux/fault-inject.h>
33 #include <linux/mmc/slot-gpio.h>
49 /* The max erase timeout, used when host->max_busy_timeout isn't specified */
84 struct mmc_command *cmd = mrq->cmd; in mmc_should_fail_request()
85 struct mmc_data *data = mrq->data; in mmc_should_fail_request()
87 -ETIMEDOUT, in mmc_should_fail_request()
88 -EILSEQ, in mmc_should_fail_request()
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/linux-5.10/drivers/nvme/target/
Dfc.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/blk-mq.h>
15 #include <linux/nvme-fc-driver.h>
16 #include <linux/nvme-fc.h>
32 struct list_head ls_rcv_list; /* tgtport->ls_rcv_list */
55 struct list_head lsreq_list; /* tgtport->ls_req_list */
60 /* desired maximum for a single sequence - if sg list allows it */
93 struct list_head fcp_list; /* tgtport->fcp_list */
176 return (iodptr - iodptr->tgtport->iod); in nvmet_fc_iodnum()
182 return (fodptr - fodptr->queue->fod); in nvmet_fc_fodnum()
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/linux-5.10/drivers/scsi/qedf/
Dqedf_main.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (c) 2016-2018 Cavium Inc.
58 static int qedf_default_prio = -1;
81 "supports. (default 0xffffffff)");
106 "during probe (0-3: 0 more verbose).");
125 vlan_id_tmp = vlan_id | (qedf->prio << VLAN_PRIO_SHIFT); in qedf_set_vlan_id()
126 qedf->vlan_id = vlan_id_tmp; in qedf_set_vlan_id()
127 QEDF_INFO(&qedf->dbg_ctx, QEDF_LOG_DISC, in qedf_set_vlan_id()
129 vlan_id_tmp, qedf->prio); in qedf_set_vlan_id()
136 while (qedf->fipvlan_retries--) { in qedf_initiate_fipvlan_req()
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/linux-5.10/drivers/nvme/host/
Dfc.c1 // SPDX-License-Identifier: GPL-2.0
15 #include <linux/nvme-fc-driver.h>
16 #include <linux/nvme-fc.h>
65 struct list_head lsreq_list; /* rport->ls_req_list */
77 struct list_head lsrcv_list; /* rport->ls_rcv_list */
133 struct list_head endp_list; /* for lport->endp_list */
147 /* fc_ctrl flags values - specified as bit positions */
164 struct list_head ctrl_list; /* rport->ctrl_list */
228 * These items are short-term. They will eventually be moved into
235 /* *********************** FC-NVME Port Management ************************ */
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/linux-5.10/arch/arm64/boot/dts/qcom/
Dqcs404-evb.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
17 stdout-path = "serial0";
20 vph_pwr: vph-pwr-regulator {
21 compatible = "regulator-fixed";
22 regulator-name = "vph_pwr";
23 regulator-always-on;
24 regulator-boot-on;
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/linux-5.10/drivers/net/ethernet/mellanox/mlxsw/
Dcmd.h1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
2 /* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */
190 /* QUERY_FW - Query Firmware
191 * -------------------------
193 * -----------------------
212 * Firmware Revision - Major
217 * Firmware Sub-minor version (Patch level)
222 * Firmware Revision - Minor
233 * every time a non-backward-compatible change is done for the command
250 * Firmware timestamp - hour
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/linux-5.10/net/sunrpc/xprtrdma/
Dsvc_rdma_recvfrom.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * Copyright (c) 2016-2018 Oracle. All rights reserved.
5 * Copyright (c) 2005-2006 Network Appliance, Inc. All rights reserved.
10 * COPYING in the main directory of this source tree, or the BSD-type
123 cid->ci_queue_id = rdma->sc_rq_cq->res.id; in svc_rdma_recv_cid_init()
124 cid->ci_completion_id = atomic_inc_return(&rdma->sc_completion_ids); in svc_rdma_recv_cid_init()
137 buffer = kmalloc(rdma->sc_max_req_size, GFP_KERNEL); in svc_rdma_recv_ctxt_alloc()
140 addr = ib_dma_map_single(rdma->sc_pd->device, buffer, in svc_rdma_recv_ctxt_alloc()
141 rdma->sc_max_req_size, DMA_FROM_DEVICE); in svc_rdma_recv_ctxt_alloc()
142 if (ib_dma_mapping_error(rdma->sc_pd->device, addr)) in svc_rdma_recv_ctxt_alloc()
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/linux-5.10/include/linux/
Dnvme-fc-driver.h1 /* SPDX-License-Identifier: GPL-2.0 */
13 * ********************** FC-NVME LS API ********************
15 * Data structures used by both FC-NVME hosts and FC-NVME
16 * targets to perform FC-NVME LS requests or transmit
23 * struct nvmefc_ls_req - Request structure passed from the transport
24 * to the LLDD to perform a NVME-FC LS request and obtain
26 * Used by nvme-fc transport (host) to send LS's such as
29 * Used by the nvmet-fc transport (controller) to send
50 * negative errno on failure (example: -ENXIO).
69 * struct nvmefc_ls_rsp - Structure passed from the transport to the LLDD
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