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/linux/Documentation/devicetree/bindings/net/dsa/
H A Drealtek.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
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/linux/drivers/net/dsa/realtek/
H A Drealtek-smi.c1 // SPDX-License-Identifier: GPL-2.0+
2 /* Realtek Simple Management Interface (SMI) driver
5 * The SMI protocol piggy-backs the MDIO MDC and MDIO signals levels
6 * but the protocol is not MDIO at all. Instead it is a Realtek
7 * pecularity that need to bit-ban
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
19 bool "Realtek MDIO interface support"
23 through MDIO.
26 bool "Realtek SMI interface support"
30 through SMI.
37 Select to enable support for Realtek RTL8365MB-VC and RTL8367S.
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_NET_DSA_REALTEK) += realtek_dsa.o
3 realtek_dsa-objs := rtl83xx.o
6 realtek_dsa-objs += realtek-mdio.o
10 realtek_dsa-objs += realtek-sm
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H A Drtl83xx.c1 // SPDX-License-Identifier: GPL-2.0+
11 * rtl83xx_lock() - Locks the mutex used by regmaps
19 * Context: Can sleep. Holds priv->map_lock lock.
26 mutex_lock(&priv->map_lock); in rtl83xx_lock()
31 * rtl83xx_unlock() - Unlocks the mutex used by regmaps
36 * Context: Releases priv->map_lock lock.
43 mutex_unlock(&priv->map_lock); in rtl83xx_unlock()
49 struct realtek_priv *priv = bus->pri in rtl83xx_user_mdio_read()
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H A Drtl8365mb.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Realtek SMI subdriver for the Realtek RTL8365MB-VC ethernet switch.
4 * Copyright (C) 2021 Alvin Šipraga <alsi@bang-olufsen.dk>
5 * Copyright (C) 2021 Michael Rasmussen <mir@bang-olufsen.dk>
7 * The RTL8365MB-VC is a 4+1 port 10/100/1000M switch controller. It includes 4
9 * can be connected to the CPU - or another PHY - vi
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H A Drtl8366rb.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Realtek SMI subdriver for the Realtek RTL8366RB ethernet switch
9 * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
27 #include "realtek-smi.h"
28 #include "realtek-mdio.h"
47 /* Switch per-por
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/linux/drivers/net/ethernet/marvell/
H A Dmvmdio.c2 * Driver for the MDIO interface of Marvell network interfaces.
4 * Since the MDIO interface of Marvell network interfaces is shared
7 * ports, but they in fact share the same SMI interface to access
8 * the MDIO bus). This driver is currently used by the mvneta and
13 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
64 * SMI Timeout measurements:
65 * - Kirkwood 88F6281 (Globalscale Dreamplug): 45us to 95us (Interrupt)
66 * - Armada 370 (Globalscale Mirabox): 41us to 43us (Polled)
76 * but also reflects SMI completion), use that to wait for
77 * SMI acces
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/linux/Documentation/devicetree/bindings/net/
H A Dcavium-mdio.txt1 * System Management Interface (SMI) / MDIO
4 - compatible: One of:
6 "cavium,octeon-3860-mdio": Compatibility with all cn3XXX, cn5XXX
9 "cavium,thunder-8890-mdio": Compatibility with all cn8XXX SOCs.
11 - re
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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmarvell,armada-98dx3236-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,98dx3236-pinctrl" or "marvell,98dx4251-pinctrl"
8 - reg: register specifier of MPP registers
18 mpp4 4 gpio, spi0(cs1), smi(mdc), dev(cs0)
45 mpp31 31 gpio, slv_smi(mdc), smi(mdc), dev(we1)
46 mpp32 32 gpio, slv_smi(mdio), smi(mdio), de
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H A Dmarvell,armada-39x-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6920-pinctrl", "marvell,88f6925-pinctrl" or
8 "marvell,88f6928-pinctrl" depending on the specific variant of the
10 - reg: register specifier of MPP registers
22 mpp4 4 gpio, ua1(txd), ua0(rts), smi(mdc)
23 mpp5 5 gpio, ua1(rxd), ua0(cts), smi(mdio)
24 mpp6 6 gpio, dev(cs3), xsmi(mdio)
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/linux/arch/arm/boot/dts/broadcom/
H A Dbcm47094-asus-rt-ac88u.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 /dts-v1/;
8 #include "bcm47094-asus-rt-ac3100.dtsi"
11 compatible = "asus,rt-ac88
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/linux/drivers/net/mdio/
H A Dmdio-realtek-rtl9300.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * MDIO controller for RTL9300 switches with integrated SoC.
5 * The MDIO communication is abstracted by the switch. At the software level
7 * mapping based on the MDIO bus described in device tree and phandles on the
8 * ethernet-ports property.
15 #include <linux/mdio.h>
68 struct rtl9300_mdio_chan *chan = bus->pri in rtl9300_mdio_phy_to_port()
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/linux/arch/arm/boot/dts/gemini/
H A Dgemini-dlink-dir-685.dts2 * Device Tree file for D-Link DIR-685 Xtreme N Storage Router
5 /dts-v1/;
8 #include <dt-bindings/input/input.h>
11 model = "D-Link DIR-685 Xtreme N Storage Router";
12 compatible = "dlink,dir-685", "cortina,gemini";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 /* 128 MB SDRAM in 2 x Hynix HY5DU121622DTP-D4
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/linux/drivers/pinctrl/mvebu/
H A Dpinctrl-armada-39x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
18 #include "pinctrl-mvebu.h"
45 MPP_VAR_FUNCTION(7, "smi", "mdc", V_88F6920_PLUS)),
50 MPP_VAR_FUNCTION(7, "smi", "mdio", V_88F6920_PLU
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H A Dpinctrl-armada-xp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
26 #include "pinctrl-mvebu.h"
189 MPP_VAR_FUNCTION(0x4, "lcd", "ref-clk", V_MV78230_PLUS)),
235 MPP_VAR_FUNCTION(0x4, "lcd", "vga-hsync", V_MV78230_PLUS),
243 MPP_VAR_FUNCTION(0x4, "lcd", "vga-vsyn
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/linux/arch/arm64/boot/dts/marvell/
H A Darmada-37xx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 interrupt-parent = <&gic>;
15 #address-cells = <2>;
16 #size-cell
353 mdio: mdio@32004 { global() label
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H A Darmada-8040-clearfog-gt-8k.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include "armada-8040.dtsi"
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/gpio/gpio.h>
16 compatible = "solidrun,clearfog-gt-8k", "marvell,armada8040",
17 "marvell,armada-ap806-qua
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/linux/arch/arm/boot/dts/marvell/
H A Ddove-cm-a510.dtsi2 * Device Tree include for Compulab CM-A510 System-on-Module
6 * This file is dual-licensed: you can use it either under the terms
46 * The CM-A510 comes with several optional components:
56 * E1: PHY RTL8211D on internal GbE (SMI address 0x03)
66 * U2: 2 dual-role USB2.0 ports
70 * W: Broadcom BCM4319 802.11b/g/n (USI WM-N-BM-0
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/linux/arch/powerpc/boot/dts/
H A Dcharon.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
12 /dts-v1/;
17 #address-cells = <1>;
18 #size-cells = <1>;
19 interrupt-parent = <&mpc5200_pic>;
22 #address-cell
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/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8195.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/clock/mt8195-clk.h>
9 #include <dt-bindings/gce/mt8195-gce.h>
10 #include <dt-bindings/interrupt-controlle
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/linux/arch/mips/cavium-octeon/
H A Docteon-platform.c6 * Copyright (C) 2004-2017 Cavium, Inc.
18 #include <asm/octeon/cvmx-helper-board.h>
24 #include <asm/octeon/cvmx-uctlx-defs.h>
78 if (dev->of_node) { in octeon2_usb_clocks_start()
82 uctl_node = of_get_parent(dev->of_node); in octeon2_usb_clocks_start()
88 "refclk-frequency", &clock_rate); in octeon2_usb_clocks_start()
90 dev_err(dev, "No UCTL \"refclk-frequency\"\n"); in octeon2_usb_clocks_start()
95 "refclk-typ in octeon2_usb_clocks_start()
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/linux/drivers/net/dsa/mv88e6xxx/
H A Dchip.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Marvell 88E6xxx Ethernet switch single-chip definition
30 /* PVT limits for 4-bit port and 5-bit switch */
112 * enum mv88e6xxx_edsa_support - Ethertype DSA tag support level
152 * ports 2-
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/linux/drivers/net/ethernet/chelsio/cxgb3/
H A Dvsc8211.c2 * Copyright (c) 2005-2008 Chelsio, Inc. All rights reserved.
14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
53 VSC_INTR_DESCRAMBL = 1 << 7, /* descrambler lock-lost */
134 int err, sp = -1, dplx = -1, pause = 0; in vsc8211_get_link_status()
144 * BMSR_LSTATUS is latch-low, so if it is 0 we need to read it in vsc8211_get_link_status()
210 int err, sp = -1, dplx = -1, pause = 0; in vsc8211_get_link_status_fiber()
220 * BMSR_LSTATUS is latch-lo in vsc8211_get_link_status_fiber()
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/linux/drivers/net/dsa/microchip/
H A Dksz_common.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2017-2025 Microchip Technology Inc.
14 #include <linux/platform_data/microchip-ksz.h>
205 * struct ksz_drive_strength - drive strength mapping
214 /* ksz9477_drive_strengths - Drive strength mapping for KSZ9477 variants
222 * - for high speed signals
232 * - for low speed signals
249 /* ksz88x3_drive_strengths - Drive strength mapping for KSZ8863, KSZ8873, ..
269 * ksz_phylink_mac_disable_tx_lpi() - Callback to signal LPI support (Dummy)
280 * ksz_phylink_mac_enable_tx_lpi() - Callback to signal LPI support (Dummy)
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