| /qemu/tests/qtest/ |
| H A D | aspeed_smc-test.c | 30 #include "aspeed-smc-utils.h"
56 qtest_add_data_func("/ast2400/smc/read_jedec", in test_palmetto_bmc()
58 qtest_add_data_func("/ast2400/smc/erase_sector", in test_palmetto_bmc()
60 qtest_add_data_func("/ast2400/smc/erase_all", in test_palmetto_bmc()
62 qtest_add_data_func("/ast2400/smc/write_page", in test_palmetto_bmc()
64 qtest_add_data_func("/ast2400/smc/read_page_mem", in test_palmetto_bmc()
66 qtest_add_data_func("/ast2400/smc/write_page_mem", in test_palmetto_bmc()
68 qtest_add_data_func("/ast2400/smc/read_status_reg", in test_palmetto_bmc()
70 qtest_add_data_func("/ast2400/smc/status_reg_write_protection", in test_palmetto_bmc()
72 qtest_add_data_func("/ast2400/smc/write_block_protect", in test_palmetto_bmc()
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| H A D | ast2700-smc-test.c | 13 #include "aspeed-smc-utils.h"
40 qtest_add_data_func("/ast2700/smc/read_jedec", in test_ast2700_evb()
42 qtest_add_data_func("/ast2700/smc/erase_sector", in test_ast2700_evb()
44 qtest_add_data_func("/ast2700/smc/erase_all", in test_ast2700_evb()
46 qtest_add_data_func("/ast2700/smc/write_page", in test_ast2700_evb()
48 qtest_add_data_func("/ast2700/smc/read_page_mem", in test_ast2700_evb()
50 qtest_add_data_func("/ast2700/smc/write_page_mem", in test_ast2700_evb()
52 qtest_add_data_func("/ast2700/smc/read_status_reg", in test_ast2700_evb()
54 qtest_add_data_func("/ast2700/smc/write_page_qpi", in test_ast2700_evb()
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| H A D | meson.build | 222 'ast2700-smc-test']
368 'aspeed_smc-test': files('aspeed-smc-utils.c', 'aspeed_smc-test.c'),
370 'ast2700-smc-test': files('aspeed-smc-utils.c', 'ast2700-smc-test.c'),
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| /qemu/tests/tcg/s390x/ |
| H A D | precise-smc-user.c | 11 extern __uint128_t __attribute__((__aligned__(1))) smc;
16 char *aligned_smc = (char *)((uintptr_t)&smc & ~0xFFFULL); in main()
17 char *smc_end = (char *)&smc + sizeof(smc); in main()
29 "smc: .org . + 6\n" /* pad patched code to 16 bytes */ in main()
30 "0: vstl %[patch],%[idx],%[smc]\n" /* start writing before TB */ in main()
32 : [smc] "=R" (smc) in main()
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| H A D | Makefile.softmmu-target | 30 precise-smc-softmmu \
45 MULTIARCH_TESTS += mvc-smc
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| H A D | Makefile.target | 51 TESTS+=ex-smc
72 Z13_TESTS+=precise-smc-user
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| /qemu/hw/ppc/ |
| H A D | spapr_irq.c | 287 SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr); in spapr_irq_nr_msis() local
289 if (smc->legacy_irq_allocation) { in spapr_irq_nr_msis()
290 return smc->nr_xirqs; in spapr_irq_nr_msis()
292 return SPAPR_XIRQ_BASE + smc->nr_xirqs - SPAPR_IRQ_MSI; in spapr_irq_nr_msis()
298 SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr); in spapr_irq_init() local
320 object_property_set_int(obj, "nr-irqs", smc->nr_xirqs, &error_abort); in spapr_irq_init()
334 qdev_prop_set_uint32(dev, "nr-irqs", smc->nr_xirqs + SPAPR_IRQ_NR_IPIS); in spapr_irq_init()
361 smc->nr_xirqs + SPAPR_IRQ_NR_IPIS); in spapr_irq_init()
376 SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr); in spapr_irq_claim() local
380 assert(irq < (smc->nr_xirqs + SPAPR_XIRQ_BASE)); in spapr_irq_claim()
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| H A D | spapr.c | 1073 SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(machine); in spapr_dt_chosen() local
1144 if (smc->linux_pci_probe) { in spapr_dt_chosen()
1183 SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(machine); in spapr_build_fdt() local
1214 } else if (smc->broken_host_serial_model && kvmppc_get_host_model(&buf)) { in spapr_build_fdt()
1221 } else if (smc->broken_host_serial_model && kvmppc_get_host_serial(&buf)) { in spapr_build_fdt()
1261 if (smc->dr_phb_enabled) { in spapr_build_fdt()
2064 SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(opaque); in spapr_dtb_needed() local
2066 return smc->update_dt_enabled; in spapr_dtb_needed()
2606 SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr); in spapr_set_vsmt_mode() local
2642 } else if (!smc->smp_threads_vsmt) { in spapr_set_vsmt_mode()
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| H A D | spapr_numa.c | 264 SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr); in spapr_numa_FORM1_affinity_init() local
286 uint32_t gpu_assoc = smc->pre_5_1_assoc_refpoints ? in spapr_numa_FORM1_affinity_init()
300 if (smc->pre_5_2_numa_associativity || in spapr_numa_FORM1_affinity_init()
435 SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr); in spapr_numa_FORM1_write_rtas_dt() local
452 if (smc->pre_5_2_numa_associativity || in spapr_numa_FORM1_write_rtas_dt()
476 if (smc->pre_5_1_assoc_refpoints) { in spapr_numa_FORM1_write_rtas_dt()
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| H A D | spapr_caps.c | 877 SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr); in default_caps_with_cpu() local
880 caps = smc->default_caps; in default_caps_with_cpu()
912 if (smc->default_caps.caps[SPAPR_CAP_HPT_MAXPAGESIZE] == 0) { in default_caps_with_cpu()
1073 void spapr_caps_add_properties(SpaprMachineClass *smc) in spapr_caps_add_properties() argument
1075 ObjectClass *klass = OBJECT_CLASS(smc); in spapr_caps_add_properties()
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| /qemu/include/hw/ssi/ |
| H A D | aspeed_smc.h | 2 * ASPEED AST2400 SMC Controller (SPI Flash Only)
35 #define TYPE_ASPEED_SMC_FLASH "aspeed.smc.flash"
47 #define TYPE_ASPEED_SMC "aspeed.smc"
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| /qemu/hw/sparc/ |
| H A D | sun4m.c | 1115 Sun4mMachineClass *smc = SUN4M_MACHINE_CLASS(mc); in ss5_class_init() local
1146 smc->hwdef = &ss5_hwdef; in ss5_class_init()
1152 Sun4mMachineClass *smc = SUN4M_MACHINE_CLASS(mc); in ss10_class_init() local
1181 smc->hwdef = &ss10_hwdef; in ss10_class_init()
1187 Sun4mMachineClass *smc = SUN4M_MACHINE_CLASS(mc); in ss600mp_class_init() local
1214 smc->hwdef = &ss600mp_hwdef; in ss600mp_class_init()
1220 Sun4mMachineClass *smc = SUN4M_MACHINE_CLASS(mc); in ss20_class_init() local
1265 smc->hwdef = &ss20_hwdef; in ss20_class_init()
1271 Sun4mMachineClass *smc = SUN4M_MACHINE_CLASS(mc); in voyager_class_init() local
1297 smc->hwdef = &voyager_hwdef; in voyager_class_init()
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| /qemu/target/arm/tcg/ |
| H A D | op_helper.c | 1076 * SMC behaviour is summarized in the following table. in HELPER()
1084 * Conduit SMC, valid call Trap to EL2 PSCI Call in HELPER()
1085 * Conduit SMC, inval call Trap to EL2 Trap to EL3 in HELPER()
1086 * Conduit not SMC Trap to EL2 Trap to EL3 in HELPER()
1092 * Conduit SMC, valid call Trap to EL2 PSCI Call in HELPER()
1093 * Conduit SMC, inval call Trap to EL2 Undef insn in HELPER()
1094 * Conduit not SMC Trap to EL2 Undef insn in HELPER()
1100 * Conduit SMC, valid call Trap to EL2 PSCI Call in HELPER()
1101 * Conduit SMC, inval call Trap to EL2 Undef insn in HELPER()
1102 * Conduit not SMC Undef or trap[1] Undef insn in HELPER()
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| H A D | psci.c | 33 * This is called before the SMC/HVC instruction is executed, to decide in arm_is_psci_call()
35 * defined behaviour for an SMC or HVC (which might be UNDEF or trap in arm_is_psci_call()
65 * the document 'SMC Calling Convention' (ARM DEN 0028) in arm_handle_psci_call()
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| /qemu/docs/system/arm/ |
| H A D | integratorcp.rst | 10 - SMC 91c111 Ethernet adapter
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| H A D | realview.rst | 21 - SMC 91c111 or SMSC LAN9118 Ethernet adapter
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| H A D | xlnx-zynq.rst | 17 - SMC SRAM@0xe2000000 64MB
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| H A D | versatile.rst | 12 - SMC 91c111 Ethernet adapter
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| H A D | aspeed.rst | 52 * Static Memory Controller (SMC or FMC) - Only SPI Flash support
269 * Static Memory Controller (SMC or FMC) - Only SPI Flash support
441 * Static Memory Controller (SMC or FMC) - Only SPI Flash support
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| /qemu/hw/misc/ |
| H A D | applesmc.c | 2 * Apple SMC controller
24 * In all Intel-based Apple hardware there is an SMC chip to control the
364 Aml *dev = aml_device("SMC"); in build_applesmc_aml()
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| H A D | eccmemctl.c | 37 * SMC (version 0, implementation 2) SS-10SX and SS-20
79 #define ECC_MER_MASK_2 0x00000bff /* Version 2 (SMC) mask */
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| /qemu/hw/isa/ |
| H A D | smc37c669-superio.c | 2 * SMC FDC37C669 Super I/O controller
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| /qemu/target/arm/hvf/ |
| H A D | trace-events | 9 hvf_unknown_smc(uint64_t x0) "unknown SMC! 0x%016"PRIx64
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| /qemu/hw/arm/ |
| H A D | boot.c | 218 0xe1b0f00e, /* movs pc, lr ;SMC exception return */ in arm_write_secure_board_setup_dummy_smc()
235 0xe1a0100e, /* mov r1, lr ;save LR across SMC */ in arm_write_secure_board_setup_dummy_smc()
236 0xe1600070, /* smc #0 ;call monitor to flush SCR */ in arm_write_secure_board_setup_dummy_smc()
458 psci_method = "smc"; in fdt_add_psci_node()
1258 * If PSCI is enabled, then SMC calls all go to the PSCI handler and in arm_load_kernel()
1261 * in Secure, because this will probably need to itself issue an SMC of some in arm_load_kernel()
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| /qemu/include/hw/xen/interface/ |
| H A D | features.h | 88 /* arm: Hypervisor supports ARM SMC calling convention. */
|