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Searched +full:sm8750 +full:- +full:gcc (Results 1 – 11 of 11) sorted by relevance

/linux-6.15/Documentation/devicetree/bindings/clock/
Dqcom,sm8750-gcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sm8750-gcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Global Clock & Reset Controller on SM8750
10 - Taniya Das <quic_tdas@quicinc.com>
14 domains on SM8750
16 See also: include/dt-bindings/clock/qcom,sm8750-gcc.h
20 const: qcom,sm8750-gcc
24 - description: Board XO source
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Dqcom,sm8550-dispcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sm8550-dispcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Neil Armstrong <neil.armstrong@linaro.org>
15 domains on SM8550, SM8650, SM8750 and few other platforms.
18 - include/dt-bindings/clock/qcom,sm8550-dispcc.h
19 - include/dt-bindings/clock/qcom,sm8650-dispcc.h
20 - include/dt-bindings/clock/qcom,sm8750-dispcc.h
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Dqcom,rpmhcc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Taniya Das <quic_tdas@quicinc.com>
20 - qcom,qcs615-rpmh-clk
21 - qcom,qdu1000-rpmh-clk
22 - qcom,sa8775p-rpmh-clk
23 - qcom,sar2130p-rpmh-clk
24 - qcom,sc7180-rpmh-clk
25 - qcom,sc7280-rpmh-clk
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/linux-6.15/arch/arm64/boot/dts/qcom/
Dsm8750.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sm8750-gcc.h>
8 #include <dt-bindings/clock/qcom,sm8750-tcsr.h>
9 #include <dt-bindings/dma/qcom-gpi.h>
10 #include <dt-bindings/interconnect/qcom,icc.h>
11 #include <dt-bindings/interconnect/qcom,sm8750-rpmh.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/qcom,rpmhpd.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
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/linux-6.15/drivers/clk/qcom/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_COMMON_CLK_QCOM) += clk-qcom.o
4 clk-qcom-y += common.o
5 clk-qcom-y += clk-regmap.o
6 clk-qcom-y += clk-alpha-pll.o
7 clk-qcom-y += clk-pll.o
8 clk-qcom-y += clk-rcg.o
9 clk-qcom-y += clk-rcg2.o
10 clk-qcom-y += clk-branch.o
11 clk-qcom-y += clk-regmap-divider.o
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
206 CMN PLL consumes the AHB/SYS clocks from GCC and supplies
207 the output clocks to the networking hardware and GCC blocks.
1060 tristate "SM8750 Display Clock Controller"
1066 SM8750 devices.
1180 tristate "SM8750 Global Clock Controller"
1184 Support for the global clock controller on SM8750 devices.
1294 Say Y if you want to toggle LPASS-adjacent resets within
1314 tristate "SM8750 TCSR Clock Controller"
1318 Support for the TCSR clock controller on SM8750 devices.
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Dgcc-sm8750.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
6 #include <linux/clk-provider.h>
12 #include <dt-bindings/clock/qcom,sm8750-gcc.h>
14 #include "clk-alpha-pll.h"
15 #include "clk-branch.h"
16 #include "clk-pll.h"
17 #include "clk-rcg.h"
18 #include "clk-regmap.h"
19 #include "clk-regmap-divider.h"
20 #include "clk-regmap-mux.h"
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/linux-6.15/Documentation/devicetree/bindings/phy/
Dqcom,sc8280xp-qmp-ufs-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-ufs-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinod Koul <vkoul@kernel.org>
19 - items:
20 - enum:
21 - qcom,qcs615-qmp-ufs-phy
22 - const: qcom,sm6115-qmp-ufs-phy
23 - items:
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/linux-6.15/Documentation/devicetree/bindings/firmware/
Dqcom,scm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
16 - Bjorn Andersson <bjorn.andersson@linaro.org>
17 - Robert Marko <robimarko@gmail.com>
18 - Guru Das Srinagesh <quic_gurus@quicinc.com>
23 - enum:
24 - qcom,scm-apq8064
25 - qcom,scm-apq8084
26 - qcom,scm-ipq4019
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/linux-6.15/Documentation/devicetree/bindings/crypto/
Dqcom,inline-crypto-engine.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/crypto/qcom,inline-crypto-engine.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
15 - enum:
16 - qcom,qcs8300-inline-crypto-engine
17 - qcom,sa8775p-inline-crypto-engine
18 - qcom,sc7180-inline-crypto-engine
19 - qcom,sc7280-inline-crypto-engine
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Dqcom-qce.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/crypto/qcom-qce.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Konrad Dybcio <konradybcio@kernel.org>
20 - const: qcom,crypto-v5.1
24 - const: qcom,crypto-v5.4
28 - items:
29 - enum:
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