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/linux-6.15/Documentation/devicetree/bindings/clock/
Dqcom,sm4450-gcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sm4450-gcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Global Clock & Reset Controller on SM4450
10 - Ajit Pandey <quic_ajipan@quicinc.com>
11 - Taniya Das <quic_tdas@quicinc.com>
15 domains on SM4450
17 See also:: include/dt-bindings/clock/qcom,sm4450-gcc.h
21 const: qcom,sm4450-gcc
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Dqcom,sm4450-camcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sm4450-camcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Camera Clock & Reset Controller on SM4450
10 - Ajit Pandey <quic_ajipan@quicinc.com>
11 - Taniya Das <quic_tdas@quicinc.com>
15 domains on SM4450
17 See also:: include/dt-bindings/clock/qcom,sm4450-camcc.h
21 const: qcom,sm4450-camcc
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Dqcom,sm4450-dispcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sm4450-dispcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display Clock & Reset Controller on SM4450
10 - Ajit Pandey <quic_ajipan@quicinc.com>
11 - Taniya Das <quic_tdas@quicinc.com>
15 domains on SM4450
17 See also:: include/dt-bindings/clock/qcom,sm4450-dispcc.h
21 const: qcom,sm4450-dispcc
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Dqcom,sm8450-gpucc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sm8450-gpucc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Konrad Dybcio <konradybcio@kernel.org>
17 include/dt-bindings/clock/qcom,sar2130p-gpucc.h
18 include/dt-bindings/clock/qcom,sm4450-gpucc.h
19 include/dt-bindings/clock/qcom,sm8450-gpucc.h
20 include/dt-bindings/clock/qcom,sm8550-gpucc.h
21 include/dt-bindings/reset/qcom,sm8450-gpucc.h
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Dqcom,rpmhcc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Taniya Das <quic_tdas@quicinc.com>
20 - qcom,qcs615-rpmh-clk
21 - qcom,qdu1000-rpmh-clk
22 - qcom,sa8775p-rpmh-clk
23 - qcom,sar2130p-rpmh-clk
24 - qcom,sc7180-rpmh-clk
25 - qcom,sc7280-rpmh-clk
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/linux-6.15/arch/arm64/boot/dts/qcom/
Dsm4450.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sm4450-camcc.h>
8 #include <dt-bindings/clock/qcom,sm4450-dispcc.h>
9 #include <dt-bindings/clock/qcom,sm4450-gcc.h>
10 #include <dt-bindings/clock/qcom,sm4450-gpucc.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
16 interrupt-parent = <&intc>;
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/linux-6.15/drivers/clk/qcom/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_COMMON_CLK_QCOM) += clk-qcom.o
4 clk-qcom-y += common.o
5 clk-qcom-y += clk-regmap.o
6 clk-qcom-y += clk-alpha-pll.o
7 clk-qcom-y += clk-pll.o
8 clk-qcom-y += clk-rcg.o
9 clk-qcom-y += clk-rcg2.o
10 clk-qcom-y += clk-branch.o
11 clk-qcom-y += clk-regmap-divider.o
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
206 CMN PLL consumes the AHB/SYS clocks from GCC and supplies
207 the output clocks to the networking hardware and GCC blocks.
904 tristate "SM4450 Camera Clock Controller"
908 Support for the camera clock controller on SM4450 devices.
970 tristate "SM4450 Display Clock Controller"
975 SM4450 devices.
1071 tristate "SM4450 Global Clock Controller"
1075 Support for the global clock controller on SM4450 devices.
1189 tristate "SM4450 Graphics Clock Controller"
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Dgcc-sm4450.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/clk-provider.h>
12 #include <dt-bindings/clock/qcom,sm4450-gcc.h>
14 #include "clk-alpha-pll.h"
15 #include "clk-branch.h"
16 #include "clk-rcg.h"
17 #include "clk-regmap.h"
18 #include "clk-regmap-divider.h"
19 #include "clk-regmap-mux.h"
20 #include "clk-regmap-phy-mux.h"
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/linux-6.15/Documentation/devicetree/bindings/cpufreq/
Dcpufreq-qcom-hw.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/cpufreq/cpufreq-qcom-hw.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
21 - description: v1 of CPUFREQ HW
23 - enum:
24 - qcom,qcm2290-cpufreq-hw
25 - qcom,sc7180-cpufreq-hw
26 - qcom,sc8180x-cpufreq-hw
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