Lines Matching +full:sm4450 +full:- +full:gcc

1 # SPDX-License-Identifier: GPL-2.0-only
206 	  CMN PLL consumes the AHB/SYS clocks from GCC and supplies
207 	  the output clocks to the networking hardware and GCC blocks.
904 	tristate "SM4450 Camera Clock Controller"
908 	  Support for the camera clock controller on SM4450 devices.
970 	tristate "SM4450 Display Clock Controller"
975 	  SM4450 devices.
1071 	tristate "SM4450 Global Clock Controller"
1075 	  Support for the global clock controller on SM4450 devices.
1189 	tristate "SM4450 Graphics Clock Controller"
1193 	  Support for the graphics clock controller on SM4450 devices.
1294 	  Say Y if you want to toggle LPASS-adjacent resets within
1393 	tristate "High-Frequency PLL (HFPLL) Clock Controller"
1395 	  Support for the high-frequency PLLs present on Qualcomm devices.
1402 	  Support for the Krait ACC and GCC clock controllers. Say Y