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/qemu/target/i386/tcg/
H A Ddecode-new.h26 X86_TYPE_B, /* VEX.vvvv selects a GPR */
27 X86_TYPE_C, /* REG in the modrm byte selects a control register */
28 X86_TYPE_D, /* REG in the modrm byte selects a debug register */
31 X86_TYPE_G, /* REG in the modrm byte selects a GPR */
32 X86_TYPE_H, /* For AVX, VEX.vvvv selects an XMM/YMM register */
36 X86_TYPE_M, /* modrm byte selects a memory operand */
37 X86_TYPE_N, /* R/M in the modrm byte selects an MMX register */
39 X86_TYPE_P, /* reg in the modrm byte selects an MMX register */
41 X86_TYPE_R, /* R/M in the modrm byte selects a register */
42 X86_TYPE_S, /* reg selects a segment register */
[all …]
H A Ddecode-new.c.inc728 * REG selects srcdest2 operand, VEX.vvvv selects src3. VEX class not found
2018 case X86_TYPE_B: /* VEX.vvvv selects a GPR */
2023 case X86_TYPE_C: /* REG in the modrm byte selects a control register */
2039 case X86_TYPE_D: /* REG in the modrm byte selects a debug register */
2054 case X86_TYPE_G: /* REG in the modrm byte selects a GPR */
2058 case X86_TYPE_S: /* reg selects a segment register */
2066 case X86_TYPE_V: /* reg in the modrm byte selects an XMM/YMM register */
2097 case X86_TYPE_N: /* R/M in the modrm byte selects an MMX register */
2101 case X86_TYPE_U: /* R/M in the modrm byte selects an XMM/YMM register */
2110 case X86_TYPE_R: /* R/M in the modrm byte selects a register */
[all …]
/qemu/include/hw/misc/
H A Dxlnx-versal-pmc-iou-slcr.h48 * + Named GPIO output "qspi-ospi-mux-sel": Selects 0: QSPI linear region or 1:
50 * + Named GPIO output "ospi-mux-sel": Selects 0: OSPI Indirect access mode or
/qemu/docs/system/riscv/
H A Dvirt.rst125 (advanced interrupt architecture) specification. The "aia=aplic" selects
127 interrupts whereas the "aia=aplic-imsic" selects APLIC and IMSIC (incoming
129 MSIs. When not specified, this option is assumed to be "none" which selects
/qemu/include/hw/ssi/
H A Dnpcm_pspi.h37 * selects. Each chip select has a dedicated memory region which may be used to
H A Dnpcm7xx_fiu.h52 * selects. Each chip select has a dedicated memory region which may be used to
H A Dimx_spi.h80 /* number of chip selects supported */
/qemu/docs/specs/
H A Dacpi_cpu_hotplug.rst113 Selects active CPU device. All following accesses to other
151 selects a CPU device with inserting/removing events and
H A Dacpi_mem_hotplug.rst48 Memory device slot selector, selects active memory device.
/qemu/tcg/tci/
H A DREADME118 * It might be useful to have a runtime option which selects the native TCG
/qemu/qapi/
H A Dcommon.json27 # @auto: QEMU selects the value between on and off
H A Dcontrol.json196 # @mode: Selects the monitor mode (default: readline in the system
H A Dqom.json555 # long enough. 0 selects a default behaviour (default: 0)
559 # encountering events. 0 selects a default behaviour (default: 0)
651 # 0 selects a default alignment (currently the page size).
712 # the system). 0 selects a default page size. This option is
/qemu/hw/display/
H A Dvga_regs.h145 #define VGA_SR04_CHN_4M 0x08 /* bit 3: selects modulo 4 addressing for CPU access to displa…
H A Dssd0323.c172 case 0xff: /* Nasty hack because we don't handle chip selects in OBJECT_DECLARE_SIMPLE_TYPE()
/qemu/hw/ssi/
H A Dnpcm7xx_fiu.c126 "%s: UMA to CS%d; this module has only %d chip selects", in npcm7xx_fiu_select()
505 error_setg(errp, "%s: %d chip selects specified, need at least one", in npcm7xx_fiu_realize()
/qemu/target/i386/
H A Darch_memory_mapping.c80 #define PLM4_ADDR_MASK 0xffffffffff000ULL /* selects bits 51:12 */
/qemu/docs/system/arm/
H A Dxlnx-versal-virt.rst57 When loading an OS, QEMU generates a DTB and selects an appropriate address
/qemu/tests/image-fuzzer/qcow2/
H A Dfuzz.py125 randomly selects one value satisfying at least one constraint (depending on
/qemu/docs/devel/
H A Dkconfig.rst154 channel "bus") selects ``I2C`` because it can act as an I2C master too.
/qemu/hw/pci-host/
H A Dmv64361.c247 * 0-3 are SDRAM chip selects but we map all RAM directly in set_mem_windows()
248 * 4-7 are device chip selects (not sure what those are) in set_mem_windows()
/qemu/docs/
H A Dqdev-device-use.txt73 * media is special. In the old way, it selects disk vs. CD-ROM with
/qemu/hw/ppc/
H A Dpnv_core.c613 * Forth nibble selects the core within a quad, mask it to process read in pnv_qme_power10_xscom_read()
/qemu/hw/acpi/
H A Dcpu.c416 * in CPU_SELECTOR selects BSP, which is NOP at in build_cpus_aml()
/qemu/docs/interop/
H A Dfirmware.json386 # @device: Selects the device type that the firmware must be mapped

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