| /linux-6.15/drivers/pci/controller/dwc/ |
| D | pcie-dw-rockchip.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * PCIe host controller driver for Rockchip SoCs.
5 * Copyright (C) 2021 Rockchip Electronics Co., Ltd.
6 * http://www.rock-chips.com
8 * Author: Simon Xue <xxm@rock-chips.com>
24 #include "pcie-designware.h"
34 #define to_rockchip_pcie(x) dev_get_drvdata((x)->dev)
75 static int rockchip_pcie_readl_apb(struct rockchip_pcie *rockchip, u32 reg) in rockchip_pcie_readl_apb() argument
77 return readl_relaxed(rockchip->apb_base + reg); in rockchip_pcie_readl_apb()
80 static void rockchip_pcie_writel_apb(struct rockchip_pcie *rockchip, u32 val, in rockchip_pcie_writel_apb() argument
[all …]
|
| /linux-6.15/drivers/pci/controller/ |
| D | pcie-rockchip-host.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Rockchip AXI PCIe host controller driver
5 * Copyright (c) 2016 Rockchip, Inc.
7 * Author: Shawn Lin <shawn.lin@rock-chips.com>
8 * Wenrui Li <wenrui.li@rock-chips.com>
37 #include "pcie-rockchip.h"
39 static void rockchip_pcie_enable_bw_int(struct rockchip_pcie *rockchip) in rockchip_pcie_enable_bw_int() argument
43 status = rockchip_pcie_read(rockchip, PCIE_RC_CONFIG_LCS); in rockchip_pcie_enable_bw_int()
45 rockchip_pcie_write(rockchip, status, PCIE_RC_CONFIG_LCS); in rockchip_pcie_enable_bw_int()
48 static void rockchip_pcie_clr_bw_int(struct rockchip_pcie *rockchip) in rockchip_pcie_clr_bw_int() argument
[all …]
|
| D | pcie-rockchip.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Rockchip AXI PCIe host controller driver
5 * Copyright (c) 2016 Rockchip, Inc.
7 * Author: Shawn Lin <shawn.lin@rock-chips.com>
8 * Wenrui Li <wenrui.li@rock-chips.com>
25 #include "pcie-rockchip.h"
27 int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip) in rockchip_pcie_parse_dt() argument
29 struct device *dev = rockchip->dev; in rockchip_pcie_parse_dt()
31 struct device_node *node = dev->of_node; in rockchip_pcie_parse_dt()
35 if (rockchip->is_rc) { in rockchip_pcie_parse_dt()
[all …]
|
| D | pcie-rockchip-ep.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Rockchip AXI PCIe endpoint controller driver
5 * Copyright (c) 2018 Rockchip, Inc.
7 * Author: Shawn Lin <shawn.lin@rock-chips.com>
8 * Simon Xue <xxm@rock-chips.com>
18 #include <linux/pci-epc.h>
20 #include <linux/pci-epf.h>
24 #include "pcie-rockchip.h"
27 * struct rockchip_pcie_ep - private data for PCIe endpoint controller driver
28 * @rockchip: Rockchip PCIe controller
[all …]
|
| /linux-6.15/sound/soc/rockchip/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "ASoC support for Rockchip"
7 the Rockchip SoCs' Audio interfaces. You will also need to
11 tristate "Rockchip I2S Device Driver"
16 Rockchip I2S device. The device supports up to maximum of
20 tristate "Rockchip I2S/TDM Device Driver"
25 Rockchip I2S/TDM devices, found in Rockchip SoCs. These devices
31 tristate "Rockchip PDM Controller Driver"
37 Rockchip PDM Controller. The Controller supports up to maximum of
41 tristate "Rockchip SPDIF Device Driver"
[all …]
|
| D | rockchip_spdif.c | 1 // SPDX-License-Identifier: GPL-2.0-only
2 /* sound/soc/rockchip/rk_spdif.c
4 * ALSA SoC Audio Layer - Rockchip I2S Controller driver
6 * Copyright (c) 2014 Rockchip Electronics Co. Ltd.
7 * Author: Jianqun <jay.xu@rock-chips.com>
33 struct device *dev;
44 { .compatible = "rockchip,rk3066-spdif",
46 { .compatible = "rockchip,rk3188-spdif",
48 { .compatible = "rockchip,rk3228-spdif",
50 { .compatible = "rockchip,rk3288-spdif",
[all …]
|
| D | rockchip_i2s.c | 1 // SPDX-License-Identifier: GPL-2.0-only
2 /* sound/soc/rockchip/rockchip_i2s.c
4 * ALSA SoC Audio Layer - Rockchip I2S Controller driver
6 * Copyright (c) 2014 Rockchip Electronics Co. Ltd.
7 * Author: Jianqun <jay.xu@rock-chips.com>
24 #define DRV_NAME "rockchip-i2s"
32 struct device *dev;
66 if (!IS_ERR(i2s->pinctrl) && !IS_ERR_OR_NULL(i2s->bclk_on)) in i2s_pinctrl_select_bclk_on()
67 ret = pinctrl_select_state(i2s->pinctrl, i2s->bclk_on); in i2s_pinctrl_select_bclk_on()
70 dev_err(i2s->dev, "bclk enable failed %d\n", ret); in i2s_pinctrl_select_bclk_on()
[all …]
|
| /linux-6.15/Documentation/devicetree/bindings/pwm/ |
| D | pwm-rockchip.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pwm/pwm-rockchip.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip PWM controller
10 - Heiko Stuebner <heiko@sntech.de>
15 - const: rockchip,rk2928-pwm
16 - const: rockchip,rk3288-pwm
17 - const: rockchip,rk3328-pwm
18 - const: rockchip,vop-pwm
[all …]
|
| /linux-6.15/Documentation/devicetree/bindings/iommu/ |
| D | rockchip,iommu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/iommu/rockchip,iommu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip IOMMU
10 - Heiko Stuebner <heiko@sntech.de>
13 A Rockchip DRM iommu translates io virtual addresses to physical addresses for
14 its master device. Each slave device is bound to a single master device and
23 - enum:
24 - rockchip,iommu
[all …]
|
| /linux-6.15/Documentation/devicetree/bindings/display/rockchip/ |
| D | rockchip-drm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only)
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip-drm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip DRM master device
10 - Sandy Huang <hjc@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
14 The Rockchip DRM master device is a virtual device needed to list all
20 const: rockchip,display-subsystem
23 $ref: /schemas/types.yaml#/definitions/phandle-array
[all …]
|
| /linux-6.15/Documentation/devicetree/bindings/pinctrl/ |
| D | rockchip,pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/rockchip,pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip Pinmux Controller
10 - Heiko Stuebner <heiko@sntech.de>
13 The Rockchip Pinmux Controller enables the IC to share one PAD
18 Please refer to pinctrl-bindings.txt in this directory for details of the
22 The Rockchip pin configuration node is a node of a group of pins which can be
23 used for a specific device or function. This node represents both mux and
[all …]
|
| /linux-6.15/arch/arm/mach-rockchip/ |
| D | rockchip.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Device Tree support for Rockchip SoCs
24 if (of_machine_is_compatible("rockchip,rk3288")) { in rockchip_timer_init()
41 pr_err("rockchip: could not map timer7 registers\n"); in rockchip_timer_init()
55 "rockchip,rk2928",
56 "rockchip,rk3066a",
57 "rockchip,rk3066b",
58 "rockchip,rk3188",
59 "rockchip,rk3228",
60 "rockchip,rk3288",
[all …]
|
| /linux-6.15/Documentation/devicetree/bindings/sound/ |
| D | rockchip-max98090.txt | 1 ROCKCHIP with MAX98090 CODEC
4 - compatible: "rockchip,rockchip-audio-max98090"
5 - rockchip,model: The user-visible name of this sound complex
6 - rockchip,i2s-controller: The phandle of the Rockchip I2S controller that's
10 - rockchip,audio-codec: The phandle of the MAX98090 audio codec.
11 - rockchip,headset-codec: The phandle of Ext chip for jack detection. This is
12 required if there is rockchip,audio-codec.
13 - rockchip,hdmi-codec: The phandle of HDMI device for HDMI codec.
17 /* For max98090-only board. */
19 compatible = "rockchip,rockchip-audio-max98090";
[all …]
|
| /linux-6.15/drivers/devfreq/ |
| D | rk3399_dmc.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2016, Fuzhou Rockchip Electronics Co., Ltd.
4 * Author: Lin Huang <hl@rock-chips.com>
7 #include <linux/arm-smccc.h>
12 #include <linux/devfreq-event.h>
24 #include <soc/rockchip/pm_domains.h>
25 #include <soc/rockchip/rockchip_grf.h>
26 #include <soc/rockchip/rk3399_grf.h>
27 #include <soc/rockchip/rockchip_sip.h>
41 struct device *dev;
[all …]
|
| /linux-6.15/drivers/mfd/ |
| D | rk8xx-i2c.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Rockchip RK805/RK808/RK816/RK817/RK818 Core (I2C) driver
5 * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
8 * Author: Chris Zhong <zyw@rock-chips.com>
9 * Author: Zhang Qing <zhangqing@rock-chips.com>
24 static bool rk806_is_volatile_reg(struct device *dev, unsigned int reg) in rk806_is_volatile_reg()
35 static bool rk808_is_volatile_reg(struct device *dev, unsigned int reg) in rk808_is_volatile_reg()
39 * - Technically the ROUND_30s bit makes RTC_CTRL_REG volatile, but in rk808_is_volatile_reg()
41 * - It's unlikely we care that RK808_DEVCTRL_REG is volatile since in rk808_is_volatile_reg()
63 static bool rk816_is_volatile_reg(struct device *dev, unsigned int reg) in rk816_is_volatile_reg()
[all …]
|
| /linux-6.15/Documentation/devicetree/bindings/i2c/ |
| D | i2c-rk3x.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-rk3x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip RK3xxx I2C controller
10 This driver interfaces with the native I2C controller present in Rockchip
14 - $ref: /schemas/i2c/i2c-controller.yaml#
17 - Heiko Stuebner <heiko@sntech.de>
23 - const: rockchip,rv1108-i2c
24 - const: rockchip,rk3066-i2c
[all …]
|
| /linux-6.15/arch/arm64/boot/dts/rockchip/ |
| D | rk3368.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3368-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3368-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
16 compatible = "rockchip,rk3368";
[all …]
|
| /linux-6.15/drivers/nvmem/ |
| D | rockchip-efuse.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Rockchip eFuse Driver
5 * Copyright (c) 2015 Rockchip Electronics Co. Ltd.
6 * Author: Caesar Wang <wxt@rock-chips.com>
11 #include <linux/device.h>
14 #include <linux/nvmem-provider.h>
50 struct device *dev;
62 ret = clk_prepare_enable(efuse->clk); in rockchip_rk3288_efuse_read()
64 dev_err(efuse->dev, "failed to prepare/enable efuse clk\n"); in rockchip_rk3288_efuse_read()
68 writel(RK3288_LOAD | RK3288_PGENB, efuse->base + REG_EFUSE_CTRL); in rockchip_rk3288_efuse_read()
[all …]
|
| /linux-6.15/arch/arm/boot/dts/rockchip/ |
| D | rk3288-veyron-mickey.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Google Veyron Mickey Rev 0 board device tree source
8 /dts-v1/;
9 #include "rk3288-veyron.dtsi"
10 #include "rk3288-veyron-broadcom-bluetooth.dtsi"
14 compatible = "google,veyron-mickey-rev8", "google,veyron-mickey-rev7",
15 "google,veyron-mickey-rev6", "google,veyron-mickey-rev5",
16 "google,veyron-mickey-rev4", "google,veyron-mickey-rev3",
17 "google,veyron-mickey-rev2", "google,veyron-mickey-rev1",
18 "google,veyron-mickey-rev0", "google,veyron-mickey",
[all …]
|
| /linux-6.15/Documentation/devicetree/bindings/phy/ |
| D | rockchip,inno-usb2phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/phy/rockchip,inno-usb2phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip USB2.0 phy with inno IP block
10 - Heiko Stuebner <heiko@sntech.de>
15 - rockchip,px30-usb2phy
16 - rockchip,rk3128-usb2phy
17 - rockchip,rk3228-usb2phy
18 - rockchip,rk3308-usb2phy
[all …]
|
| D | phy-rockchip-typec.txt | 1 * ROCKCHIP type-c PHY
2 ---------------------
5 - compatible : must be "rockchip,rk3399-typec-phy"
6 - reg: Address and length of the usb phy control register set
7 - rockchip,grf : phandle to the syscon managing the "general
9 - clocks : phandle + clock specifier for the phy clocks
10 - clock-names : string, clock name, must be "tcpdcore", "tcpdphy-ref";
11 - assigned-clocks: main clock, should be <&cru SCLK_UPHY0_TCPDCORE> or
13 - assigned-clock-rates : the phy core clk frequency, shall be: 50000000
14 - resets : a list of phandle + reset specifier pairs
[all …]
|
| /linux-6.15/drivers/gpu/drm/ci/ |
| D | test.yml | 1 .lava-test:
3 - .container+build-rules
6 - !reference [.scheduled_pipeline-rules, rules]
7 - !reference [.collabora-farm-rules, rules]
8 - when: on_success
11 - rm -rf install
12 - tar -xf artifacts/install.tar
13 - mv -n install/* artifacts/.
14 # Override it with our lava-submit.sh script
15 - ./artifacts/lava-submit.sh
[all …]
|
| /linux-6.15/drivers/gpu/drm/rockchip/ |
| D | rockchip_drm_drv.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) Rockchip Electronics Co., Ltd.
4 * Author:Mark Yao <mark.yao@rock-chips.com>
10 #include <linux/dma-mapping.h>
29 #include <asm/dma-iommu.h>
40 #define DRIVER_NAME "rockchip"
41 #define DRIVER_DESC "RockChip Soc DRM"
48 * Attach a (component) device to the shared drm dma mapping from master drm
49 * device. This is used by the VOPs to map GEM buffers to a common DMA
53 struct device *dev) in rockchip_drm_dma_attach_device()
[all …]
|
| /linux-6.15/Documentation/devicetree/bindings/mfd/ |
| D | rockchip,rk817.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rockchip,rk817.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chris Zhong <zyw@rock-chips.com>
11 - Zhang Qing <zhangqing@rock-chips.com>
14 Rockchip RK809/RK817 series PMIC. This device consists of an i2c controlled
21 - rockchip,rk809
22 - rockchip,rk817
30 '#clock-cells':
[all …]
|
| /linux-6.15/Documentation/devicetree/bindings/ata/ |
| D | rockchip,dwc-ahci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ata/rockchip,dwc-ahci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DWC AHCI SATA controller for Rockchip devices
10 - Serge Semin <fancer.lancer@gmail.com>
13 This document defines device tree bindings for the Synopsys DWC
14 implementation of the AHCI SATA controller found in Rockchip
22 - rockchip,rk3568-dwc-ahci
23 - rockchip,rk3588-dwc-ahci
[all …]
|