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/linux-5.10/arch/arm/boot/dts/
Diwg20d-q7-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the iWave-RZ/G1M/G1N Qseven carrier board
9 * SSI-SGTL5000
40 stdout-path = "serial0:115200n8";
44 compatible = "fixed-clock";
45 #clock-cells = <0>;
46 clock-frequency = <26000000>;
50 compatible = "pwm-backlight";
53 brightness-levels = <0 4 8 16 32 64 128 255>;
54 default-brightness-level = <7>;
[all …]
Dsuniv-f1c100s.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR X11)
8 #address-cells = <1>;
9 #size-cells = <1>;
10 interrupt-parent = <&intc>;
13 osc24M: clk-24M {
14 #clock-cells = <0>;
15 compatible = "fixed-clock";
16 clock-frequency = <24000000>;
17 clock-output-names = "osc24M";
20 osc32k: clk-32k {
[all …]
Dspear13xx.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #address-cells = <1>;
10 #size-cells = <1>;
11 interrupt-parent = <&gic>;
14 #address-cells = <1>;
15 #size-cells = <0>;
18 compatible = "arm,cortex-a9";
20 reg = <0>;
21 next-level-cache = <&L2>;
25 compatible = "arm,cortex-a9";
[all …]
Dhighbank.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright 2011-2012 Calxeda, Inc.
6 /dts-v1/;
14 #address-cells = <1>;
15 #size-cells = <1>;
18 #address-cells = <1>;
19 #size-cells = <0>;
22 compatible = "arm,cortex-a9";
24 reg = <0x900>;
25 next-level-cache = <&L2>;
[all …]
Dam335x-shc.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
11 #include <dt-bindings/input/input.h>
15 compatible = "ti,am335x-shc", "ti,am335x-bone", "ti,am33xx";
29 operating-points = <
34 voltage-tolerance = <2>; /* 2 percentage */
35 cpu0-supply = <&dcdc2_reg>;
40 compatible = "gpio-keys";
46 debounce-interval = <1000>;
47 wakeup-source;
[all …]
Dat91sam9n12ek.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9n12ek.dts - Device Tree file for AT91SAM9N12-EK board
8 /dts-v1/;
12 model = "Atmel AT91SAM9N12-EK";
17 stdout-path = "serial0:115200n8";
21 reg = <0x20000000 0x8000000>;
26 clock-frequency = <32768>;
30 clock-frequency = <16000000>;
46 compatible = "atmel,tcb-timer";
47 reg = <0>;
[all …]
Dkirkwood-dnskw.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include "kirkwood-6281.dtsi"
6 model = "D-Link DNS NASes (kirkwood-based)";
7 compatible = "dlink,dns-kirkwood", "marvell,kirkwood-88f6281", "marvell,kirkwood";
10 compatible = "gpio-keys";
11 #address-cells = <1>;
12 #size-cells = <0>;
13 pinctrl-0 = <&pmx_button_power &pmx_button_unmount
15 pinctrl-names = "default";
35 /* Fan: ADDA AD045HB-G73 40mm 6000rpm@5v */
[all …]
Daspeed-g4.dtsi1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/clock/aspeed-clock.h>
7 #address-cells = <1>;
8 #size-cells = <1>;
9 interrupt-parent = <&vic>;
35 #address-cells = <1>;
36 #size-cells = <0>;
39 compatible = "arm,arm926ej-s";
41 reg = <0>;
47 reg = <0x40000000 0>;
[all …]
Daspeed-bmc-arm-centriq2400-rep.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
9 compatible = "qualcomm,centriq2400-rep-bmc", "aspeed,ast2500";
12 stdout-path = &uart5;
17 reg = <0x80000000 0x40000000>;
20 iio-hwmon {
21 compatible = "iio-hwmon";
22 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
[all …]
Dimx6qdl-pico.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
9 #include <dt-bindings/gpio/gpio.h>
13 stdout-path = &uart1;
16 reg_2p5v: regulator-2p5v {
17 compatible = "regulator-fixed";
18 regulator-name = "2P5V";
19 regulator-min-microvolt = <2500000>;
20 regulator-max-microvolt = <2500000>;
21 regulator-always-on;
24 reg_3p3v: regulator-3p3v {
[all …]
Dkeystone-k2e-netcp.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2015-2017 Texas Instruments Incorporated - http://www.ti.com/
9 compatible = "ti,keystone-navigator-qmss";
10 dma-coherent;
11 #address-cells = <1>;
12 #size-cells = <1>;
15 queue-range = <0 0x2000>;
20 #address-cells = <1>;
21 #size-cells = <1>;
24 managed-queues = <0 0x2000>;
[all …]
/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dmeson,pinctrl.txt4 - compatible: one of "amlogic,meson8-cbus-pinctrl"
5 "amlogic,meson8b-cbus-pinctrl"
6 "amlogic,meson8m2-cbus-pinctrl"
7 "amlogic,meson8-aobus-pinctrl"
8 "amlogic,meson8b-aobus-pinctrl"
9 "amlogic,meson8m2-aobus-pinctrl"
10 "amlogic,meson-gxbb-periphs-pinctrl"
11 "amlogic,meson-gxbb-aobus-pinctrl"
12 "amlogic,meson-gxl-periphs-pinctrl"
13 "amlogic,meson-gxl-aobus-pinctrl"
[all …]
/linux-5.10/Documentation/devicetree/bindings/sound/
Dimg,parallel-out.txt5 - compatible : Compatible list, must contain "img,parallel-out".
7 - #sound-dai-cells : Must be equal to 0
9 - reg : Offset and length of the register set for the device.
11 - dmas: Contains an entry for each entry in dma-names.
13 - dma-names: Must include the following entry:
16 - clocks : Contains an entry for each entry in clock-names.
18 - clock-names : Includes the following entries:
22 - resets: Contains a phandle to the parallel out reset signal
24 - reset-names: Contains the reset signal name "rst"
28 - interrupts : Contains the parallel out interrupt, if present
[all …]
Dimg,spdif-out.txt5 - compatible : Compatible list, must contain "img,spdif-out"
7 - #sound-dai-cells : Must be equal to 0
9 - reg : Offset and length of the register set for the device
11 - dmas: Contains an entry for each entry in dma-names.
13 - dma-names: Must include the following entry:
16 - clocks : Contains an entry for each entry in clock-names.
18 - clock-names : Includes the following entries:
22 - resets: Contains a phandle to the spdif out reset signal
24 - reset-names: Contains the reset signal name "rst"
28 - interrupts : Contains the parallel out interrupt, if present
[all …]
Dmt8183-afe-pcm.txt4 - compatible = "mediatek,mt68183-audio";
5 - reg: register location and size
6 - interrupts: should contain AFE interrupt
7 - resets: Must contain an entry for each entry in reset-names
9 - reset-names: should have these reset names:
11 - power-domains: should define the power domain
12 - clocks: Must contain an entry for each entry in clock-names
13 - clock-names: should have these clock names:
23 afe: mt8183-afe-pcm@11220000 {
24 compatible = "mediatek,mt8183-audio";
[all …]
Dzte,zx-spdif.txt4 - compatible : Must be "zte,zx296702-spdif"
5 - reg : Must contain SPDIF core's registers location and length
6 - clocks : Pairs of phandle and specifier referencing the controller's clocks.
7 - clock-names: "tx" for the clock to the SPDIF interface.
8 - dmas: Pairs of phandle and specifier for the DMA channel that is used by
10 - dma-names : Must be "tx"
12 For more details on the 'dma', 'dma-names', 'clock' and 'clock-names' properties
14 * resource-names.txt
15 * clock/clock-bindings.txt
20 compatible = "zte,zx296702-spdif";
[all …]
/linux-5.10/Documentation/devicetree/bindings/iio/adc/
Dst,stm32-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
10 STM32 ADC is a successive approximation analog-to-digital converter.
13 stored in a left-aligned or right-aligned 32-bit data register.
17 voltage goes beyond the user-defined, higher or lower thresholds.
22 - Fabrice Gasnier <fabrice.gasnier@st.com>
27 - st,stm32f4-adc-core
28 - st,stm32h7-adc-core
[all …]
/linux-5.10/Documentation/devicetree/bindings/clock/
Dimx8m-clock.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/imx8m-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Anson Huang <Anson.Huang@nxp.com>
19 - fsl,imx8mm-ccm
20 - fsl,imx8mn-ccm
21 - fsl,imx8mp-ccm
22 - fsl,imx8mq-ccm
24 reg:
[all …]
/linux-5.10/Documentation/devicetree/bindings/usb/
Dqcom,dwc3.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manu Gautam <mgautam@codeaurora.org>
15 - enum:
16 - qcom,msm8996-dwc3
17 - qcom,msm8998-dwc3
18 - qcom,sc7180-dwc3
19 - qcom,sdm845-dwc3
20 - const: qcom,dwc3
[all …]
Dti,j721e-usb.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: "http://devicetree.org/schemas/usb/ti,j721e-usb.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: Bindings for the TI wrapper module for the Cadence USBSS-DRD controller
10 - Roger Quadros <rogerq@ti.com>
15 - const: ti,j721e-usb
17 reg:
20 power-domains:
24 Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt
[all …]
/linux-5.10/arch/arm64/boot/dts/renesas/
Dr8a774c0-cat874.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/display/tda998x.h>
15 compatible = "si-linux,cat874", "renesas,r8a774c0";
24 stdout-path = "serial0:115200n8";
27 hdmi-out {
28 compatible = "hdmi-connector";
33 remote-endpoint = <&tda19988_out>;
39 compatible = "gpio-leds";
[all …]
/linux-5.10/arch/arm64/boot/dts/marvell/
Darmada-3720-db.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * (DB-88F3720-DDR3)
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
14 /dts-v1/;
16 #include <dt-bindings/gpio/gpio.h>
17 #include "armada-372x.dtsi"
20 model = "Marvell Armada 3720 Development Board DB-88F3720-DDR3";
21 compatible = "marvell,armada-3720-db", "marvell,armada3720", "marvell,armada3710";
24 stdout-path = "serial0:115200n8";
29 reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
[all …]
/linux-5.10/Documentation/devicetree/bindings/mtd/
Dmtk-nand.txt15 - compatible: Should be one of
16 "mediatek,mt2701-nfc",
17 "mediatek,mt2712-nfc",
18 "mediatek,mt7622-nfc".
19 - reg: Base physical address and size of NFI.
20 - interrupts: Interrupts of NFI.
21 - clocks: NFI required clocks.
22 - clock-names: NFI clocks internal name.
23 - ecc-engine: Required ECC Engine node.
24 - #address-cells: NAND chip index, should be 1.
[all …]
/linux-5.10/Documentation/devicetree/bindings/media/
Dimx7-mipi-csi2.txt5 --------------
7 This is the device node for the MIPI CSI-2 receiver core in i.MX7 SoC. It is
8 compatible with previous version of Samsung D-phy.
12 - compatible : "fsl,imx7-mipi-csi2";
13 - reg : base address and length of the register set for the device;
14 - interrupts : should contain MIPI CSIS interrupt;
15 - clocks : list of clock specifiers, see
16 Documentation/devicetree/bindings/clock/clock-bindings.txt for details;
17 - clock-names : must contain "pclk", "wrap" and "phy" entries, matching
19 - power-domains : a phandle to the power domain, see
[all …]
/linux-5.10/Documentation/devicetree/bindings/timer/
Dsnps,dw-apb-timer.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/timer/snps,dw-apb-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Daniel Lezcano <daniel.lezcano@linaro.org>
15 - const: snps,dw-apb-timer
16 - enum:
17 - snps,dw-apb-timer-sp
18 - snps,dw-apb-timer-osc
21 reg:
[all …]

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