Searched +full:reg +full:- +full:names (Results 626 – 650 of 2811) sorted by relevance
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/linux-6.8/Documentation/devicetree/bindings/remoteproc/ |
D | qcom,wcnss-pil.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/qcom,wcnss-pil.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <andersson@kernel.org> 21 - items: 22 - enum: 23 - qcom,pronto-v1-pil 24 - qcom,pronto-v2-pil 25 - qcom,pronto-v3-pil [all …]
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D | qcom,msm8916-mss-pil.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/qcom,msm8916-mss-pil.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Stephan Gerhold <stephan@gerhold.net> 19 - enum: 20 - qcom,msm8909-mss-pil 21 - qcom,msm8916-mss-pil 22 - qcom,msm8953-mss-pil 23 - qcom,msm8974-mss-pil [all …]
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/linux-6.8/arch/arm/boot/dts/microchip/ |
D | at91-tse850-3.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * at91-tse850-3.dts - Device Tree file for the Axentia TSE-850 3.0 board 9 /dts-v1/; 10 #include <dt-bindings/pwm/pwm.h> 11 #include "at91-linea.dtsi" 14 model = "Axentia TSE-850 3.0"; 19 compatible = "fixed-clock"; 21 #clock-cells = <0>; 22 clock-frequency = <16000000>; 23 clock-output-names = "sck"; [all …]
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D | at91-sama5d2_icp.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * at91-sama5d2_icp.dts - Device Tree file for SAMA5D2-ICP board 11 /dts-v1/; 13 #include "sama5d2-pinfunc.h" 14 #include <dt-bindings/gpio/gpio.h> 15 #include <dt-bindings/input/input.h> 16 #include <dt-bindings/mfd/atmel-flexcom.h> 19 model = "Microchip SAMA5D2-ICP"; 20 compatible = "microchip,sama5d2-icp", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5"; 32 stdout-path = "serial0:115200n8"; [all …]
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D | at91-sam9x60_curiosity.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * at91-sam9x60_curiosity.dts - Device Tree file for Microchip SAM9X60 Curiosity board 9 /dts-v1/; 11 #include <dt-bindings/input/input.h> 15 compatible = "microchip,sam9x60-curiosity", "microchip,sam9x60", "atmel,at91sam9"; 24 stdout-path = "serial0:115200n8"; 28 reg = <0x20000000 0x8000000>; 33 clock-frequency = <32768>; 37 clock-frequency = <24000000>; 41 gpio-keys { [all …]
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/linux-6.8/arch/arm/boot/dts/renesas/ |
D | r8a7792-wheat.dts | 1 // SPDX-License-Identifier: GPL-2.0 9 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/input.h> 24 stdout-path = "serial0:115200n8"; 29 reg = <0 0x40000000 0 0x40000000>; 32 d1_8v: regulator-1v8 { 33 compatible = "regulator-fixed"; 34 regulator-name = "D1.8V"; 35 regulator-min-microvolt = <1800000>; [all …]
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D | r8a7740.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Mobile A1 (R8A77400) SoC 8 #include <dt-bindings/clock/r8a7740-clock.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 14 interrupt-parent = <&gic>; 15 #address-cells = <1>; 16 #size-cells = <1>; 19 #address-cells = <1>; 20 #size-cells = <0>; [all …]
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/linux-6.8/arch/arm/boot/dts/nxp/imx/ |
D | imx27-phytec-phycore-rdk.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 5 #include "imx27-phytec-phycore-som.dtsi" 9 compatible = "phytec,imx27-pcm970", "phytec,imx27-pcm038", "fsl,imx27"; 12 stdout-path = &uart1; 16 model = "Sharp-LQ035Q7"; 17 bits-per-pixel = <16>; 20 display-timings { 21 native-mode = <&timing0>; 23 clock-frequency = <5500000>; 26 hback-porch = <5>; [all …]
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D | imx6dl-yapp43-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/leds/common.h> 9 #include <dt-bindings/pwm/pwm.h> 20 compatible = "pwm-backlight"; 22 brightness-levels = <0 32 64 128 255>; 23 default-brightness-level = <32>; 24 num-interpolated-steps = <8>; [all …]
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D | imx6qp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 10 compatible = "mmio-sram"; 11 reg = <0x00940000 0x20000>; 13 #address-cells = <1>; 14 #size-cells = <1>; 19 compatible = "mmio-sram"; 20 reg = <0x00960000 0x20000>; 22 #address-cells = <1>; 23 #size-cells = <1>; 29 compatible = "fsl,imx6qp-pre"; [all …]
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D | imx6qdl-nitrogen6x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR X11 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 12 stdout-path = &uart2; 17 reg = <0x10000000 0x40000000>; 20 reg_2p5v: regulator-2p5v { 21 compatible = "regulator-fixed"; 22 regulator-name = "2P5V"; 23 regulator-min-microvolt = <2500000>; 24 regulator-max-microvolt = <2500000>; [all …]
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/linux-6.8/arch/arm/boot/dts/nxp/mxs/ |
D | imx28-evk.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 5 /dts-v1/; 10 compatible = "fsl,imx28-evk", "fsl,imx28"; 14 reg = <0x40000000 0x08000000>; 18 reg_3p3v: regulator-3p3v { 19 compatible = "regulator-fixed"; 20 regulator-name = "3P3V"; 21 regulator-min-microvolt = <3300000>; 22 regulator-max-microvolt = <3300000>; 23 regulator-always-on; [all …]
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/linux-6.8/Documentation/devicetree/bindings/display/msm/ |
D | qcom,sm8250-dpu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8250-dpu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org> 12 $ref: /schemas/display/msm/dpu-common.yaml# 16 const: qcom,sm8250-dpu 18 reg: 20 - description: Address offset and size for mdp register set 21 - description: Address offset and size for vbif register set [all …]
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D | qcom,msm8998-dpu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,msm8998-dpu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> 12 $ref: /schemas/display/msm/dpu-common.yaml# 16 const: qcom,msm8998-dpu 18 reg: 20 - description: Address offset and size for mdp register set 21 - description: Address offset and size for regdma register set [all …]
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D | qcom,sm6115-dpu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6115-dpu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org> 12 $ref: /schemas/display/msm/dpu-common.yaml# 16 const: qcom,sm6115-dpu 18 reg: 20 - description: MDP register set 21 - description: VBIF register set [all …]
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D | qcom,qcm2290-dpu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,qcm2290-dpu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Loic Poulain <loic.poulain@linaro.org> 12 $ref: /schemas/display/msm/dpu-common.yaml# 16 const: qcom,qcm2290-dpu 18 reg: 20 - description: Address offset and size for mdp register set 21 - description: Address offset and size for vbif register set [all …]
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/linux-6.8/arch/arm64/boot/dts/sprd/ |
D | sharkl3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 9 interrupt-parent = <&gic>; 10 #address-cells = <2>; 11 #size-cells = <2>; 14 compatible = "simple-bus"; 15 #address-cells = <2>; 16 #size-cells = <2>; 20 compatible = "sprd,sc9863a-glbregs", "syscon", 21 "simple-mfd"; 22 reg = <0 0x20e00000 0 0x4000>; [all …]
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/linux-6.8/Documentation/devicetree/bindings/spi/ |
D | spi-nxp-fspi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/spi-nxp-fspi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Han Xu <han.xu@nxp.com> 11 - Kuldeep Singh <singh.kuldeep87k@gmail.com> 14 - $ref: spi-controller.yaml# 19 - nxp,imx8dxl-fspi 20 - nxp,imx8mm-fspi 21 - nxp,imx8mp-fspi [all …]
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/linux-6.8/Documentation/devicetree/bindings/pci/ |
D | ti,j721e-pci-host.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 # Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ 4 --- 5 $id: http://devicetree.org/schemas/pci/ti,j721e-pci-host.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Kishon Vijay Abraham I <kishon@ti.com> 16 - const: ti,j721e-pcie-host 17 - const: ti,j784s4-pcie-host 18 - description: PCIe controller in AM64 20 - const: ti,am64-pcie-host [all …]
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/linux-6.8/arch/arm/boot/dts/st/ |
D | stm32mp157c-ev1.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved 6 /dts-v1/; 8 #include "stm32mp157c-ed1.dts" 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/media/video-interfaces.h> 15 compatible = "st,stm32mp157c-ev1", "st,stm32mp157c-ed1", "st,stm32mp157"; 23 stdout-path = "serial0:115200n8"; 27 clk_ext_camera: clk-ext-camera { [all …]
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D | stm32mp15xx-dhcor-testbench.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) 17 stdout-path = "serial0:115200n8"; 20 sd_switch: regulator-sd_switch { 21 compatible = "regulator-gpio"; 22 regulator-name = "sd_switch"; 23 regulator-min-microvolt = <1800000>; 24 regulator-max-microvolt = <2900000>; 25 regulator-type = "voltage"; 26 regulator-always-on; 29 gpios-states = <0>; [all …]
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/linux-6.8/arch/arm/boot/dts/arm/ |
D | vexpress-v2p-ca5s.dts | 1 // SPDX-License-Identifier: GPL-2.0 6 * Cortex-A5 MPCore (V2P-CA5s) 8 * HBI-0225B 11 /dts-v1/; 12 #include "vexpress-v2m-rs1.dtsi" 15 model = "V2P-CA5s"; 18 compatible = "arm,vexpress,v2p-ca5s", "arm,vexpress"; 19 interrupt-parent = <&gic>; 20 #address-cells = <1>; 21 #size-cells = <1>; [all …]
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/linux-6.8/arch/arm/boot/dts/ti/omap/ |
D | am3517.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 11 /delete-node/ &aes1_target; 12 /delete-node/ &aes2_target; 24 operating-points-v2 = <&cpu0_opp_table>; 26 clock-latency = <300000>; /* From legacy driver */ 30 cpu0_opp_table: opp-table { 31 compatible = "operating-points-v2-ti-cpu"; 38 opp-50-300000000 { 40 opp-hz = /bits/ 64 <300000000>; [all …]
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/linux-6.8/Documentation/devicetree/bindings/net/ |
D | microchip,sparx5-switch.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/net/microchip,sparx5-switch.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Steen Hegelund <steen.hegelund@microchip.com> 11 - Lars Povlsen <lars.povlsen@microchip.com> 14 The SparX-5 Enterprise Ethernet switch family provides a rich set of 15 Enterprise switching features such as advanced TCAM-based VLAN and 17 security through TCAM-based frame processing using versatile content 25 forwarding (uRPF) tasks. Additional L3 features include VRF-Lite and [all …]
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/linux-6.8/Documentation/devicetree/bindings/dsp/ |
D | fsl,dsp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Daniel Baluta <daniel.baluta@nxp.com> 11 - Shengjiu Wang <shengjiu.wang@nxp.com> 15 advanced pre- and post- audio processing. 20 - fsl,imx8qxp-dsp 21 - fsl,imx8qm-dsp 22 - fsl,imx8mp-dsp 23 - fsl,imx8ulp-dsp [all …]
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