Lines Matching +full:reg +full:- +full:names

1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
10 			compatible = "mmio-sram";
11 			reg = <0x00940000 0x20000>;
13 			#address-cells = <1>;
14 			#size-cells = <1>;
19 			compatible = "mmio-sram";
20 			reg = <0x00960000 0x20000>;
22 			#address-cells = <1>;
23 			#size-cells = <1>;
29 				compatible = "fsl,imx6qp-pre";
30 				reg = <0x021c8000 0x1000>;
33 				clock-names = "axi";
38 				compatible = "fsl,imx6qp-pre";
39 				reg = <0x021c9000 0x1000>;
42 				clock-names = "axi";
47 				compatible = "fsl,imx6qp-pre";
48 				reg = <0x021ca000 0x1000>;
51 				clock-names = "axi";
56 				compatible = "fsl,imx6qp-pre";
57 				reg = <0x021cb000 0x1000>;
60 				clock-names = "axi";
65 				compatible = "fsl,imx6qp-prg";
66 				reg = <0x021cc000 0x1000>;
69 				clock-names = "ipg", "axi";
74 				compatible = "fsl,imx6qp-prg";
75 				reg = <0x021cd000 0x1000>;
78 				clock-names = "ipg", "axi";
91 	compatible = "fsl,imx6qp-gpc", "fsl,imx6q-gpc";
95 	compatible = "fsl,imx6qp-ipu", "fsl,imx6q-ipu";
100 	compatible = "fsl,imx6qp-ipu", "fsl,imx6q-ipu";
109 	clock-names = "di0_pll", "di1_pll",
115 	compatible = "fsl,imx6qp-mmdc", "fsl,imx6q-mmdc";
119 	compatible = "fsl,imx6qp-pcie";