| /linux-6.8/sound/pci/emu10k1/ |
| D | emu10k1_main.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * James Courtier-Dutton <James@superbug.co.uk>
85 if (emu->audigy) { in snd_emu10k1_voice_init()
128 { 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */
146 HCFG_MUTEBUTTONENABLE, emu->port + HCFG); in snd_emu10k1_init()
148 outl(0, emu->port + INTE); in snd_emu10k1_init()
169 if (emu->audigy) { in snd_emu10k1_init()
182 SPCS0, emu->spdif_bits[0], in snd_emu10k1_init()
183 SPCS1, emu->spdif_bits[1], in snd_emu10k1_init()
184 SPCS2, emu->spdif_bits[2], in snd_emu10k1_init()
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| /linux-6.8/drivers/acpi/acpica/ |
| D | aclocal.h | 1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
4 * Name: aclocal.h - Internal data types used across the ACPI subsystem
6 * Copyright (C) 2000 - 2023, Intel Corp.
13 /* acpisrc:struct_defs -- for acpisrc conversion */
18 #define ACPI_GLOBAL_LOCK (acpi_semaphore) (-1)
126 * The node is optimized for both 32-bit and 64-bit platforms:
127 * 20 bytes for the 32-bit case, 32 bytes for the 64-bit case.
167 #define ANOBJ_NODE_EARLY_INIT 0x80 /* acpi_exec only: Node was create via init file (-fi)…
174 /* Internal ACPI table management - master table list */
215 /* Info structure used to convert external<->internal namestrings */
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| /linux-6.8/arch/arm/boot/dts/nvidia/ |
| D | tegra30-beaver.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
5 #include "tegra30-cpu-opp.dtsi"
6 #include "tegra30-cpu-opp-microvolt.dtsi"
19 stdout-path = "serial0:115200n8";
23 reg = <0x80000000 0x7ff00000>;
29 avdd-pexa-supply = <&ldo1_reg>;
30 vdd-pexa-supply = <&ldo1_reg>;
31 avdd-pexb-supply = <&ldo1_reg>;
32 vdd-pexb-supply = <&ldo1_reg>;
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| /linux-6.8/drivers/clk/bcm/ |
| D | clk-bcm2835.c | 1 // SPDX-License-Identifier: GPL-2.0+
27 #include <linux/clk-provider.h>
38 #include <dt-bindings/clock/bcm2835.h>
45 # define CM_DIV_FRAC_MASK GENMASK(CM_DIV_FRAC_BITS - 1, 0)
253 # define A2W_PLL_FRAC_MASK ((1 << A2W_PLL_FRAC_BITS) - 1)
300 * Names of clocks used within the driver that need to be replaced
321 * Real names of cprman clock parents looked up through
335 static inline void cprman_write(struct bcm2835_cprman *cprman, u32 reg, u32 val) in cprman_write() argument
337 writel(CM_PASSWORD | val, cprman->regs + reg); in cprman_write()
340 static inline u32 cprman_read(struct bcm2835_cprman *cprman, u32 reg) in cprman_read() argument
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| /linux-6.8/kernel/trace/ |
| D | trace.h | 1 // SPDX-License-Identifier: GPL-2.0
179 * The CPU trace array - it consists of thousands of trace entries
261 * struct cond_snapshot - conditional snapshot data and callback
271 * the trace_array. Because the tr->max_lock is held throughout the
273 * cond_snapshot and cond_data associated with the per-instance
282 * user-defined cond_data by tracing_cond_snapshot_enable().
290 * callback function is invoked with the tr->max_lock held. The
304 * struct trace_func_repeats - used to keep track of the consecutive
315 * The trace array - an array of per-CPU trace arrays. This is the
453 WARN_ON(!(tr->flags & TRACE_ARRAY_FL_GLOBAL)); in top_trace_array()
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| /linux-6.8/drivers/iio/adc/ |
| D | stm32-adc.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
12 #include <linux/dma-mapping.h>
16 #include <linux/iio/timer/stm32-lptim-trigger.h>
17 #include <linux/iio/timer/stm32-timer-trigger.h>
26 #include <linux/nvmem-consumer.h>
31 #include "stm32-adc-core.h"
58 /* extsel - trigger mux selection value */
84 STM32_ADC_INT_CH_NONE = -1,
94 * struct stm32_adc_ic - ADC internal channels
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| /linux-6.8/sound/soc/codecs/ |
| D | lpass-va-macro.c | 1 // SPDX-License-Identifier: GPL-2.0-only
2 // Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
5 #include <linux/clk-provider.h>
16 #include <sound/soc-dapm.h>
19 #include "lpass-macro-common.h"
165 static const DECLARE_TLV_DB_SCALE(digital_gain, -8400, 100, -8400);
238 static bool va_is_volatile_register(struct device *dev, unsigned int reg) in va_is_volatile_register() argument
240 switch (reg) { in va_is_volatile_register()
335 static bool va_is_rw_register(struct device *dev, unsigned int reg) in va_is_rw_register() argument
337 switch (reg) { in va_is_rw_register()
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| D | lpass-wsa-macro.c | 1 // SPDX-License-Identifier: GPL-2.0-only
2 // Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
11 #include <linux/clk-provider.h>
13 #include <sound/soc-dapm.h>
18 #include "lpass-macro-common.h"
19 #include "lpass-wsa-macro.h"
314 {24000, -EINVAL},/* 24K */
362 static const DECLARE_TLV_DB_SCALE(digital_gain, -8400, 100, -8400);
602 unsigned int reg) in wsa_is_wronly_register() argument
604 switch (reg) { in wsa_is_wronly_register()
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| /linux-6.8/drivers/net/wireless/ath/ath5k/ |
| D | mac80211-ops.c | 1 /*-
2 * Copyright (c) 2002-2005 Sam Leffler, Errno Consulting
3 * Copyright (c) 2004-2005 Atheros Communications, Inc.
21 * 3. Neither the names of the above-listed copyright holders nor the names
51 #include "reg.h"
61 struct ath5k_hw *ah = hw->priv; in ath5k_tx()
64 if (WARN_ON(qnum >= ah->ah_capabilities.cap_queues.q_tx_num)) { in ath5k_tx()
69 ath5k_tx_queue(hw, skb, &ah->txqs[qnum], control); in ath5k_tx()
76 struct ath5k_hw *ah = hw->priv; in ath5k_add_interface()
78 struct ath5k_vif *avf = (void *)vif->drv_priv; in ath5k_add_interface()
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| /linux-6.8/drivers/gpu/drm/i915/display/ |
| D | intel_dmc.c | 38 * low-power state and comes back to normal.
71 return i915->display.dmc.dmc; in i915_to_dmc()
84 * unversioned file names.
146 #define PIPE_TO_DMC_ID(pipe) (DMC_FW_PIPEA + ((pipe) - PIPE_A))
201 /* Sub-stepping (0, 1, ..., *). * is a wildcard */
300 return dmc && dmc->dmc_info[dmc_id].payload; in has_dmc_id_fw()
314 si->stepping = step_name[0]; in intel_get_stepping_info()
315 si->substepping = step_name[1]; in intel_get_stepping_info()
342 /* TODO: disable the event handlers on pre-GEN12 platforms as well */ in disable_all_event_handlers()
364 * Wa_16015201720:adl-p,dg2 in adlp_pipedmc_clock_gating_wa()
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| /linux-6.8/drivers/gpu/drm/vmwgfx/ |
| D | vmwgfx_drv.c | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT
4 * Copyright 2009-2023 VMware, Inc., Palo Alto, CA., USA
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
52 #include <linux/dma-mapping.h>
284 MODULE_PARM_DESC(assume_16bpp, "Assume 16-bpp when filtering modes");
325 { SVGA_CAP2_SCREENDMA_REG, "screendma reg" },
350 ARRAY_SIZE(buf) - offset, in vmw_print_bitmap()
364 static const char *names[] = { in vmw_print_sm_type() local
372 BUILD_BUG_ON(ARRAY_SIZE(names) != (VMW_SM_MAX + 1)); in vmw_print_sm_type()
373 drm_info(&dev_priv->drm, "Available shader model: %s.\n", in vmw_print_sm_type()
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| /linux-6.8/tools/arch/arm64/include/asm/ |
| D | sysreg.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
15 #include <asm/gpr-num.h>
21 * [20-19] : Op0
22 * [18-16] : Op1
23 * [15-12] : CRn
24 * [11-8] : CRm
25 * [7-5] : Op2
82 * As per Arm ARM for v8-A, Section "C.5.1.3 op0 == 0b00, architectural hints,
132 #include "asm/sysreg-defs.h"
320 * n: 0-15
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| /linux-6.8/drivers/phy/rockchip/ |
| D | phy-rockchip-inno-usb2.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #include <linux/clk-provider.h>
11 #include <linux/extcon-provider.h>
50 * enum usb_chg_state - Different states involved in USB charger detection.
89 * struct rockchip_chg_det_reg - usb charger detect registers
115 * struct rockchip_usb2phy_port_cfg - usb-phy port configuration.
169 * struct rockchip_usb2phy_cfg - usb-phy configuration.
170 * @reg: the address offset of grf for usb-phy config.
174 * @port_cfgs: usb-phy port configurations.
178 unsigned int reg; member
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| /linux-6.8/arch/arm64/boot/dts/nvidia/ |
| D | tegra210-p2597.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
23 avdd-dsi-csi-supply = <&vdd_dsi_csi>;
33 avdd-io-hdmi-dp-supply = <&avdd_1v05>;
34 vdd-hdmi-dp-pll-supply = <&vdd_1v8>;
35 hdmi-supply = <&vdd_hdmi>;
37 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
38 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(CC, 1)
[all …]
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| /linux-6.8/drivers/ntb/hw/intel/ |
| D | ntb_hw_gen1.c | 9 * Copyright (C) 2016 T-Platforms. All Rights Reserved.
19 * Copyright (C) 2016 T-Platforms. All Rights Reserved.
31 * * Neither the name of Intel Corporation nor the names of its
66 #define NTB_DESC "Intel(R) PCI-E Non-Transparent Bridge Driver"
75 #define bar2_off(base, bar) bar0_off(base, (bar) - 2)
88 static int b2b_mw_idx = -1;
105 "XEON B2B USD BAR 2 64-bit address");
110 "XEON B2B USD BAR 4 64-bit address");
115 "XEON B2B USD split-BAR 4 32-bit address");
120 "XEON B2B USD split-BAR 5 32-bit address");
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| /linux-6.8/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ |
| D | r535.c | 49 #include <nvrm/535.113.01/nvidia/generated/g_rpc-structures.h>
79 return -EAGAIN; in r535_rpc_status_to_errno()
81 return -ENOMEM; in r535_rpc_status_to_errno()
83 return -EINVAL; in r535_rpc_status_to_errno()
91 u32 size, rptr = *gsp->msgq.rptr; in r535_gsp_msgq_wait()
97 if (WARN_ON(!size || size >= gsp->msgq.cnt)) in r535_gsp_msgq_wait()
98 return ERR_PTR(-EINVAL); in r535_gsp_msgq_wait()
101 u32 wptr = *gsp->msgq.wptr; in r535_gsp_msgq_wait()
103 used = wptr + gsp->msgq.cnt - rptr; in r535_gsp_msgq_wait()
104 if (used >= gsp->msgq.cnt) in r535_gsp_msgq_wait()
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| /linux-6.8/drivers/net/ethernet/marvell/ |
| D | sky2.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
30 /* Yukon-2 */
32 PCI_Y2_PIG_ENA = 1<<31, /* Enable Plug-in-Go (YUKON-2) */
33 PCI_Y2_DLL_DIS = 1<<30, /* Disable PCI DLL (YUKON-2) */
34 PCI_SW_PWR_ON_RST= 1<<30, /* SW Power on Reset (Yukon-EX) */
35 PCI_Y2_PHY2_COMA = 1<<29, /* Set PHY 2 to Coma Mode (YUKON-2) */
36 PCI_Y2_PHY1_COMA = 1<<28, /* Set PHY 1 to Coma Mode (YUKON-2) */
37 PCI_Y2_PHY2_POWD = 1<<27, /* Set PHY 2 to Power Down (YUKON-2) */
38 PCI_Y2_PHY1_POWD = 1<<26, /* Set PHY 1 to Power Down (YUKON-2) */
60 /* PCI_OUR_REG_3 32 bit Our Register 3 (Yukon-ECU only) */
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| /linux-6.8/drivers/tty/serial/ |
| D | max310x.c | 1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2012-2016 Alexander Shiyan <shc_work@mail.ru>
104 #define MAX310X_SPCHR_MULTIDROP_BIT (1 << 5) /* 9-bit multidrop addr char */
117 #define MAX310X_MODE1_TXHIZ_BIT (1 << 2) /* TX pin three-state */
118 #define MAX310X_MODE1_RTSHIZ_BIT (1 << 3) /* RTS pin three-state */
131 #define MAX310X_MODE2_MULTIDROP_BIT (1 << 6) /* 9-bit multidrop enable */
139 * 00 -> 5 bit words
140 * 01 -> 6 bit words
141 * 10 -> 7 bit words
142 * 11 -> 8 bit words
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| /linux-6.8/drivers/net/ethernet/amd/xgbe/ |
| D | xgbe-phy-v2.c | 70 * names of its contributors may be used to endorse or promote products
125 #include "xgbe-common.h"
149 /* Rate-change complete wait/retry count */
276 ((_x)->extd[XGBE_SFP_EXTD_SFF_8472] && \
277 !((_x)->extd[XGBE_SFP_EXTD_DIAG] & XGBE_SFP_EXTD_DIAG_ADDR_CHANGE))
284 #define XGBE_BEL_FUSE_VENDOR "BEL-FUSE "
285 #define XGBE_BEL_FUSE_PARTNO "1GBT-SFP06 "
306 /* Re-driver related definitions */
375 /* Re-driver support */
399 return pdata->i2c_if.i2c_xfer(pdata, i2c_op); in xgbe_phy_i2c_xfer()
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| /linux-6.8/Documentation/devicetree/bindings/input/ |
| D | iqs626a.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeff LaBundy <jeff@labundy.com>
13 The Azoteq IQS626A is a 14-channel capacitive touch controller that features
14 additional Hall-effect and inductive sensing capabilities.
19 - $ref: touchscreen/touchscreen.yaml#
25 reg:
31 "#address-cells":
34 "#size-cells":
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| /linux-6.8/drivers/pinctrl/mvebu/ |
| D | pinctrl-mvebu.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
24 #include "pinctrl-mvebu.h"
64 *config = (readl(data->base + off) >> shift) & MVEBU_MPP_MASK; in mvebu_mmio_mpp_ctrl_get()
74 unsigned long reg; in mvebu_mmio_mpp_ctrl_set() local
76 reg = readl(data->base + off) & ~(MVEBU_MPP_MASK << shift); in mvebu_mmio_mpp_ctrl_set()
77 writel(reg | (config << shift), data->base + off); in mvebu_mmio_mpp_ctrl_set()
86 for (n = 0; n < pctl->num_groups; n++) { in mvebu_pinctrl_find_group_by_pid()
87 if (pid >= pctl->groups[n].pins[0] && in mvebu_pinctrl_find_group_by_pid()
88 pid < pctl->groups[n].pins[0] + in mvebu_pinctrl_find_group_by_pid()
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| /linux-6.8/drivers/infiniband/hw/qib/ |
| D | qib_iba6120.c | 2 * Copyright (c) 2013 - 2017 Intel Corporation. All rights reserved.
17 * - Redistributions of source code must retain the above
21 * - Redistributions in binary form must reproduce the above
54 * This file contains all the chip-specific register information and
55 * access functions for the Intel Intel_IB PCI-Express chip.
59 /* KREG_IDX uses machine-generated #defines */
62 /* Use defines to tie machine-generated names to lower-case names */
115 #define CREG_IDX(regname) ((QIB_6120_##regname##_OFFS - \
237 * DDR when faking DDR negotiations with non-IBTA switches.
239 * a non-zero delta.
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| /linux-6.8/sound/soc/fsl/ |
| D | fsl_ssi.c | 1 // SPDX-License-Identifier: GPL-2.0
7 // Copyright 2007-2010 Freescale Semiconductor, Inc.
9 // Some notes why imx-pcm-fiq is used instead of DMA on some boards:
16 // we receive in our (PCM-) data stream. The only chance we have is to
43 #include <linux/dma/imx-dma.h>
53 #include "imx-pcm.h"
55 /* Define RX and TX to index ssi->regvals array; Can be 0 or 1 only */
66 * (bit-endianness must match byte-endianness). Processors typically write
68 * written in. So if the host CPU is big-endian, then only big-endian
91 * - SSI inputs external bit clock and outputs frame sync clock -- CBM_CFS
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| /linux-6.8/drivers/net/ethernet/mediatek/ |
| D | mtk_wed.c | 1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/dma-mapping.h>
93 wed_m32(struct mtk_wed_device *dev, u32 reg, u32 mask, u32 val) in wed_m32() argument
95 regmap_update_bits(dev->hw->regs, reg, mask | val, val); in wed_m32()
99 wed_set(struct mtk_wed_device *dev, u32 reg, u32 mask) in wed_set() argument
101 return wed_m32(dev, reg, 0, mask); in wed_set()
105 wed_clr(struct mtk_wed_device *dev, u32 reg, u32 mask) in wed_clr() argument
107 return wed_m32(dev, reg, mask, 0); in wed_clr()
111 wdma_m32(struct mtk_wed_device *dev, u32 reg, u32 mask, u32 val) in wdma_m32() argument
113 wdma_w32(dev, reg, (wdma_r32(dev, reg) & ~mask) | val); in wdma_m32()
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| /linux-6.8/drivers/ata/ |
| D | pata_octeon_cf.c | 8 * Copyright (C) 2005 - 2012 Cavium Inc.
31 * -- 8 bits no irq, no DMA
32 * -- 16 bits no irq, no DMA
33 * -- 16 bits True IDE mode with DMA, but no irq.
128 struct octeon_cf_port *cf_port = ap->private_data; in octeon_cf_set_piomode()
137 /* These names are timing parameters from the ATA spec */ in octeon_cf_set_piomode()
150 BUG_ON(ata_timing_compute(dev, dev->pio_mode, &timing, T, T)); in octeon_cf_set_piomode()
154 t2--; in octeon_cf_set_piomode()
158 trh--; in octeon_cf_set_piomode()
160 pause = (int)timing.cycle - (int)timing.active - in octeon_cf_set_piomode()
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