include/asm/sysreg.h

1 /* SPDX-License-Identifier: GPL-2.0-only */
15 #include <asm/gpr-num.h>
21  *	[20-19] : Op0
22  *	[18-16] : Op1
23  *	[15-12] : CRn
24  *	[11-8]  : CRm
25  *	[7-5]   : Op2
82  * As per Arm ARM for v8-A, Section "C.5.1.3 op0 == 0b00, architectural hints,
132 #include "asm/sysreg-defs.h"
320  * n: 0-15
326  * n: 0-15
644 #define ICH_LR_VIRTUAL_ID_MASK	((1ULL << 32) - 1)
790  * For registers without architectural names, or simply unsupported by
806  * set mask are set. Other bits are left as-is.
830 #define SYS_FIELD_GET(reg, field, val)		\  argument
831 		 FIELD_GET(reg##_##field##_MASK, val)
833 #define SYS_FIELD_PREP(reg, field, val)		\  argument
834 		 FIELD_PREP(reg##_##field##_MASK, val)
836 #define SYS_FIELD_PREP_ENUM(reg, field, val)		\  argument
837 		 FIELD_PREP(reg##_##field##_MASK, reg##_##field##_##val)